Wykres commitów

12 Commity (main)

Autor SHA1 Wiadomość Data
ArjanteMarvelde a712c1c29b V3.09
Solved I2C issue
Added uSDR.h containing the system wide definitions.
2022-08-13 16:08:08 +02:00
ArjanteMarvelde 2e6bf94cb4 V3.07
Q&D fix for I2C issue: i2c_write_blocking() returning prematurely, causing misses in register writes. Effect was erratic behaviour of the Si5351 clocks. General fix will follow.
2022-08-12 11:15:30 +02:00
ArjanteMarvelde 2ad6d2b9ba V3.06
Phase jumps are still a problem. Added some monitor commands to support analysis.
2022-08-03 22:08:54 +02:00
ArjanteMarvelde b43b223dba V3.05
Another bug in si5351 drv
2022-08-03 12:43:38 +02:00
ArjanteMarvelde caaf154a13 V3.04
Corrected some errors in si5351 driver
2022-08-03 12:06:30 +02:00
ArjanteMarvelde 53e7c155f5 V3.03
Added automatic bandfilter switching
Optimized si5351 driver a bit
2022-07-18 21:10:15 +02:00
ArjanteMarvelde 4a76b70b22 V3.00
Added frequency domain processing
2022-06-28 22:00:47 +02:00
ArjanteMarvelde 82d6dd841b Version 2.0
More or less stable version
2021-11-24 13:33:08 +01:00
ArjanteMarvelde 9e4cda73a0 AGC added 2021-10-13 17:19:07 +02:00
ArjanteMarvelde 1f5a8ce7c7 Changed pinning 2021-04-11 11:58:04 +02:00
ArjanteMarvelde a060b06065 Multicore support
Added multicore support
2021-04-05 21:18:30 +02:00
ArjanteMarvelde b03bcb9c7a
First draft
Uploaded first draft implementation
2021-04-03 21:39:24 +02:00