kopia lustrzana https://github.com/ArjanteMarvelde/uSDR-pico
V3.09
Solved I2C issue Added uSDR.h containing the system wide definitions.pull/13/head
ArjanteMarvelde
rodzic
dff1711b96
commit
a712c1c29b
91
dsp.c
91
dsp.c
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@ -24,11 +24,11 @@
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#include "hardware/timer.h"
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#include "hardware/clocks.h"
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#include "uSDR.h"
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#include "dsp.h"
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#include "hmi.h"
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#include "fix_fft.h"
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#define GP_PTT 15 // PTT pin 20 (GPIO 15)
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volatile bool tx_enabled; // TX branch active
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volatile uint32_t dsp_overrun; // Overrun counter
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@ -354,14 +354,14 @@ bool __not_in_flash_func(dsp_callback)(repeating_timer_t *t)
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if (tx_enabled)
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{
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A_buf[dsp_active][dsp_tick] = (int16_t)(tx_agc*adc_result[2]);
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pwm_set_gpio_level(21, I_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output I to DAC
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pwm_set_gpio_level(20, Q_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output Q to DAC
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pwm_set_gpio_level(DAC_I, I_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output I to DAC
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pwm_set_gpio_level(DAC_Q, Q_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output Q to DAC
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}
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else
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{
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I_buf[dsp_active][dsp_tick] = (int16_t)(rx_agc*adc_result[1]);
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Q_buf[dsp_active][dsp_tick] = (int16_t)(rx_agc*adc_result[0]);
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pwm_set_gpio_level(22, A_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output A to DAC
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pwm_set_gpio_level(DAC_A, A_buf[dsp_active][dsp_tick] + DAC_BIAS); // Output A to DAC
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}
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// When sample buffer is full, move pointer to next and signal the DSP loop
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@ -378,12 +378,12 @@ bool __not_in_flash_func(dsp_callback)(repeating_timer_t *t)
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if (tx_enabled)
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{
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a_sample = tx_agc * adc_result[2]; // Store A for DSP use
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pwm_set_gpio_level(21, i_sample); // Output I to DAC
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pwm_set_gpio_level(20, q_sample); // Output Q to DAC
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pwm_set_gpio_level(DAC_I, i_sample); // Output I to DAC
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pwm_set_gpio_level(DAC_Q, q_sample); // Output Q to DAC
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}
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else
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{
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pwm_set_gpio_level(22, a_sample); // Output Q to DAC
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pwm_set_gpio_level(DAC_A, a_sample); // Output Q to DAC
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q_sample = rx_agc * adc_result[0]; // Store Q for DSP use
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i_sample = rx_agc * adc_result[1]; // Store I for DSP use
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}
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@ -413,15 +413,15 @@ void __not_in_flash_func(dsp_loop)()
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* default mode is free running,
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* A and B pins are output
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*/
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gpio_set_function(20, GPIO_FUNC_PWM); // GP20 is PWM for Q DAC (Slice 2, Channel A)
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gpio_set_function(21, GPIO_FUNC_PWM); // GP21 is PWM for I DAC (Slice 2, Channel B)
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dac_iq = pwm_gpio_to_slice_num(20); // Get PWM slice for GP20 (Same for GP21)
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gpio_set_function(DAC_Q, GPIO_FUNC_PWM); // GP20 is PWM for Q DAC (Slice 2, Channel A)
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gpio_set_function(DAC_I, GPIO_FUNC_PWM); // GP21 is PWM for I DAC (Slice 2, Channel B)
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dac_iq = pwm_gpio_to_slice_num(DAC_Q); // Get PWM slice for GP20 (Same for GP21)
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pwm_set_clkdiv_int_frac (dac_iq, 1, 0); // clock divide by 1: full system clock
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pwm_set_wrap(dac_iq, DAC_RANGE-1); // Set cycle length; nr of counts until wrap, i.e. 125/DAC_RANGE MHz
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pwm_set_enabled(dac_iq, true); // Set the PWM running
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gpio_set_function(22, GPIO_FUNC_PWM); // GP22 is PWM for Audio DAC (Slice 3, Channel A)
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dac_audio = pwm_gpio_to_slice_num(22); // Find PWM slice for GP22
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gpio_set_function(DAC_A, GPIO_FUNC_PWM); // GP22 is PWM for Audio DAC (Slice 3, Channel A)
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dac_audio = pwm_gpio_to_slice_num(DAC_A); // Find PWM slice for GP22
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pwm_set_clkdiv_int_frac (dac_audio, 1, 0); // clock divide by 1: full system clock
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pwm_set_wrap(dac_audio, DAC_RANGE-1); // Set cycle length; nr of counts until wrap, i.e. 125/DAC_RANGE MHz
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pwm_set_enabled(dac_audio, true); // Set the PWM running
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@ -431,9 +431,9 @@ void __not_in_flash_func(dsp_loop)()
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* samples are stored in array through IRQ callback
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*/
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adc_init(); // Initialize ADC to known state
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adc_gpio_init(26); // GP26 is ADC 0 for Q channel
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adc_gpio_init(27); // GP27 is ADC 1 for I channel
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adc_gpio_init(28); // GP28 is ADC 2 for Audio channel
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adc_gpio_init(ADC_Q); // ADC GPIO for Q channel
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adc_gpio_init(ADC_I); // ADC GPIO for I channel
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adc_gpio_init(ADC_A); // ADC GPIO for Audio channel
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adc_set_round_robin(0x01+0x02+0x04); // Sequence ADC 0-1-2 (GP 26, 27, 28) free running
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adc_select_input(0); // Start with ADC0
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adc_fifo_setup(true,true,3,false,false); // IRQ result, DMA req, fifo thr=3: xfer per 3 x 16 bits
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@ -506,7 +506,7 @@ void __not_in_flash_func(dsp_loop)()
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rx(); // Do RX signal processing
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}
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/////// This is a trap, ptt remains active after once asserted: to be checked!
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/** !!! This is a trap, ptt remains active after once asserted: TO BE CHECKED! **/
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tx_enabled = vox_active || ptt_active; // Check RX or TX
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#if DSP_FFT == 1
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@ -527,63 +527,4 @@ void dsp_init()
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/* DMA EXAMPLE, should convert to chained DMA to reload after 3 words
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// Init GPIO for analogue use: hi-Z, no pulls, disable digital input buffer.
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adc_gpio_init(26 + CAPTURE_CHANNEL);
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adc_init();
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adc_select_input(CAPTURE_CHANNEL);
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adc_fifo_setup(
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true, // Write each completed conversion to the sample FIFO
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true, // Enable DMA data request (DREQ)
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1, // DREQ (and IRQ) asserted when at least 1 sample present
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false, // We won't see the ERR bit because of 8 bit reads; disable.
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true // Shift each sample to 8 bits when pushing to FIFO
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);
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// Divisor of 0 -> full speed. Free-running capture with the divider is
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// equivalent to pressing the ADC_CS_START_ONCE button once per `div + 1`
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// cycles (div not necessarily an integer). Each conversion takes 96
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// cycles, so in general you want a divider of 0 (hold down the button
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// continuously) or > 95 (take samples less frequently than 96 cycle
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// intervals). This is all timed by the 48 MHz ADC clock.
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adc_set_clkdiv(0);
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printf("Arming DMA\n");
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sleep_ms(1000);
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// Set up the DMA to start transferring data as soon as it appears in FIFO
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uint dma_chan = dma_claim_unused_channel(true);
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dma_channel_config cfg = dma_channel_get_default_config(dma_chan);
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// Reading from constant address, writing to incrementing byte addresses
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channel_config_set_transfer_data_size(&cfg, DMA_SIZE_8);
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channel_config_set_read_increment(&cfg, false);
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channel_config_set_write_increment(&cfg, true);
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// Pace transfers based on availability of ADC samples
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channel_config_set_dreq(&cfg, DREQ_ADC);
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dma_channel_configure(dma_chan, &cfg,
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capture_buf, // dst
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&adc_hw->fifo, // src
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CAPTURE_DEPTH, // transfer count
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true // start immediately
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);
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printf("Starting capture\n");
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adc_run(true);
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// Once DMA finishes, stop any new conversions from starting, and clean up
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// the FIFO in case the ADC was still mid-conversion.
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dma_channel_wait_for_finish_blocking(dma_chan);
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printf("Capture finished\n");
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adc_run(false);
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adc_fifo_drain();
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// Print samples to stdout so you can display them in pyplot, excel, matlab
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for (int i = 0; i < CAPTURE_DEPTH; ++i) {
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printf("%-3d, ", capture_buf[i]);
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if (i % 10 == 9)
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printf("\n");
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}
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*/
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4
dsp.h
4
dsp.h
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@ -13,10 +13,6 @@
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*
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*/
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#define DSP_FFT 1
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/*
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* Callback timeout is TIM_US, value in usec
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@ -53,7 +53,7 @@
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*
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*/
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#include "uSDR.h"
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/*
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* FFT buffer allocation
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@ -28,6 +28,7 @@
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*
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*/
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#include "uSDR.h"
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/*
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* Low pass FIR filters Fc=3, 7 and 15 kHz (see http://t-filter.engineerjs.com/)
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13
hmi.c
13
hmi.c
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@ -29,10 +29,11 @@
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#include <stdio.h>
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#include <string.h>
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#include "pico/stdlib.h"
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#include "hardware/i2c.h"
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#include "hardware/timer.h"
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#include "hardware/clocks.h"
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#include "hardware/gpio.h"
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#include "uSDR.h"
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#include "lcd.h"
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#include "hmi.h"
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#include "dsp.h"
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@ -40,15 +41,8 @@
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#include "relay.h"
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/*
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* GPIO assignments
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* GPIO masks
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*/
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#define GP_ENC_A 2
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#define GP_ENC_B 3
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#define GP_AUX_0 6 // Enter, Confirm
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#define GP_AUX_1 7 // Escape, Cancel
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#define GP_AUX_2 8 // Left move
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#define GP_AUX_3 9 // Right move
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#define GP_PTT 15
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#define GP_MASK_IN ((1<<GP_ENC_A)|(1<<GP_ENC_B)|(1<<GP_AUX_0)|(1<<GP_AUX_1)|(1<<GP_AUX_2)|(1<<GP_AUX_3)|(1<<GP_PTT))
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#define GP_MASK_PTT (1<<GP_PTT)
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@ -340,7 +334,6 @@ void hmi_evaluate(void)
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dsp_setvox(hmi_sub[HMI_S_VOX]);
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dsp_setagc(hmi_sub[HMI_S_AGC]);
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relay_setband(hmi_bpf[hmi_sub[HMI_S_BPF]]);
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sleep_ms(1); // I2C doesn't work without...
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relay_setattn(hmi_pre[hmi_sub[HMI_S_PRE]]);
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hmi_update = false;
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}
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2
hmi.h
2
hmi.h
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@ -9,8 +9,6 @@
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* See hmi.c for more information
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*/
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#define CARRIER_OFFSET 3500
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extern bool ptt_active;
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void hmi_init(void);
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49
lcd.c
49
lcd.c
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@ -4,11 +4,10 @@
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* Created: Mar 2021
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* Author: Arjan te Marvelde
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*
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* --> Set I2C address below!
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* --> Select LCD_TYPE below!
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*
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* Driver for 16x2 HD44780 based LCD displays.
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* There exist many different types, so you may need to adapt some of the code.
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* => LCD Address and Type are chosen in uSDR.h!
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*
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* This file contains the driver for 16x2 HD44780 based LCD displays.
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* Many different types exist, so you may need to adapt some of the code.
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* Most notably the startup sequence and the way bytes are sent over the I2C interface.
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* But also the register mappings as described below.
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*
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@ -46,19 +45,10 @@
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#include "hardware/i2c.h"
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#include "hardware/timer.h"
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#include "hardware/clocks.h"
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#include "uSDR.h"
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#include "lcd.h"
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/** User selectable definitions **/
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// Set I2C address for your device
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#define I2C_LCD 0x3E // Grove: 0x3E, 8574 backpack: 0x20..0x27
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// Select LCD type to match your device,
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// or define a new one when code changes are needed.
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#define LCD_1804 0 // Seeed / Grove
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#define LCD_8574_ADA 1 // Adafruit I2C backpack
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#define LCD_8574_GEN 2 // Generic I2C backpack
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#define LCD_TYPE LCD_1804
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/** Generic HD44780 interface **/
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// commands
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@ -100,19 +90,20 @@
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#define LCD_5x8DOTS 0x00
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/** I2C interface specific mappings **/
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// 1804-based specific bitmasks
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// 1804-based specific bitmasks (Seeed/Grove)
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#define LCD_COMMAND 0x80
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#define LCD_DATA 0x40
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#define LCD_INIT_1804 (LCD_FUNCTIONSET | LCD_8BITMODE | LCD_2LINE | LCD_5x8DOTS)
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// 8574-based specific bitmasks
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// 8574-based specific bitmasks (Adafruit)
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#define LCD_COMMAND_ADA 0x00
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#define LCD_DATA_ADA 0x02
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#define LCD_BACKLIGHT_ADA 0x80
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#define LCD_ENABLE_ADA 0x04
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#define LCD_INIT_ADA (LCD_FUNCTIONSET | LCD_4BITMODE | LCD_2LINE | LCD_5x8DOTS)
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// 8574-based specific bitmasks (Generic)
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#define LCD_COMMAND_GEN 0x00
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#define LCD_DATA_GEN 0x01
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#define LCD_ENABLE_GEN 0x04
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@ -131,9 +122,6 @@
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#endif
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/** Other definitions **/
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#define LCD_DELAY 100 // Delay for regular write
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/*
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* User defined (CGRAM) characters
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@ -164,8 +152,7 @@ void lcd_sendbyte(uint8_t command, uint8_t data)
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// Write command/data flag and data byte
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txdata[0] = (command?LCD_COMMAND:LCD_DATA);
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txdata[1] = data;
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i2c_write_blocking(i2c1, I2C_LCD, txdata, 2, false);
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sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, txdata, 2, false);
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#endif
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#if LCD_TYPE == LCD_8574_ADA
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@ -175,15 +162,15 @@ void lcd_sendbyte(uint8_t command, uint8_t data)
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// Write high nibble
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high |= LCD_ENABLE_ADA;
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i2c_write_blocking(i2c1, I2C_LCD, &high, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &high, 1, false);
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high &= ~LCD_ENABLE_ADA;
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i2c_write_blocking(i2c1, I2C_LCD, &high, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &high, 1, false);
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// Write low nibble
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low |= LCD_ENABLE_ADA;
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i2c_write_blocking(i2c1, I2C_LCD, &low, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &low, 1, false);
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low &= ~LCD_ENABLE_ADA;
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i2c_write_blocking(i2c1, I2C_LCD, &low, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &low, 1, false);
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#endif
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#if LCD_TYPE == LCD_8574_GEN
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@ -193,15 +180,15 @@ void lcd_sendbyte(uint8_t command, uint8_t data)
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// Write high nibble
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high |= LCD_ENABLE_GEN;
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i2c_write_blocking(i2c1, I2C_LCD, &high, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &high, 1, false);
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high &= ~LCD_ENABLE_GEN;
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i2c_write_blocking(i2c1, I2C_LCD, &high, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &high, 1, false);
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// Write low nibble
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low |= LCD_ENABLE_GEN;
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i2c_write_blocking(i2c1, I2C_LCD, &low, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &low, 1, false);
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low &= ~LCD_ENABLE_GEN;
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i2c_write_blocking(i2c1, I2C_LCD, &low, 1, false); sleep_us(LCD_DELAY);
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i2c_put_data(i2c1, I2C_LCD, &low, 1, false);
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#endif
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}
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@ -14,6 +14,7 @@
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#include <string.h>
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#include "pico/stdlib.h"
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#include "uSDR.h"
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#include "lcd.h"
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#include "si5351.h"
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#include "dsp.h"
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@ -21,12 +22,15 @@
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#include "monitor.h"
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// Some special character ASCII codes
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#define CR 13
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#define LF 10
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#define SP 32
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#define CMD_LEN 80
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#define CMD_ARGS 16
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char mon_cmd[CMD_LEN+1]; // Command string buffer
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char *argv[CMD_ARGS]; // Argument pointers
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int nargs; // Nr of arguments
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17
relay.c
17
relay.c
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@ -25,12 +25,11 @@
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#include "pico/stdlib.h"
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#include "hardware/i2c.h"
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#include "uSDR.h"
|
||||
#include "relay.h"
|
||||
|
||||
|
||||
/* I2C address and pins */
|
||||
#define I2C_RX 0x21
|
||||
#define I2C_BPF 0x20
|
||||
|
||||
|
||||
|
||||
void relay_setband(int val)
|
||||
|
|
@ -39,8 +38,8 @@ void relay_setband(int val)
|
|||
int ret;
|
||||
|
||||
data[0] = ((uint8_t)val)&0x1f;
|
||||
if (i2c_write_blocking(i2c1, I2C_BPF, data, 1, false) < 0)
|
||||
i2c_write_blocking(i2c1, I2C_BPF, data, 1, false);
|
||||
if (i2c_put_data(i2c1, I2C_BPF, data, 1, false) < 0)
|
||||
i2c_put_data(i2c1, I2C_BPF, data, 1, false);
|
||||
sleep_ms(1);
|
||||
}
|
||||
|
||||
|
|
@ -49,7 +48,7 @@ int relay_getband(void)
|
|||
uint8_t data[2];
|
||||
int ret;
|
||||
|
||||
ret = i2c_read_blocking(i2c1, I2C_BPF, data, 1, false);
|
||||
ret = i2c_get_data(i2c1, I2C_BPF, data, 1, false);
|
||||
if (ret>=0)
|
||||
ret=data[0];
|
||||
return(ret);
|
||||
|
|
@ -60,8 +59,8 @@ void relay_setattn(int val)
|
|||
uint8_t data[2];
|
||||
|
||||
data[0] = ((uint8_t)val)&0x07;
|
||||
if (i2c_write_blocking(i2c1, I2C_RX, data, 1, false) < 0)
|
||||
i2c_write_blocking(i2c1, I2C_RX, data, 1, false);
|
||||
if (i2c_put_data(i2c1, I2C_RX, data, 1, false) < 0)
|
||||
i2c_put_data(i2c1, I2C_RX, data, 1, false);
|
||||
sleep_ms(1);
|
||||
}
|
||||
|
||||
|
|
@ -70,7 +69,7 @@ int relay_getattn(void)
|
|||
uint8_t data[2];
|
||||
int ret;
|
||||
|
||||
ret = i2c_read_blocking(i2c1, I2C_RX, data, 1, false);
|
||||
ret = i2c_get_data(i2c1, I2C_RX, data, 1, false);
|
||||
if (ret>=0)
|
||||
ret=data[0];
|
||||
return(ret);
|
||||
|
|
|
|||
38
si5351.c
38
si5351.c
|
|
@ -149,9 +149,10 @@ Control Si5351 (see AN619):
|
|||
#include "hardware/i2c.h"
|
||||
#include "hardware/timer.h"
|
||||
#include "hardware/clocks.h"
|
||||
|
||||
#include "uSDR.h"
|
||||
#include "si5351.h"
|
||||
|
||||
#define I2C_VFO 0x60 // I2C address
|
||||
|
||||
// SI5351 register address definitions
|
||||
#define SI_CLK_OE 3
|
||||
|
|
@ -234,14 +235,14 @@ void si_enable(int i, bool en)
|
|||
if ((i<0)||(i>1)) return; // Check VFO range
|
||||
|
||||
data[0] = SI_CLK_OE; // Read OE register
|
||||
i2c_write_blocking(i2c0, I2C_VFO, &data[0], 1, true);
|
||||
i2c_put_data(i2c0, I2C_VFO, &data[0], 1, true);
|
||||
i2c_read_blocking(i2c0, I2C_VFO, &data[1], 1, false);
|
||||
|
||||
if (i==0)
|
||||
data[1] = en ? data[1]&~SI_VFO0_DISABLE : data[1]|SI_VFO0_DISABLE; // clk0 and clk1
|
||||
else
|
||||
data[1] = en ? data[1]&~SI_VFO1_DISABLE : data[1]|SI_VFO1_DISABLE; // clk2
|
||||
i2c_write_blocking(i2c0, I2C_VFO, &data[0], 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, &data[0], 2, false);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -251,9 +252,9 @@ int si_getreg(uint8_t *data, uint8_t reg, uint8_t len)
|
|||
{
|
||||
int ret;
|
||||
|
||||
ret = i2c_write_blocking(i2c0, I2C_VFO, ®, 1, true);
|
||||
ret = i2c_put_data(i2c0, I2C_VFO, ®, 1, true);
|
||||
if (ret<0) printf ("I2C write error\n");
|
||||
ret = i2c_read_blocking(i2c0, I2C_VFO, data, len, false);
|
||||
ret = i2c_get_data(i2c0, I2C_VFO, data, len, false);
|
||||
if (ret<0) printf ("I2C read error\n");
|
||||
return(len);
|
||||
}
|
||||
|
|
@ -299,7 +300,7 @@ void si_setmsn(int i)
|
|||
data[6] = ((SI_PLL_C & 0x000F0000) >> 12) | ((P2 & 0x000F0000) >> 16);
|
||||
data[7] = (P2 & 0x0000FF00) >> 8;
|
||||
data[8] = (P2 & 0x000000FF);
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 9, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 9, false);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -338,59 +339,56 @@ void si_setmsi(int i)
|
|||
data[6] = 0x00;
|
||||
data[7] = 0x00;
|
||||
data[8] = 0x00;
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 9, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 9, false);
|
||||
|
||||
// If vfo[0] also set clk 1 and phase offset, (integer mode(?) and high drive current for low phase noise).
|
||||
if (i==0)
|
||||
{
|
||||
data[0] = SI_SYNTH_MS1; // Same data in synthesizer
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 9, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 9, false);
|
||||
|
||||
if ((vfo[0].phase==PH090)||(vfo[0].phase==PH270)) // Phase is 90 or 270 deg?
|
||||
{
|
||||
data[0] = SI_CLK1_PHOFF;
|
||||
data[1] = vfo[0].msi; // offset == MSi for 90deg
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
}
|
||||
else // Phase is 0 or 180 deg
|
||||
{
|
||||
data[0] = SI_CLK1_PHOFF;
|
||||
data[1] = 0; // offset == 0 for 0deg
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
}
|
||||
sleep_us(500);
|
||||
if ((vfo[0].phase==PH180)||(vfo[0].phase==PH270)) // Phase is 180 or 270 deg?
|
||||
{
|
||||
data[0] = SI_CLK0_CTL; // set the invert flag
|
||||
data[1] = SI_VFO0CTL; // CLK0: nonINV
|
||||
data[2] = SI_VFO0CTL | SI_CLK_INV; // CLK1: INV
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 3, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 3, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
data[0] = SI_CLK0_CTL; // set the invert flag
|
||||
data[1] = SI_VFO0CTL; // CLK0: nonINV
|
||||
data[2] = SI_VFO0CTL; // CLK1: nonINV
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 3, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 3, false);
|
||||
}
|
||||
|
||||
// Reset PLL A (use with care, this causes a click)
|
||||
sleep_us(500);
|
||||
data[0] = SI_PLL_RESET;
|
||||
data[1] = SI_PLLA_RST|SI_PLLB_RST;
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
}
|
||||
else
|
||||
{
|
||||
data[0] = SI_CLK2_CTL; // set the invert flag
|
||||
data[1] = SI_VFO1CTL; // CLK2: nonINV
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
|
||||
// Reset PLL B (use with care, this causes a click)
|
||||
sleep_us(500);
|
||||
data[0] = SI_PLL_RESET;
|
||||
data[1] = SI_PLLA_RST|SI_PLLB_RST;
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -457,14 +455,14 @@ void si_init(void)
|
|||
// Disable spread spectrum (startup state is undefined)
|
||||
data[0] = SI_SS_EN;
|
||||
data[1] = 0x00;
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 2, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 2, false);
|
||||
|
||||
// First time init of clock control registers
|
||||
data[0] = SI_CLK0_CTL;
|
||||
data[1] = SI_VFO0CTL;
|
||||
data[2] = SI_VFO0CTL;
|
||||
data[3] = SI_VFO1CTL;
|
||||
i2c_write_blocking(i2c0, I2C_VFO, data, 4, false);
|
||||
i2c_put_data(i2c0, I2C_VFO, data, 4, false);
|
||||
|
||||
// Initialize VFO values
|
||||
vfo[0].freq = 7074000;
|
||||
|
|
|
|||
29
uSDR.c
29
uSDR.c
|
|
@ -22,6 +22,7 @@
|
|||
#include "hardware/timer.h"
|
||||
#include "hardware/clocks.h"
|
||||
|
||||
#include "uSDR.h"
|
||||
#include "hmi.h"
|
||||
#include "lcd.h"
|
||||
#include "dsp.h"
|
||||
|
|
@ -30,15 +31,30 @@
|
|||
#include "relay.h"
|
||||
|
||||
|
||||
#define I2C0_SDA 16
|
||||
#define I2C0_SCL 17
|
||||
#define I2C1_SDA 18
|
||||
#define I2C1_SCL 19
|
||||
|
||||
/*
|
||||
* Wrappers around i2c_write_blocking() and i2c_read_blocking()
|
||||
* The SDK functions return too soon, potentially causing overlapping calls
|
||||
*/
|
||||
|
||||
int i2c_put_data(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop)
|
||||
{
|
||||
int r = i2c_write_blocking(i2c, addr, src, len, nostop);
|
||||
sleep_us(I2C_LINGER_US);
|
||||
return(r);
|
||||
}
|
||||
|
||||
int i2c_get_data(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop)
|
||||
{
|
||||
int r = i2c_read_blocking(i2c, addr, dst, len, nostop);
|
||||
sleep_us(I2C_LINGER_US);
|
||||
return(r);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* LED TIMER definition and callback routine
|
||||
*/
|
||||
#define LED_MS 1000
|
||||
struct repeating_timer led_timer;
|
||||
bool led_callback(struct repeating_timer *t)
|
||||
{
|
||||
|
|
@ -49,11 +65,11 @@ bool led_callback(struct repeating_timer *t)
|
|||
return true;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Scheduler callback function.
|
||||
* This executes every LOOP_MS.
|
||||
*/
|
||||
#define LOOP_MS 100
|
||||
semaphore_t loop_sem;
|
||||
struct repeating_timer loop_timer;
|
||||
bool loop_callback(struct repeating_timer *t)
|
||||
|
|
@ -66,6 +82,7 @@ bool loop_callback(struct repeating_timer *t)
|
|||
int main()
|
||||
{
|
||||
/*
|
||||
* Main loop rnning on Core 0
|
||||
* Optional: increase core voltage (normally 1.1V)
|
||||
* Optional: overclock the CPU to 250MHz (normally 125MHz)
|
||||
* Note that clk_peri (e.g. I2C) is derived from the SYS PLL
|
||||
|
|
|
|||
|
|
@ -0,0 +1,74 @@
|
|||
#ifndef __USDR_H__
|
||||
#define __USDR_H__
|
||||
/*
|
||||
* uSDR.h
|
||||
*
|
||||
* Created: Aug 2022
|
||||
* Author: Arjan te Marvelde
|
||||
*
|
||||
* This file contains the system-wide definitions and platform services.
|
||||
*
|
||||
*/
|
||||
|
||||
#include "hardware/i2c.h"
|
||||
|
||||
|
||||
/* Set this to 1 when FFT engine must be used */
|
||||
|
||||
#define DSP_FFT 1
|
||||
|
||||
|
||||
/* GPIO (pin) assignments */
|
||||
|
||||
#define GP_ENC_A 2 // Pin 4: Encoder channel A
|
||||
#define GP_ENC_B 3 // Pin 5: Encoder channel B
|
||||
#define GP_AUX_0 6 // Pin 9: Enter, Confirm
|
||||
#define GP_AUX_1 7 // Pin 10: Escape, Cancel
|
||||
#define GP_AUX_2 8 // Pin 11: Left move
|
||||
#define GP_AUX_3 9 // Pin 12: Right move
|
||||
#define GP_PTT 15 // Pin 20: PTT line (low is active)
|
||||
#define I2C0_SDA 16 // Pin 21: I2C channel 0 - data
|
||||
#define I2C0_SCL 17 // Pin 22: I2C channel 0 - clock
|
||||
#define I2C1_SDA 18 // Pin 24: I2C channel 1 - data
|
||||
#define I2C1_SCL 19 // Pin 25: I2C channel 1 - clock
|
||||
#define DAC_Q 20 // Pin 26: PWM DAC Q channel
|
||||
#define DAC_I 21 // Pin 27: PWM DAC I channel
|
||||
#define DAC_A 22 // Pin 29: PWM DAC Audio channel
|
||||
#define ADC_Q 26 // Pin 31: ADC 0
|
||||
#define ADC_I 27 // Pin 32: ADC 1
|
||||
#define ADC_A 28 // Pin 34: ADC 2
|
||||
|
||||
|
||||
|
||||
/* Timer values */
|
||||
|
||||
#define LED_MS 1000 // LED flashing, half cycle duration
|
||||
#define LOOP_MS 100 // Core 0 main loop timer (see also uSDR.c)
|
||||
|
||||
|
||||
/* I2C addresses */
|
||||
|
||||
#define I2C_RX 0x21 // Expander on Rx board
|
||||
#define I2C_BPF 0x20 // Expander on Filter board
|
||||
#define I2C_VFO 0x60 // Si5351A
|
||||
#define I2C_LCD 0x3E // Grove: 0x3E, 8574 backpack range: 0x20..0x27
|
||||
|
||||
|
||||
/* I2C wrapper functions (blocking write and read) */
|
||||
|
||||
#define I2C_LINGER_US 200 // Linger time added after i2c SDK functions
|
||||
|
||||
int i2c_put_data(i2c_inst_t *i2c, uint8_t addr, const uint8_t *src, size_t len, bool nostop);
|
||||
int i2c_get_data(i2c_inst_t *i2c, uint8_t addr, uint8_t *dst, size_t len, bool nostop);
|
||||
|
||||
|
||||
/* LCD type selection (see also lcd.c) */
|
||||
|
||||
#define LCD_1804 0 // Type 0: Seeed / Grove
|
||||
#define LCD_8574_ADA 1 // Type 1: Adafruit I2C backpack
|
||||
#define LCD_8574_GEN 2 // Type 2: Generic I2C backpack
|
||||
#define LCD_TYPE LCD_1804 // Active selection
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
Ładowanie…
Reference in New Issue