kopia lustrzana https://github.com/micropython/micropython
samd/ADC_DAC: Add adc.busy() and dac.busy() methods.
These return True, while a timed action is ongoing. Side change: Reorder some code in machine_dac.c and do not reset DAC twice. Signed-off-by: robert-hh <robert@hammelrath.com>pull/9624/head
robert-hh
rodzic
7197c8adc0
commit
53c640c0ce
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@ -351,6 +351,7 @@ static void mp_machine_adc_deinit(machine_adc_obj_t *self) {
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#if defined(MCU_SAMD51)
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if (self->dma_channel == device_mgmt[self->adc_config.device].dma_channel) {
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device_mgmt[self->adc_config.device].dma_channel = -1;
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device_mgmt[self->adc_config.device].busy = 0;
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}
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#endif
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dac_stop_dma(self->dma_channel, true);
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@ -363,6 +364,12 @@ static void mp_machine_adc_deinit(machine_adc_obj_t *self) {
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}
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}
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// busy() : Report, if the ADC device is busy
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static mp_int_t machine_adc_busy(mp_obj_t self_in) {
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machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return device_mgmt[self->adc_config.device].busy ? true : false;
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}
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void adc_deinit_all(void) {
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ch_busy_flags = 0;
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device_mgmt[0].init = 0;
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@ -31,6 +31,8 @@
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#include <stdint.h>
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#include "py/obj.h"
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#include "py/runtime.h"
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#include "py/mperrno.h"
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#include "py/mphal.h"
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#include "sam.h"
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@ -48,6 +50,7 @@ typedef struct _dac_obj_t {
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uint8_t vref;
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int8_t dma_channel;
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int8_t tc_index;
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bool busy;
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uint32_t count;
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mp_obj_t callback;
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} dac_obj_t;
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@ -57,19 +60,23 @@ static mp_obj_t dac_deinit(mp_obj_t self_in);
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#if defined(MCU_SAMD21)
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static dac_obj_t dac_obj[] = {
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{{&machine_dac_type}, 0, 0, PIN_PA02},
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};
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#define MAX_DAC_VALUE (1023)
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#define DEFAULT_DAC_VREF (1)
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#define MAX_DAC_VREF (2)
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static dac_obj_t dac_obj[] = {
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{{&machine_dac_type}, 0, 0, PIN_PA02, DEFAULT_DAC_VREF, -1, -1, false, 1, NULL},
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};
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#elif defined(MCU_SAMD51)
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#define MAX_DAC_VALUE (4095)
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#define DEFAULT_DAC_VREF (2)
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#define MAX_DAC_VREF (3)
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static dac_obj_t dac_obj[] = {
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{{&machine_dac_type}, 0, 0, PIN_PA02, 2, -1, -1, 1, NULL},
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{{&machine_dac_type}, 1, 0, PIN_PA05, 2, -1, -1, 1, NULL},
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{{&machine_dac_type}, 0, 0, PIN_PA02, DEFAULT_DAC_VREF, -1, -1, false, 1, NULL},
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{{&machine_dac_type}, 1, 0, PIN_PA05, DEFAULT_DAC_VREF, -1, -1, false, 1, NULL},
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};
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// According to Errata 2.9.2, VDDANA as ref value is not available. However it worked
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// in tests. So I keep the selection here but set the default to Aref, which is usually
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@ -78,9 +85,6 @@ static uint8_t dac_vref_table[] = {
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DAC_CTRLB_REFSEL_INTREF_Val, DAC_CTRLB_REFSEL_VDDANA_Val,
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DAC_CTRLB_REFSEL_VREFPU_Val, DAC_CTRLB_REFSEL_VREFPB_Val
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};
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#define MAX_DAC_VALUE (4095)
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#define DEFAULT_DAC_VREF (2)
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#define MAX_DAC_VREF (3)
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#endif // defined SAMD21 or SAMD51
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@ -96,6 +100,7 @@ void dac_irq_handler(int dma_channel) {
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dma_desc[self->dma_channel].BTCTRL.reg |= DMAC_BTCTRL_VALID;
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DMAC->CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
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} else {
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self->busy = false;
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if (self->callback != MP_OBJ_NULL) {
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mp_sched_schedule(self->callback, self);
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}
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@ -113,6 +118,7 @@ void dac_irq_handler(int dma_channel) {
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dma_desc[self->dma_channel].BTCTRL.reg |= DMAC_BTCTRL_VALID;
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DMAC->Channel[self->dma_channel].CHCTRLA.reg |= DMAC_CHCTRLA_ENABLE;
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} else {
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self->busy = false;
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if (self->callback != MP_OBJ_NULL) {
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mp_sched_schedule(self->callback, self);
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}
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@ -136,10 +142,10 @@ static mp_obj_t dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_
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uint8_t id = args[ARG_id].u_int;
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dac_obj_t *self = NULL;
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if (0 <= id && id <= MP_ARRAY_SIZE(dac_obj)) {
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if (0 <= id && id < MP_ARRAY_SIZE(dac_obj)) {
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self = &dac_obj[id];
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} else {
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mp_raise_ValueError(MP_ERROR_TEXT("invalid Pin for DAC"));
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mp_raise_ValueError(MP_ERROR_TEXT("invalid DAC ID"));
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}
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uint8_t vref = args[ARG_vref].u_int;
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@ -192,9 +198,18 @@ static void dac_init(dac_obj_t *self, Dac *dac) {
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MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC;
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GCLK->PCHCTRL[DAC_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK5 | GCLK_PCHCTRL_CHEN;
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// Reset DAC registers
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dac->CTRLA.bit.SWRST = 1;
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while (dac->CTRLA.bit.SWRST) {
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// If the DAC is enabled it was already reset
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// In that case just disable it.
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if (dac->CTRLA.bit.ENABLE) {
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// Enable DAC and wait to be ready
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dac->CTRLA.bit.ENABLE = 0;
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while (dac->SYNCBUSY.bit.ENABLE) {
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}
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} else {
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// Reset DAC registers
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dac->CTRLA.bit.SWRST = 1;
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while (dac->CTRLA.bit.SWRST) {
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}
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}
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dac->CTRLB.reg = DAC_CTRLB_REFSEL(dac_vref_table[self->vref]);
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dac->DACCTRL[self->id].reg = DAC_DACCTRL_ENABLE | DAC_DACCTRL_REFRESH(2) | DAC_DACCTRL_CCTRL_CC12M;
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@ -217,6 +232,10 @@ static void dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t
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static mp_obj_t dac_write(mp_obj_t self_in, mp_obj_t value_in) {
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Dac *dac = dac_bases[0]; // Just one DAC
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dac_obj_t *self = self_in;
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if (self->busy != false) {
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mp_raise_OSError(MP_EBUSY);
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}
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int value = mp_obj_get_int(value_in);
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if (value < 0 || value > MAX_DAC_VALUE) {
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@ -259,6 +278,8 @@ static mp_obj_t dac_write_timed(size_t n_args, const mp_obj_t *args) {
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}
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// Configure TC; no need to check the return value
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configure_tc(self->tc_index, freq, 0);
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self->busy = true;
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// Configure DMA for halfword output to the DAC
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#if defined(MCU_SAMD21)
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@ -337,10 +358,18 @@ static mp_obj_t dac_deinit(mp_obj_t self_in) {
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self->tc_index = -1;
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}
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self->callback = MP_OBJ_NULL;
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self->busy = false;
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return mp_const_none;
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}
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MP_DEFINE_CONST_FUN_OBJ_1(dac_deinit_obj, dac_deinit);
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// busy() : Report, if the DAC device is busy
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static mp_obj_t machine_dac_busy(mp_obj_t self_in) {
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dac_obj_t *self = MP_OBJ_TO_PTR(self_in);
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return self->busy ? mp_const_true : mp_const_false;
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}
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static MP_DEFINE_CONST_FUN_OBJ_1(machine_dac_busy_obj, machine_dac_busy);
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// Clear the DMA channel entry in the DAC object.
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void dac_deinit_channel(void) {
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dac_obj[0].dma_channel = -1;
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@ -350,6 +379,7 @@ void dac_deinit_channel(void) {
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}
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static const mp_rom_map_elem_t dac_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_busy), MP_ROM_PTR(&machine_dac_busy_obj) },
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{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&dac_deinit_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&dac_write_obj) },
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{ MP_ROM_QSTR(MP_QSTR_write_timed), MP_ROM_PTR(&dac_write_timed_obj) },
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