2021-04-03 19:39:24 +00:00
|
|
|
#ifndef _SI5351_H
|
|
|
|
#define _SI5351_H
|
|
|
|
/*
|
|
|
|
* si5351.h
|
|
|
|
*
|
2021-04-05 19:18:30 +00:00
|
|
|
* Created: March 2021
|
2021-04-03 19:39:24 +00:00
|
|
|
* Author: Arjan
|
2021-04-05 19:18:30 +00:00
|
|
|
*
|
2022-07-18 19:10:15 +00:00
|
|
|
* Driver for Si5351A chip.
|
|
|
|
* VFO 0 is a quadrature clock on outputs 0 and 1,
|
|
|
|
* VFO 1 is a regular clock on output 2.
|
|
|
|
*
|
|
|
|
* The quadrature clock allows to set shared frequency and phase offsets of 0, 90, 180 and 270 deg
|
|
|
|
* The regular clock just allows to set frequency, phase is ignored
|
|
|
|
*
|
2021-04-05 19:18:30 +00:00
|
|
|
* See si5351.c for more information
|
|
|
|
*
|
2021-04-03 19:39:24 +00:00
|
|
|
*/
|
|
|
|
|
2022-07-18 19:10:15 +00:00
|
|
|
#define PH000 0
|
|
|
|
#define PH090 1
|
|
|
|
#define PH180 2
|
|
|
|
#define PH270 3
|
2021-04-03 19:39:24 +00:00
|
|
|
|
|
|
|
int si_getreg(uint8_t *data, uint8_t reg, uint8_t len);
|
2021-04-05 19:18:30 +00:00
|
|
|
void si_init(void);
|
|
|
|
void si_evaluate(void);
|
2022-07-18 19:10:15 +00:00
|
|
|
void si_setfreq(int i, uint32_t f);
|
|
|
|
void si_setphase(int i, uint8_t p);
|
|
|
|
void si_enable(int i, bool en);
|
2021-04-03 19:39:24 +00:00
|
|
|
|
|
|
|
|
|
|
|
#endif /* _SI5351_H */
|