14 Commity (fc1aa2848bcf0353833c9d6d180e53fb00bbc63c)

Autor	SHA1	Wiadomość	Data
morris	fc1aa2848b	rgb_lcd: support yuv converter	2022-08-17 06:33:06 +00:00
Omar Chebib	8fae0f0753	G0: Support Xtensa targets for G0-only compilation ... G0-only example now supports Xtensa targets. This means that G0 layer does not depend on G1+ layers anymore	2022-06-20 11:34:20 +00:00
morris	843279d287	rgb_lcd: support fractional clock divisor	2022-06-14 02:20:47 +00:00
morris	9422fe077a	lcd: support I2S1 LCD mode on esp32	2022-03-14 13:55:01 +08:00
morris	2ab7d92785	lcd: improve LL driver according to TRM	2022-01-24 18:58:37 +08:00
morris	89e37837d0	lcd: rgb pclk idle default to low	2021-11-30 13:44:06 +08:00
morris	e09e39c94f	lcd: unify callback prototype	2021-10-02 14:23:31 +08:00
morris	02e470bc50	lcd: add pm lock	2021-09-08 11:34:46 +08:00
SalimTerryLi	874a720286	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci	2021-08-30 13:50:58 +08:00
morris	6fdc5877cd	lcd: support i80 LCD on esp32/s2/s3	2021-08-10 21:06:59 +08:00
morris	6352a7ee07	lcd_cam: new csv header file	2021-07-30 11:23:26 +08:00
morris	9afdf54748	hal: added HAL_ASSERT	2021-06-22 11:28:01 +08:00
morris	e10202a608	lcd: add esp_lcd component ... * Support intel 8080 LCD panel IO on ESP32-S3 * Support RGB LCD panel on ESP32-S3 * Support SPI && I2C LCD panel IO on all esp chips	2021-05-12 17:53:32 +08:00
morris	d0be56b8fe	lcd: add LL driver for esp32-s3	2021-03-13 22:31:30 +08:00