kopia lustrzana https://github.com/Hamlib/Hamlib
Start converting rigs/*
This commit does rigs/adat/, rigs/alinco/ and rigs/aor/.pull/1508/head
rodzic
4a1fa678ea
commit
02f0ad067a
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@ -1233,7 +1233,7 @@ int adat_send(RIG *pRig,
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char *pcData)
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char *pcData)
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{
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{
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int nRC = RIG_OK;
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int nRC = RIG_OK;
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struct rig_state *pRigState = &pRig->state;
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hamlib_port_t *pRigPort = RIGPORT(pRig);
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gFnLevel++;
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gFnLevel++;
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@ -1241,9 +1241,9 @@ int adat_send(RIG *pRig,
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"*** ADAT: %d %s (%s:%d): ENTRY. Params: pRig = %p, pcData = %s\n",
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"*** ADAT: %d %s (%s:%d): ENTRY. Params: pRig = %p, pcData = %s\n",
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gFnLevel, __func__, __FILE__, __LINE__, pRig, pcData);
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gFnLevel, __func__, __FILE__, __LINE__, pRig, pcData);
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rig_flush(&pRigState->rigport);
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rig_flush(pRigPort);
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nRC = write_block(&pRigState->rigport, (unsigned char *) pcData,
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nRC = write_block(pRigPort, (unsigned char *) pcData,
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strlen(pcData));
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strlen(pcData));
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rig_debug(RIG_DEBUG_TRACE,
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rig_debug(RIG_DEBUG_TRACE,
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@ -1264,7 +1264,6 @@ int adat_receive(RIG *pRig,
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char *pcData)
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char *pcData)
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{
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{
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int nRC = RIG_OK;
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int nRC = RIG_OK;
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struct rig_state *pRigState = &pRig->state;
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gFnLevel++;
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gFnLevel++;
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@ -1272,7 +1271,7 @@ int adat_receive(RIG *pRig,
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"*** ADAT: %d %s (%s:%d): ENTRY. Params: pRig = %p\n",
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"*** ADAT: %d %s (%s:%d): ENTRY. Params: pRig = %p\n",
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gFnLevel, __func__, __FILE__, __LINE__, pRig);
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gFnLevel, __func__, __FILE__, __LINE__, pRig);
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nRC = read_string(&pRigState->rigport, (unsigned char *) pcData, ADAT_RESPSZ,
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nRC = read_string(RIGPORT(pRig), (unsigned char *) pcData, ADAT_RESPSZ,
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ADAT_EOL, 1, 0, 1);
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ADAT_EOL, 1, 0, 1);
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if (nRC > 0)
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if (nRC > 0)
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@ -1428,7 +1427,6 @@ int adat_get_single_cmd_result(RIG *pRig)
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else
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else
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{
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{
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adat_priv_data_ptr pPriv = (adat_priv_data_ptr) pRig->state.priv;
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adat_priv_data_ptr pPriv = (adat_priv_data_ptr) pRig->state.priv;
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struct rig_state *pRigState = &pRig->state;
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nRC = adat_send(pRig, pPriv->acCmd);
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nRC = adat_send(pRig, pPriv->acCmd);
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@ -1526,7 +1524,7 @@ int adat_get_single_cmd_result(RIG *pRig)
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}
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}
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}
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}
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rig_flush(&pRigState->rigport);
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rig_flush(RIGPORT(pRig));
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pPriv->nRC = nRC;
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pPriv->nRC = nRC;
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}
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}
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@ -301,7 +301,7 @@ int dx77_transaction(RIG *rig,
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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hamlib_port_t *rp = RIGPORT(rig);
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char echobuf[BUFSZ + 1];
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char echobuf[BUFSZ + 1];
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if (cmd == NULL)
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if (cmd == NULL)
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@ -311,11 +311,9 @@ int dx77_transaction(RIG *rig,
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return -RIG_EINTERNAL;
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return -RIG_EINTERNAL;
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}
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}
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rs = &rig->state;
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rig_flush(rp);
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rig_flush(&rs->rigport);
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retval = write_block(rp, (unsigned char *) cmd, cmd_len);
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retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
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{
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@ -326,7 +324,7 @@ int dx77_transaction(RIG *rig,
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* Transceiver sends an echo of cmd followed by a CR/LF
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* Transceiver sends an echo of cmd followed by a CR/LF
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* TODO: check whether cmd and echobuf match (optional)
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* TODO: check whether cmd and echobuf match (optional)
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*/
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*/
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retval = read_string(&rs->rigport, (unsigned char *) echobuf, BUFSZ,
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retval = read_string(rp, (unsigned char *) echobuf, BUFSZ,
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LF, strlen(LF), 0, 1);
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LF, strlen(LF), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -343,7 +341,7 @@ int dx77_transaction(RIG *rig,
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/* no data expected, check for OK returned */
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/* no data expected, check for OK returned */
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if (data == NULL)
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if (data == NULL)
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{
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{
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retval = read_string(&rs->rigport, (unsigned char *) echobuf, BUFSZ,
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retval = read_string(rp, (unsigned char *) echobuf, BUFSZ,
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LF, strlen(LF), 0, 1);
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LF, strlen(LF), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -365,7 +363,7 @@ int dx77_transaction(RIG *rig,
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}
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}
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}
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}
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retval = read_string(&rs->rigport, (unsigned char *) data, BUFSZ,
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retval = read_string(rp, (unsigned char *) data, BUFSZ,
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LF, strlen(LF), 0, 1);
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LF, strlen(LF), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -235,7 +235,7 @@ int dxsr8_transaction(RIG *rig,
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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hamlib_port_t *rp = RIGPORT(rig);
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char replybuf[BUFSZ + 1];
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char replybuf[BUFSZ + 1];
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int reply_len;
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int reply_len;
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@ -246,11 +246,9 @@ int dxsr8_transaction(RIG *rig,
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return -RIG_EINTERNAL;
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return -RIG_EINTERNAL;
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}
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}
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rs = &rig->state;
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rig_flush(rp);
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rig_flush(&rs->rigport);
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retval = write_block(rp, (unsigned char *) cmd, cmd_len);
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retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
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{
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@ -261,7 +259,7 @@ int dxsr8_transaction(RIG *rig,
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* Transceiver sends an echo of cmd followed by a CR/LF
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* Transceiver sends an echo of cmd followed by a CR/LF
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* TODO: check whether cmd and echobuf match (optional)
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* TODO: check whether cmd and echobuf match (optional)
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*/
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*/
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retval = read_string(&rs->rigport, (unsigned char *) replybuf, BUFSZ,
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retval = read_string(rp, (unsigned char *) replybuf, BUFSZ,
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LF, strlen(LF), 0, 1);
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LF, strlen(LF), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -270,7 +268,7 @@ int dxsr8_transaction(RIG *rig,
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}
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}
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retval = read_string(&rs->rigport, (unsigned char *) replybuf, BUFSZ,
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retval = read_string(rp, (unsigned char *) replybuf, BUFSZ,
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LF, strlen(LF), 0, 1);
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LF, strlen(LF), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -67,15 +67,13 @@ static int aor_transaction(RIG *rig, const char *cmd, int cmd_len, char *data,
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int *data_len)
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int *data_len)
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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hamlib_port_t *rp = RIGPORT(rig);
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char ackbuf[BUFSZ];
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char ackbuf[BUFSZ];
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int ack_len;
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int ack_len;
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rs = &rig->state;
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rig_flush(rp);
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rig_flush(&rs->rigport);
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retval = write_block(rp, (unsigned char *) cmd, cmd_len);
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retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
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{
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@ -95,7 +93,7 @@ static int aor_transaction(RIG *rig, const char *cmd, int cmd_len, char *data,
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/*
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/*
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* Do wait for a reply
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* Do wait for a reply
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*/
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*/
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retval = read_string(&rs->rigport, (unsigned char *) data, BUFSZ, EOM,
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retval = read_string(rp, (unsigned char *) data, BUFSZ, EOM,
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strlen(EOM), 0, 1);
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strlen(EOM), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -124,7 +122,7 @@ static int aor_transaction(RIG *rig, const char *cmd, int cmd_len, char *data,
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if (retval >= 1 && data[0] == '?')
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if (retval >= 1 && data[0] == '?')
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{
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{
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/* command failed? resync with radio */
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/* command failed? resync with radio */
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write_block(&rs->rigport, (unsigned char *) EOM, 1);
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write_block(rp, (unsigned char *) EOM, 1);
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return -RIG_EPROTO;
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return -RIG_EPROTO;
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}
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}
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@ -144,7 +142,7 @@ int aor_close(RIG *rig)
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* since no reply is to be expected.
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* since no reply is to be expected.
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*/
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*/
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return write_block(&rig->state.rigport, (unsigned char *) "EX" EOM, 3);
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return write_block(RIGPORT(rig), (unsigned char *) "EX" EOM, 3);
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}
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}
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static int format_freq(char *buf, int buf_len, freq_t freq)
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static int format_freq(char *buf, int buf_len, freq_t freq)
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@ -1423,7 +1421,7 @@ int aor_get_chan_all_cb(RIG *rig, vfo_t vfo, chan_cb_t chan_cb, rig_ptr_t arg)
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/*
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/*
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* get next line
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* get next line
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*/
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*/
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retval = read_string(&rig->state.rigport, (unsigned char *) chanbuf, BUFSZ,
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retval = read_string(RIGPORT(rig), (unsigned char *) chanbuf, BUFSZ,
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EOM, strlen(EOM), 0, 1);
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EOM, strlen(EOM), 0, 1);
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if (retval < 0)
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if (retval < 0)
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@ -185,13 +185,11 @@ static int ar3k_transaction(RIG *rig, const char *cmd, int cmd_len, char *data,
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int *data_len)
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int *data_len)
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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hamlib_port_t *rp = RIGPORT(rig);
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rs = &rig->state;
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rig_flush(rp);
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rig_flush(&rs->rigport);
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retval = write_block(rp, (unsigned char *) cmd, cmd_len);
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retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
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{
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@ -204,7 +202,7 @@ static int ar3k_transaction(RIG *rig, const char *cmd, int cmd_len, char *data,
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return RIG_OK;
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return RIG_OK;
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}
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}
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retval = read_string(&rs->rigport, (unsigned char *) data, BUFSZ,
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retval = read_string(rp, (unsigned char *) data, BUFSZ,
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EOM, strlen(EOM), 0, 1);
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EOM, strlen(EOM), 0, 1);
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if (retval == -RIG_ETIMEOUT)
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if (retval == -RIG_ETIMEOUT)
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@ -216,22 +216,20 @@ static int ar3030_transaction(RIG *rig, const char *cmd, int cmd_len,
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char *data, int *data_len)
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char *data, int *data_len)
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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hamlib_port_t *rp = RIGPORT(rig);
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int retry = 3;
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int retry = 3;
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char tmpdata[BUFSZ];
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char tmpdata[BUFSZ];
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rs = &rig->state;
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if (data == NULL)
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if (data == NULL)
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{
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{
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data = tmpdata;
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data = tmpdata;
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}
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}
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rig_flush(&rs->rigport);
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rig_flush(rp);
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do
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do
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{
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{
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retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
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retval = write_block(rp, (unsigned char *) cmd, cmd_len);
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
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{
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@ -242,7 +240,7 @@ static int ar3030_transaction(RIG *rig, const char *cmd, int cmd_len,
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if (data)
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if (data)
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{
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{
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/* expecting 0x0d0x0a on all commands so wait for the 0x0a */
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/* expecting 0x0d0x0a on all commands so wait for the 0x0a */
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retval = read_string(&rs->rigport, (unsigned char *) data, BUFSZ,
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retval = read_string(rp, (unsigned char *) data, BUFSZ,
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"\x0a", 1, 0, 1);
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"\x0a", 1, 0, 1);
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if (retval == -RIG_ETIMEOUT)
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if (retval == -RIG_ETIMEOUT)
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@ -307,12 +305,10 @@ int ar3030_cleanup(RIG *rig)
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int ar3030_close(RIG *rig)
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int ar3030_close(RIG *rig)
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{
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{
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int retval;
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int retval;
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struct rig_state *rs;
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rig_debug(RIG_DEBUG_TRACE, "%s:\n", __func__);
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rig_debug(RIG_DEBUG_TRACE, "%s:\n", __func__);
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rs = &rig->state;
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rig_flush(RIGPORT(rig));
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rig_flush(&rs->rigport);
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retval = ar3030_transaction(rig, "Q" CR, strlen("Q" CR), NULL, NULL);
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retval = ar3030_transaction(rig, "Q" CR, strlen("Q" CR), NULL, NULL);
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rig_debug(RIG_DEBUG_TRACE, "%s: retval=%d\n", __func__, retval);
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rig_debug(RIG_DEBUG_TRACE, "%s: retval=%d\n", __func__, retval);
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@ -66,7 +66,7 @@
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static int rxr_writeByte(RIG *rig, unsigned char c)
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static int rxr_writeByte(RIG *rig, unsigned char c)
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{
|
{
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return write_block(&rig->state.rigport, &c, 1);
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return write_block(RIGPORT(rig), &c, 1);
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}
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}
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@ -75,14 +75,14 @@ static int rxr_readByte(RIG *rig)
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unsigned char response[1];
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unsigned char response[1];
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const unsigned char buf[] = {0x71}; // Read command
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const unsigned char buf[] = {0x71}; // Read command
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int retval;
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int retval;
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retval = write_block(&rig->state.rigport, buf, 1);
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retval = write_block(RIGPORT(rig), buf, 1);
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|
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if (retval != RIG_OK)
|
if (retval != RIG_OK)
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{
|
{
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return retval;
|
return retval;
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}
|
}
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|
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retval = read_block(&rig->state.rigport, response, 1);
|
retval = read_block(RIGPORT(rig), response, 1);
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|
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if (retval != RIG_OK)
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if (retval != RIG_OK)
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{
|
{
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@ -270,16 +270,17 @@ static void Execute_Routine_6_1(RIG *rig, char mp, char ad, int numSteps)
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static int Execute_Routine_14(RIG *rig)
|
static int Execute_Routine_14(RIG *rig)
|
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{
|
{
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unsigned char response[1];
|
unsigned char response[1];
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hamlib_port_t *rp = RIGPORT(rig);
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const unsigned char buf[] = {0x2e}; // Read command
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const unsigned char buf[] = {0x2e}; // Read command
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int retval;
|
int retval;
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retval = write_block(&rig->state.rigport, buf, 1);
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retval = write_block(rp, buf, 1);
|
||||||
|
|
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if (retval != RIG_OK)
|
if (retval != RIG_OK)
|
||||||
{
|
{
|
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return retval;
|
return retval;
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}
|
}
|
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|
|
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retval = read_block(&rig->state.rigport, response, 1);
|
retval = read_block(rp, response, 1);
|
||||||
|
|
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if (retval != RIG_OK)
|
if (retval != RIG_OK)
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{
|
{
|
||||||
|
|
|
@ -266,7 +266,7 @@ static int ar7030p_init(RIG *rig)
|
||||||
|
|
||||||
rig->state.priv = (void *) priv;
|
rig->state.priv = (void *) priv;
|
||||||
|
|
||||||
rig->state.rigport.type.rig = RIG_PORT_SERIAL;
|
RIGPORT(rig)->type.rig = RIG_PORT_SERIAL;
|
||||||
|
|
||||||
priv->powerstat = RIG_POWER_ON;
|
priv->powerstat = RIG_POWER_ON;
|
||||||
priv->bank = 0;
|
priv->bank = 0;
|
||||||
|
|
|
@ -56,7 +56,7 @@ int NOP(RIG *rig, unsigned char x)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -78,7 +78,7 @@ int SRH(RIG *rig, unsigned char x)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -108,7 +108,7 @@ int PGE(RIG *rig, enum PAGE_e page)
|
||||||
case EEPROM2:
|
case EEPROM2:
|
||||||
case EEPROM3:
|
case EEPROM3:
|
||||||
case ROM:
|
case ROM:
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -141,7 +141,7 @@ int ADR(RIG *rig, unsigned char x)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -163,7 +163,7 @@ int ADH(RIG *rig, unsigned char x)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -187,7 +187,7 @@ int WRD(RIG *rig, unsigned char out)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -210,7 +210,7 @@ int MSK(RIG *rig, unsigned char mask)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -248,7 +248,7 @@ int EXE(RIG *rig, enum ROUTINE_e routine)
|
||||||
case DISP_BUFF:
|
case DISP_BUFF:
|
||||||
case READ_SIGNAL:
|
case READ_SIGNAL:
|
||||||
case READ_BTNS:
|
case READ_BTNS:
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -280,7 +280,7 @@ int RDD(RIG *rig, unsigned char len)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -288,7 +288,7 @@ int RDD(RIG *rig, unsigned char len)
|
||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
rc = read_block(&rig->state.rigport, (char *) &inChr, len);
|
rc = read_block(RIGPORT(rig), (char *) &inChr, len);
|
||||||
|
|
||||||
if (1 != rc)
|
if (1 != rc)
|
||||||
{
|
{
|
||||||
|
@ -321,7 +321,7 @@ int LOC(RIG *rig, enum LOCK_LVL_e level)
|
||||||
case LOCK_1:
|
case LOCK_1:
|
||||||
case LOCK_2:
|
case LOCK_2:
|
||||||
case LOCK_3:
|
case LOCK_3:
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -366,7 +366,7 @@ int BUT(RIG *rig, enum BUTTON_e button)
|
||||||
case BTN_STAR:
|
case BTN_STAR:
|
||||||
case BTN_MENU:
|
case BTN_MENU:
|
||||||
case BTN_POWER:
|
case BTN_POWER:
|
||||||
rc = write_block(&rig->state.rigport, (char *) &op, 1);
|
rc = write_block(RIGPORT(rig), (char *) &op, 1);
|
||||||
|
|
||||||
if (0 != rc)
|
if (0 != rc)
|
||||||
{
|
{
|
||||||
|
@ -403,7 +403,7 @@ int execRoutine(RIG *rig, enum ROUTINE_e rtn)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(RIGPORT(rig), &v, 1))
|
||||||
{
|
{
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
|
||||||
|
@ -428,6 +428,7 @@ int execRoutine(RIG *rig, enum ROUTINE_e rtn)
|
||||||
static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
||||||
{
|
{
|
||||||
int rc = RIG_OK;
|
int rc = RIG_OK;
|
||||||
|
hamlib_port_t *rp = RIGPORT(rig);
|
||||||
unsigned char v;
|
unsigned char v;
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
@ -440,7 +441,7 @@ static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
||||||
{
|
{
|
||||||
v = PGE(page);
|
v = PGE(page);
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(rp, &v, 1))
|
||||||
{
|
{
|
||||||
curPage = page;
|
curPage = page;
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
@ -457,7 +458,7 @@ static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
||||||
{
|
{
|
||||||
v = SRH((0x0f0 & addr) >> 4);
|
v = SRH((0x0f0 & addr) >> 4);
|
||||||
|
|
||||||
rc = write_block(&rig->state.rigport, &v, 1);
|
rc = write_block(rp, &v, 1);
|
||||||
|
|
||||||
if (rc != RIG_OK)
|
if (rc != RIG_OK)
|
||||||
{
|
{
|
||||||
|
@ -466,13 +467,13 @@ static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
||||||
|
|
||||||
v = ADR((0x00f & addr));
|
v = ADR((0x00f & addr));
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(rp, &v, 1))
|
||||||
{
|
{
|
||||||
if (0xff < addr)
|
if (0xff < addr)
|
||||||
{
|
{
|
||||||
v = ADH((0xf00 & addr) >> 8);
|
v = ADH((0xf00 & addr) >> 8);
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(rp, &v, 1))
|
||||||
{
|
{
|
||||||
curAddr = addr;
|
curAddr = addr;
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
@ -525,6 +526,7 @@ static int setAddr(RIG *rig, enum PAGE_e page, unsigned int addr)
|
||||||
int writeByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char x)
|
int writeByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char x)
|
||||||
{
|
{
|
||||||
int rc;
|
int rc;
|
||||||
|
hamlib_port_t *rp = RIGPORT(rig);
|
||||||
unsigned char hi = SRH((x & 0xf0) >> 4);
|
unsigned char hi = SRH((x & 0xf0) >> 4);
|
||||||
unsigned char lo = WRD(x & 0x0f);
|
unsigned char lo = WRD(x & 0x0f);
|
||||||
|
|
||||||
|
@ -536,9 +538,9 @@ int writeByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char x)
|
||||||
{
|
{
|
||||||
rc = -RIG_EIO;
|
rc = -RIG_EIO;
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &hi, 1))
|
if (0 == write_block(rp, &hi, 1))
|
||||||
{
|
{
|
||||||
if (0 == write_block(&rig->state.rigport, &lo, 1))
|
if (0 == write_block(rp, &lo, 1))
|
||||||
{
|
{
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
curAddr++;
|
curAddr++;
|
||||||
|
@ -667,6 +669,7 @@ int writeInt(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned int x)
|
||||||
int readByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char *x)
|
int readByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char *x)
|
||||||
{
|
{
|
||||||
int rc = RIG_OK;
|
int rc = RIG_OK;
|
||||||
|
hamlib_port_t *rp = RIGPORT(rig);
|
||||||
unsigned char v = RDD(1); // Read command
|
unsigned char v = RDD(1); // Read command
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
@ -678,9 +681,9 @@ int readByte(RIG *rig, enum PAGE_e page, unsigned int addr, unsigned char *x)
|
||||||
{
|
{
|
||||||
rc = -RIG_EIO;
|
rc = -RIG_EIO;
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(rp, &v, 1))
|
||||||
{
|
{
|
||||||
if (1 == read_block(&rig->state.rigport, x, 1))
|
if (1 == read_block(rp, x, 1))
|
||||||
{
|
{
|
||||||
curAddr++;
|
curAddr++;
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
@ -841,7 +844,7 @@ int readSignal(RIG *rig, unsigned char *x)
|
||||||
|
|
||||||
if (RIG_OK == rc)
|
if (RIG_OK == rc)
|
||||||
{
|
{
|
||||||
if (1 == read_block(&rig->state.rigport, x, 1))
|
if (1 == read_block(RIGPORT(rig), x, 1))
|
||||||
{
|
{
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
|
||||||
|
@ -867,7 +870,7 @@ int flushBuffer(RIG *rig)
|
||||||
|
|
||||||
assert(NULL != rig);
|
assert(NULL != rig);
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(RIGPORT(rig), &v, 1))
|
||||||
{
|
{
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
}
|
}
|
||||||
|
@ -896,7 +899,7 @@ int lockRx(RIG *rig, enum LOCK_LVL_e level)
|
||||||
{
|
{
|
||||||
v = LOC(level);
|
v = LOC(level);
|
||||||
|
|
||||||
if (0 == write_block(&rig->state.rigport, &v, 1))
|
if (0 == write_block(RIGPORT(rig), &v, 1))
|
||||||
{
|
{
|
||||||
rc = RIG_OK;
|
rc = RIG_OK;
|
||||||
|
|
||||||
|
|
|
@ -274,15 +274,13 @@ static int sr2200_transaction(RIG *rig, const char *cmd, int cmd_len,
|
||||||
char *data, int *data_len)
|
char *data, int *data_len)
|
||||||
{
|
{
|
||||||
int retval;
|
int retval;
|
||||||
struct rig_state *rs;
|
hamlib_port_t *rp = RIGPORT(rig);
|
||||||
char ackbuf[BUFSZ];
|
char ackbuf[BUFSZ];
|
||||||
int ack_len;
|
int ack_len;
|
||||||
|
|
||||||
rs = &rig->state;
|
rig_flush(rp);
|
||||||
|
|
||||||
rig_flush(&rs->rigport);
|
retval = write_block(rp, (unsigned char *) cmd, cmd_len);
|
||||||
|
|
||||||
retval = write_block(&rs->rigport, (unsigned char *) cmd, cmd_len);
|
|
||||||
|
|
||||||
if (retval != RIG_OK)
|
if (retval != RIG_OK)
|
||||||
{
|
{
|
||||||
|
@ -302,7 +300,7 @@ static int sr2200_transaction(RIG *rig, const char *cmd, int cmd_len,
|
||||||
/*
|
/*
|
||||||
* Do wait for a reply
|
* Do wait for a reply
|
||||||
*/
|
*/
|
||||||
retval = read_string(&rs->rigport, (unsigned char *) data, BUFSZ, EOM,
|
retval = read_string(rp, (unsigned char *) data, BUFSZ, EOM,
|
||||||
strlen(EOM), 0, 1);
|
strlen(EOM), 0, 1);
|
||||||
|
|
||||||
if (retval < 0)
|
if (retval < 0)
|
||||||
|
@ -324,7 +322,7 @@ static int sr2200_transaction(RIG *rig, const char *cmd, int cmd_len,
|
||||||
if (data[0] == '?')
|
if (data[0] == '?')
|
||||||
{
|
{
|
||||||
/* command failed? resync with radio */
|
/* command failed? resync with radio */
|
||||||
write_block(&rs->rigport, (unsigned char *) EOM, 1);
|
write_block(rp, (unsigned char *) EOM, 1);
|
||||||
|
|
||||||
return -RIG_EPROTO;
|
return -RIG_EPROTO;
|
||||||
}
|
}
|
||||||
|
|
Ładowanie…
Reference in New Issue