kopia lustrzana https://github.com/kamocat/uSDX
Changed code from f051 to Black Pill f401
Marshal Horn
rodzic
c233964184
commit
d56a777629
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@ -158,38 +158,38 @@ void qei_lld_start(QEIDriver *qeip) {
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/* Clock activation and timer reset.*/
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#if STM32_QEI_USE_TIM1
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if (&QEID1 == qeip) {
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rccEnableTIM1();
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rccEnableTIM1(0);
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rccResetTIM1();
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}
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#endif
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#if STM32_QEI_USE_TIM2
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if (&QEID2 == qeip) {
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rccEnableTIM2();
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rccEnableTIM2(0);
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rccResetTIM2();
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}
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#endif
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#if STM32_QEI_USE_TIM3
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if (&QEID3 == qeip) {
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rccEnableTIM3();
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rccEnableTIM3(0);
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rccResetTIM3();
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}
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#endif
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#if STM32_QEI_USE_TIM4
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if (&QEID4 == qeip) {
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rccEnableTIM4();
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rccEnableTIM4(0);
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rccResetTIM4();
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}
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#endif
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#if STM32_QEI_USE_TIM5
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if (&QEID5 == qeip) {
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rccEnableTIM5();
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rccEnableTIM5(0);
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rccResetTIM5();
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}
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#endif
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#if STM32_QEI_USE_TIM8
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if (&QEID8 == qeip) {
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rccEnableTIM8();
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rccEnableTIM8(0);
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rccResetTIM8();
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}
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#endif
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@ -55,7 +55,7 @@ endif
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# Stack size to be allocated to the Cortex-M process stack. This stack is
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# the stack used by the main() thread.
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ifeq ($(USE_PROCESS_STACKSIZE),)
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USE_PROCESS_STACKSIZE = 0x100
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USE_PROCESS_STACKSIZE = 0x400
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endif
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# Stack size to the allocated to the Cortex-M main/exceptions stack. This
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@ -86,7 +86,7 @@ endif
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PROJECT = ch
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# Target settings.
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MCU = cortex-m0
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MCU = cortex-m4
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# Imported source files and paths.
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CHIBIOS := ../ChibiOS
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@ -97,20 +97,20 @@ DEPDIR := ./.dep
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# Licensing files.
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include $(CHIBIOS)/os/license/license.mk
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# Startup files.
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include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f0xx.mk
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include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f4xx.mk
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# HAL-OSAL files (optional).
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include $(CHIBIOS)/os/hal/hal.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F0xx/platform.mk
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include $(CHIBIOS)/os/hal/boards/uSDX/board.mk
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include $(CHIBIOS)/os/hal/ports/STM32/STM32F4xx/platform.mk
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include $(CHIBIOS)/os/hal/boards/BlackPill_F401/board.mk
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include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/nil/nil.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v6m.mk
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
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# Auto-build files in ./source recursively.
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include $(CHIBIOS)/tools/mk/autobuild.mk
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# Define linker script file here
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LDSCRIPT= $(STARTUPLD)/STM32F051x8.ld
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LDSCRIPT= $(STARTUPLD)/STM32F401xC.ld
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# C sources that can be compiled in ARM or THUMB mode depending on the global
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# setting.
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@ -1,5 +1,5 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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@ -15,12 +15,12 @@
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*/
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/**
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* @file nil/templates/chconf.h
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* @file rt/templates/chconf.h
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* @brief Configuration file template.
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* @details A copy of this file must be placed in each project directory, it
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* contains the application specific kernel settings.
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*
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* @addtogroup NIL_CONFIG
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* @addtogroup config
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* @details Kernel related settings and hooks.
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* @{
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*/
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@ -28,41 +28,12 @@
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#ifndef CHCONF_H
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#define CHCONF_H
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#define _CHIBIOS_NIL_CONF_
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#define _CHIBIOS_NIL_CONF_VER_4_0_
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#define _CHIBIOS_RT_CONF_
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#define _CHIBIOS_RT_CONF_VER_6_1_
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/*===========================================================================*/
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/**
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* @name Kernel parameters and options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief Maximum number of user threads in the application.
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* @note This number is not inclusive of the idle thread which is
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* implicitly handled.
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* @note Set this value to be exactly equal to the number of threads you
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* will use or you would be wasting RAM and cycles.
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* @note This values also defines the number of available priorities
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* (0..CH_CFG_MAX_THREADS-1).
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*/
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#if !defined(CH_CFG_MAX_THREADS)
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#define CH_CFG_MAX_THREADS 8
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#endif
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/**
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* @brief Auto starts threads when @p chSysInit() is invoked.
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*/
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#if !defined(CH_CFG_AUTOSTART_THREADS)
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#define CH_CFG_AUTOSTART_THREADS TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name System timer settings
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* @name System timers settings
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* @{
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*/
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/*===========================================================================*/
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@ -77,12 +48,27 @@
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/**
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* @brief System tick frequency.
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* @note This value together with the @p CH_CFG_ST_RESOLUTION
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* option defines the maximum amount of time allowed for
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* timeouts.
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* @details Frequency of the system timer that drives the system ticks. This
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* setting also defines the system tick time unit.
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*/
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#if !defined(CH_CFG_ST_FREQUENCY)
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#define CH_CFG_ST_FREQUENCY 1000
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#define CH_CFG_ST_FREQUENCY 10000
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#endif
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/**
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* @brief Time intervals data size.
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* @note Allowed values are 16, 32 or 64 bits.
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*/
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#if !defined(CH_CFG_INTERVALS_SIZE)
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#define CH_CFG_INTERVALS_SIZE 32
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#endif
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/**
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* @brief Time types data size.
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* @note Allowed values are 16 or 32 bits.
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*/
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#if !defined(CH_CFG_TIME_TYPES_SIZE)
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#define CH_CFG_TIME_TYPES_SIZE 32
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#endif
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/**
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@ -99,6 +85,63 @@
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/** @} */
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/*===========================================================================*/
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/**
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* @name Kernel parameters and options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief Round robin interval.
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* @details This constant is the number of system ticks allowed for the
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* threads before preemption occurs. Setting this value to zero
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* disables the preemption for threads with equal priority and the
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* round robin becomes cooperative. Note that higher priority
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* threads can still preempt, the kernel is always preemptive.
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* @note Disabling the round robin preemption makes the kernel more compact
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* and generally faster.
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* @note The round robin preemption is not supported in tickless mode and
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* must be set to zero in that case.
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*/
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#if !defined(CH_CFG_TIME_QUANTUM)
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#define CH_CFG_TIME_QUANTUM 0
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#endif
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/**
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* @brief Idle thread automatic spawn suppression.
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* @details When this option is activated the function @p chSysInit()
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* does not spawn the idle thread. The application @p main()
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* function becomes the idle thread and must implement an
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* infinite loop.
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*/
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#if !defined(CH_CFG_NO_IDLE_THREAD)
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#define CH_CFG_NO_IDLE_THREAD FALSE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name Performance options
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* @{
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*/
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/*===========================================================================*/
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/**
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* @brief OS optimization.
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* @details If enabled then time efficient rather than space efficient code
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* is used when two possible implementations exist.
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*
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* @note This is not related to the compiler optimization options.
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_CFG_OPTIMIZE_SPEED)
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#define CH_CFG_OPTIMIZE_SPEED TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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/**
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* @name Subsystem options
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@ -106,6 +149,38 @@
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*/
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/*===========================================================================*/
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/**
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* @brief Time Measurement APIs.
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* @details If enabled then the time measurement APIs are included in
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* the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_CFG_USE_TM)
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#define CH_CFG_USE_TM TRUE
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#endif
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/**
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* @brief Time Stamps APIs.
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* @details If enabled then the time time stamps APIs are included in
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* the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_CFG_USE_TIMESTAMP)
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#define CH_CFG_USE_TIMESTAMP TRUE
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#endif
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/**
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* @brief Threads registry APIs.
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* @details If enabled then the registry APIs are included in the kernel.
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*
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_CFG_USE_REGISTRY)
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#define CH_CFG_USE_REGISTRY TRUE
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#endif
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/**
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* @brief Threads synchronization APIs.
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* @details If enabled then the @p chThdWait() function is included in
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@ -127,15 +202,63 @@
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#define CH_CFG_USE_SEMAPHORES TRUE
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#endif
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/**
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* @brief Semaphores queuing mode.
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* @details If enabled then the threads are enqueued on semaphores by
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* priority rather than in FIFO order.
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*
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* @note The default is @p FALSE. Enable this if you have special
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* requirements.
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* @note Requires @p CH_CFG_USE_SEMAPHORES.
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*/
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#if !defined(CH_CFG_USE_SEMAPHORES_PRIORITY)
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#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
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#endif
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/**
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* @brief Mutexes APIs.
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* @details If enabled then the mutexes APIs are included in the kernel.
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*
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* @note Feature not currently implemented.
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* @note The default is @p FALSE.
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* @note The default is @p TRUE.
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*/
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#if !defined(CH_CFG_USE_MUTEXES)
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#define CH_CFG_USE_MUTEXES FALSE
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#define CH_CFG_USE_MUTEXES TRUE
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#endif
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/**
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* @brief Enables recursive behavior on mutexes.
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* @note Recursive mutexes are heavier and have an increased
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* memory footprint.
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*
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* @note The default is @p FALSE.
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* @note Requires @p CH_CFG_USE_MUTEXES.
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*/
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#if !defined(CH_CFG_USE_MUTEXES_RECURSIVE)
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#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
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#endif
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/**
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* @brief Conditional Variables APIs.
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* @details If enabled then the conditional variables APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_MUTEXES.
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*/
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#if !defined(CH_CFG_USE_CONDVARS)
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#define CH_CFG_USE_CONDVARS TRUE
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#endif
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/**
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* @brief Conditional Variables APIs with timeout.
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* @details If enabled then the conditional variables APIs with timeout
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* specification are included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_CONDVARS.
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*/
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#if !defined(CH_CFG_USE_CONDVARS_TIMEOUT)
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#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
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#endif
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/**
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@ -148,6 +271,18 @@
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#define CH_CFG_USE_EVENTS TRUE
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#endif
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/**
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* @brief Events Flags APIs with timeout.
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* @details If enabled then the events APIs with timeout specification
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* are included in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_EVENTS.
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*/
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#if !defined(CH_CFG_USE_EVENTS_TIMEOUT)
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#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
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#endif
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/**
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* @brief Synchronous Messages APIs.
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* @details If enabled then the synchronous messages APIs are included
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@ -159,6 +294,32 @@
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#define CH_CFG_USE_MESSAGES TRUE
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#endif
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/**
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* @brief Synchronous Messages queuing mode.
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* @details If enabled then messages are served by priority rather than in
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* FIFO order.
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*
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* @note The default is @p FALSE. Enable this if you have special
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* requirements.
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* @note Requires @p CH_CFG_USE_MESSAGES.
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*/
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#if !defined(CH_CFG_USE_MESSAGES_PRIORITY)
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#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
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#endif
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/**
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* @brief Dynamic Threads APIs.
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* @details If enabled then the dynamic threads creation APIs are included
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* in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_WAITEXIT.
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* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
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*/
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#if !defined(CH_CFG_USE_DYNAMIC)
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#define CH_CFG_USE_DYNAMIC TRUE
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#endif
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/** @} */
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/*===========================================================================*/
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@ -212,6 +373,9 @@
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* in the kernel.
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*
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* @note The default is @p TRUE.
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* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
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* @p CH_CFG_USE_SEMAPHORES.
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* @note Mutexes are recommended.
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*/
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#if !defined(CH_CFG_USE_HEAP)
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#define CH_CFG_USE_HEAP TRUE
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@ -229,7 +393,7 @@
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#endif
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/**
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* @brief Objects FIFOs APIs.
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* @brief Objects FIFOs APIs.
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* @details If enabled then the objects FIFOs APIs are included
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* in the kernel.
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*
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@ -350,7 +514,7 @@
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/**
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* @brief Enables factory for Pipes.
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*/
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#if !defined(CH_CFG_FACTORY_PIPES)
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#if !defined(CH_CFG_FACTORY_PIPES) || defined(__DOXYGEN__)
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#define CH_CFG_FACTORY_PIPES TRUE
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#endif
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@ -366,7 +530,6 @@
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/**
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* @brief Debug option, kernel statistics.
|
||||
*
|
||||
* @note Feature not currently implemented.
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* @note The default is @p FALSE.
|
||||
*/
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#if !defined(CH_DBG_STATISTICS)
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@ -375,6 +538,8 @@
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/**
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* @brief Debug option, system state check.
|
||||
* @details If enabled the correct call protocol for system APIs is checked
|
||||
* at runtime.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
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@ -384,6 +549,8 @@
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/**
|
||||
* @brief Debug option, parameters checks.
|
||||
* @details If enabled then the checks on the API functions input
|
||||
* parameters are activated.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
|
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@ -392,7 +559,10 @@
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#endif
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/**
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* @brief System assertions.
|
||||
* @brief Debug option, consistency checks.
|
||||
* @details If enabled then all the assertions in the kernel code are
|
||||
* activated. This includes consistency checks inside the kernel,
|
||||
* runtime anomalies and port-defined checks.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
|
|
@ -401,14 +571,63 @@
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|||
#endif
|
||||
|
||||
/**
|
||||
* @brief Stack check.
|
||||
* @brief Debug option, trace buffer.
|
||||
* @details If enabled then the trace buffer is activated.
|
||||
*
|
||||
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_MASK)
|
||||
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Trace buffer entries.
|
||||
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||
*/
|
||||
#if !defined(CH_DBG_TRACE_BUFFER_SIZE)
|
||||
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stack checks.
|
||||
* @details If enabled then a runtime stack check is performed.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note The stack check is performed in a architecture/port dependent way.
|
||||
* It may not be implemented or some ports.
|
||||
* @note The default failure mode is to halt the system with the global
|
||||
* @p panic_msg variable set to @p NULL.
|
||||
*/
|
||||
#if !defined(CH_DBG_ENABLE_STACK_CHECK)
|
||||
#define CH_DBG_ENABLE_STACK_CHECK FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, stacks initialization.
|
||||
* @details If enabled then the threads working area is filled with a byte
|
||||
* value when a thread is created. This can be useful for the
|
||||
* runtime measurement of the used stack.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(CH_DBG_FILL_THREADS)
|
||||
#define CH_DBG_FILL_THREADS FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief Debug option, threads profiling.
|
||||
* @details If enabled then a field is added to the @p thread_t structure that
|
||||
* counts the system ticks occurred while executing the thread.
|
||||
*
|
||||
* @note The default is @p FALSE.
|
||||
* @note This debug option is not currently compatible with the
|
||||
* tickless mode.
|
||||
*/
|
||||
#if !defined(CH_DBG_THREADS_PROFILING)
|
||||
#define CH_DBG_THREADS_PROFILING FALSE
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
@ -418,31 +637,69 @@
|
|||
*/
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief System structure extension.
|
||||
* @details User fields added to the end of the @p ch_system_t structure.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief System initialization hook.
|
||||
* @details User initialization code added to the @p chSysInit() function
|
||||
* just before interrupts are enabled globally.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_INIT_HOOK() { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads descriptor structure extension.
|
||||
* @details User fields added to the end of the @p thread_t structure.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXT_FIELDS \
|
||||
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||
/* Add threads custom fields here.*/
|
||||
|
||||
/**
|
||||
* @brief Threads initialization hook.
|
||||
* @details User initialization code added to the @p _thread_init() function.
|
||||
*
|
||||
* @note It is invoked from within @p _thread_init() and implicitly from all
|
||||
* the threads creation APIs.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) { \
|
||||
/* Add custom threads initialization code here.*/ \
|
||||
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||
/* Add threads initialization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Threads finalization hook.
|
||||
* @details User finalization code added to the @p chThdExit() API.
|
||||
*/
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) {}
|
||||
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||
/* Add threads finalization code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Context switch hook.
|
||||
* @details This hook is invoked just before switching between threads.
|
||||
*/
|
||||
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||
/* Context switch code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR enter hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||
/* IRQ prologue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief ISR exit hook.
|
||||
*/
|
||||
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||
/* IRQ epilogue code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle thread enter hook.
|
||||
|
|
@ -451,6 +708,7 @@
|
|||
* @note This macro can be used to activate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||
/* Idle-enter code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
@ -460,18 +718,48 @@
|
|||
* @note This macro can be used to deactivate a power saving mode.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||
/* Idle-leave code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Idle Loop hook.
|
||||
* @details This hook is continuously invoked by the idle thread loop.
|
||||
*/
|
||||
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||
/* Idle loop code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System tick event hook.
|
||||
* @details This hook is invoked in the system tick handler immediately
|
||||
* after processing the virtual timers queue.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||
/* System tick event code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System halt hook.
|
||||
* @details This hook is invoked in case to a system halting error before
|
||||
* the system is halted.
|
||||
*/
|
||||
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||
/* System halt code here.*/ \
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Trace hook.
|
||||
* @details This hook is invoked each time a new record is written in the
|
||||
* trace buffer.
|
||||
*/
|
||||
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||
/* Trace code here.*/ \
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Port-specific settings (override port settings defaulted in nilcore.h). */
|
||||
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||
/*===========================================================================*/
|
||||
|
||||
#endif /* CHCONF_H */
|
||||
|
|
|
|||
|
|
@ -65,7 +65,7 @@
|
|||
* @brief Enables the DAC subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_DAC TRUE
|
||||
#define HAL_USE_DAC FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -79,7 +79,7 @@
|
|||
* @brief Enables the GPT subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_GPT TRUE
|
||||
#define HAL_USE_GPT FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -100,7 +100,7 @@
|
|||
* @brief Enables the ICU subsystem.
|
||||
*/
|
||||
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||
#define HAL_USE_ICU FALSE
|
||||
#define HAL_USE_ICU TRUE
|
||||
#endif
|
||||
|
||||
/**
|
||||
|
|
@ -225,7 +225,7 @@
|
|||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__)
|
||||
#define PAL_USE_WAIT TRUE
|
||||
#define PAL_USE_WAIT FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
@ -305,7 +305,7 @@
|
|||
* @note Disabling this option saves both code and data space.
|
||||
*/
|
||||
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||
#define DAC_USE_MUTUAL_EXCLUSION FALSE
|
||||
#define DAC_USE_MUTUAL_EXCLUSION TRUE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
|
|
|
|||
|
|
@ -18,75 +18,79 @@
|
|||
#define MCUCONF_H
|
||||
|
||||
/*
|
||||
* STM32F0xx drivers configuration.
|
||||
* STM32F4xx drivers configuration.
|
||||
* The following settings override the default settings present in
|
||||
* the various device driver implementation headers.
|
||||
* Note that the settings for each driver only have effect if the whole
|
||||
* driver is enabled in halconf.h.
|
||||
*
|
||||
* IRQ priorities:
|
||||
* 3...0 Lowest...Highest.
|
||||
* 15...0 Lowest...Highest.
|
||||
*
|
||||
* DMA priorities:
|
||||
* 0...3 Lowest...Highest.
|
||||
*/
|
||||
|
||||
#define STM32F0xx_MCUCONF
|
||||
#define STM32F4xx_MCUCONF
|
||||
|
||||
/*
|
||||
* HAL driver system settings.
|
||||
*/
|
||||
#define STM32_NO_INIT FALSE
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED TRUE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_CLOCK48_REQUIRED TRUE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||
#define STM32_PLLM_VALUE 8
|
||||
#define STM32_PLLN_VALUE 336
|
||||
#define STM32_PLLP_VALUE 4
|
||||
#define STM32_PLLQ_VALUE 7
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE1 STM32_PPRE1_DIV2
|
||||
#define STM32_PPRE2 STM32_PPRE2_DIV1
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
#define STM32_RTCPRE_VALUE 8
|
||||
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
|
||||
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
|
||||
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
|
||||
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
|
||||
#define STM32_I2SSRC STM32_I2SSRC_CKIN
|
||||
#define STM32_PLLI2SN_VALUE 192
|
||||
#define STM32_PLLI2SR_VALUE 5
|
||||
#define STM32_PVD_ENABLE FALSE
|
||||
#define STM32_PLS STM32_PLS_LEV0
|
||||
#define STM32_HSI_ENABLED TRUE
|
||||
#define STM32_HSI14_ENABLED TRUE
|
||||
#define STM32_LSI_ENABLED TRUE
|
||||
#define STM32_HSE_ENABLED FALSE
|
||||
#define STM32_LSE_ENABLED FALSE
|
||||
#define STM32_SW STM32_SW_PLL
|
||||
#define STM32_PLLSRC STM32_PLLSRC_HSI_DIV2
|
||||
#define STM32_PREDIV_VALUE 1
|
||||
#define STM32_PLLMUL_VALUE 12
|
||||
#define STM32_HPRE STM32_HPRE_DIV1
|
||||
#define STM32_PPRE STM32_PPRE_DIV1
|
||||
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||
#define STM32_MCOPRE STM32_MCOPRE_DIV1
|
||||
#define STM32_PLLNODIV STM32_PLLNODIV_DIV2
|
||||
#define STM32_USBSW STM32_USBSW_HSI48
|
||||
#define STM32_CECSW STM32_CECSW_HSI
|
||||
#define STM32_I2C1SW STM32_I2C1SW_HSI
|
||||
#define STM32_USART1SW STM32_USART1SW_PCLK
|
||||
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||
#define STM32_BKPRAM_ENABLE FALSE
|
||||
|
||||
/*
|
||||
* IRQ system settings.
|
||||
*/
|
||||
#define STM32_IRQ_EXTI0_1_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI2_3_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI4_15_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI16_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI17_20_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI21_22_IRQ_PRIORITY 3
|
||||
#define STM32_IRQ_USART1_PRIORITY 3
|
||||
#define STM32_IRQ_USART2_PRIORITY 3
|
||||
#define STM32_IRQ_EXTI0_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI1_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI2_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI3_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI4_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI5_9_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI10_15_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI16_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI17_PRIORITY 15
|
||||
#define STM32_IRQ_EXTI18_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI19_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI20_PRIORITY 6
|
||||
#define STM32_IRQ_EXTI21_PRIORITY 15
|
||||
#define STM32_IRQ_EXTI22_PRIORITY 15
|
||||
|
||||
/*
|
||||
* ADC driver system settings.
|
||||
*/
|
||||
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
|
||||
#define STM32_ADC_USE_ADC1 TRUE
|
||||
#define STM32_ADC_ADC1_CKMODE STM32_ADC_CKMODE_ADCCLK
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
|
||||
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 2
|
||||
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||
|
||||
/*
|
||||
* DAC driver system settings.
|
||||
*/
|
||||
#define STM32_DAC_USE_DAC1_CH1 TRUE
|
||||
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 3
|
||||
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||
#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_ADC_IRQ_PRIORITY 6
|
||||
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
|
||||
|
||||
/*
|
||||
* GPT driver system settings.
|
||||
|
|
@ -94,105 +98,130 @@
|
|||
#define STM32_GPT_USE_TIM1 FALSE
|
||||
#define STM32_GPT_USE_TIM2 FALSE
|
||||
#define STM32_GPT_USE_TIM3 FALSE
|
||||
#define STM32_GPT_USE_TIM14 TRUE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_TIM14_IRQ_PRIORITY 2
|
||||
#define STM32_GPT_USE_TIM4 FALSE
|
||||
#define STM32_GPT_USE_TIM5 FALSE
|
||||
#define STM32_GPT_USE_TIM9 FALSE
|
||||
#define STM32_GPT_USE_TIM11 FALSE
|
||||
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
|
||||
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* I2C driver system settings.
|
||||
*/
|
||||
#define STM32_I2C_USE_I2C1 TRUE
|
||||
#define STM32_I2C_USE_I2C2 FALSE
|
||||
#define STM32_I2C_USE_I2C2 TRUE
|
||||
#define STM32_I2C_USE_I2C3 FALSE
|
||||
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 3
|
||||
#define STM32_I2C_USE_DMA TRUE
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
|
||||
#define STM32_I2C_I2C1_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C2_DMA_PRIORITY 3
|
||||
#define STM32_I2C_I2C3_DMA_PRIORITY 3
|
||||
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* I2S driver system settings.
|
||||
*/
|
||||
#define STM32_I2S_USE_SPI1 FALSE
|
||||
#define STM32_I2S_USE_SPI2 FALSE
|
||||
#define STM32_I2S_SPI1_MODE (STM32_I2S_MODE_MASTER | \
|
||||
STM32_I2S_MODE_RX)
|
||||
#define STM32_I2S_SPI2_MODE (STM32_I2S_MODE_MASTER | \
|
||||
STM32_I2S_MODE_RX)
|
||||
#define STM32_I2S_SPI1_IRQ_PRIORITY 2
|
||||
#define STM32_I2S_SPI2_IRQ_PRIORITY 2
|
||||
#define STM32_I2S_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_I2S_USE_SPI3 FALSE
|
||||
#define STM32_I2S_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_I2S_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_I2S_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_I2S_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_I2S_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_I2S_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ICU driver system settings.
|
||||
*/
|
||||
#define STM32_ICU_USE_TIM1 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE
|
||||
#define STM32_ICU_USE_TIM2 FALSE //FIXME: Used by another service?
|
||||
#define STM32_ICU_USE_TIM3 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 3
|
||||
#define STM32_ICU_USE_TIM4 FALSE
|
||||
#define STM32_ICU_USE_TIM5 TRUE
|
||||
#define STM32_ICU_USE_TIM9 FALSE
|
||||
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_ICU_TIM9_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* Quadrature Encoder driver settings
|
||||
*/
|
||||
#define STM32_QEI_USE_TIM1 TRUE
|
||||
#define STM32_QEI_USE_TIM1 FALSE
|
||||
#define STM32_QEI_USE_TIM2 FALSE
|
||||
#define STM32_QEI_USE_TIM3 FALSE
|
||||
#define STM32_QEI_USE_TIM3 TRUE
|
||||
#define STM32_QEI_USE_TIM4 FALSE
|
||||
#define STM32_QEI_USE_TIM5 FALSE
|
||||
#define STM32_QEI_USE_TIM8 FALSE
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define STM32_PWM_USE_ADVANCED FALSE
|
||||
#define STM32_PWM_USE_TIM1 FALSE
|
||||
#define STM32_PWM_USE_TIM1 TRUE
|
||||
#define STM32_PWM_USE_TIM2 FALSE
|
||||
#define STM32_PWM_USE_TIM3 TRUE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 3
|
||||
#define STM32_PWM_TIM3_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_PWM_USE_TIM3 FALSE
|
||||
#define STM32_PWM_USE_TIM4 FALSE
|
||||
#define STM32_PWM_USE_TIM5 FALSE
|
||||
#define STM32_PWM_USE_TIM9 TRUE
|
||||
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
|
||||
#define STM32_PWM_TIM9_IRQ_PRIORITY 7
|
||||
|
||||
/*
|
||||
* SERIAL driver system settings.
|
||||
*/
|
||||
#define STM32_SERIAL_USE_USART1 TRUE
|
||||
#define STM32_SERIAL_USE_USART2 FALSE
|
||||
#define STM32_SERIAL_USE_USART6 FALSE
|
||||
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||
#define STM32_SERIAL_USART6_PRIORITY 12
|
||||
|
||||
/*
|
||||
* SPI driver system settings.
|
||||
*/
|
||||
#define STM32_SPI_USE_SPI1 FALSE
|
||||
#define STM32_SPI_USE_SPI2 FALSE
|
||||
#define STM32_SPI_USE_SPI3 FALSE
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
|
||||
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
|
||||
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 2
|
||||
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* ST driver system settings.
|
||||
*/
|
||||
#define STM32_ST_IRQ_PRIORITY 2
|
||||
#define STM32_ST_IRQ_PRIORITY 8
|
||||
#define STM32_ST_USE_TIMER 2
|
||||
|
||||
/*
|
||||
|
|
@ -200,14 +229,31 @@
|
|||
*/
|
||||
#define STM32_UART_USE_USART1 FALSE
|
||||
#define STM32_UART_USE_USART2 FALSE
|
||||
#define STM32_UART_USE_USART6 FALSE
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
|
||||
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART6_IRQ_PRIORITY 12
|
||||
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
|
||||
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
|
||||
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
|
||||
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
|
||||
#define STM32_UART_USART6_DMA_PRIORITY 0
|
||||
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
#define STM32_USB_USE_OTG1 FALSE
|
||||
#define STM32_USB_OTG1_IRQ_PRIORITY 14
|
||||
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
|
||||
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
|
||||
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
|
||||
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
|
||||
|
||||
/*
|
||||
* WDG driver system settings.
|
||||
*/
|
||||
|
|
|
|||
40
code/main.c
40
code/main.c
|
|
@ -19,26 +19,22 @@
|
|||
#include "test.h"
|
||||
|
||||
/*
|
||||
* Example Thread
|
||||
* This is a periodic thread that does absolutely nothing except flashing
|
||||
* a LED.
|
||||
*/
|
||||
THD_WORKING_AREA(waThread1, 256);
|
||||
THD_FUNCTION(Thread1, arg) {
|
||||
static THD_WORKING_AREA(waThread1, 128);
|
||||
static THD_FUNCTION(Thread1, arg) {
|
||||
|
||||
(void)arg;
|
||||
|
||||
chRegSetThreadName("blinker");
|
||||
while (true) {
|
||||
serial_test("Hurray! Serial works\r\n");
|
||||
palSetPad(GPIOB, GPIOB_RX_EN);
|
||||
chThdSleepMilliseconds(500);
|
||||
palClearPad(GPIOB, GPIOB_RX_EN);
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Threads creation table, one entry per thread.
|
||||
*/
|
||||
THD_TABLE_BEGIN
|
||||
THD_TABLE_THREAD(3, "demo", waThread1, Thread1, NULL)
|
||||
THD_TABLE_END
|
||||
|
||||
/*
|
||||
* Application entry point.
|
||||
*/
|
||||
|
|
@ -54,10 +50,22 @@ int main(void) {
|
|||
halInit();
|
||||
chSysInit();
|
||||
|
||||
/* This is now the idle thread loop, you may perform here a low priority
|
||||
task but you must never try to sleep or wait in this loop. Note that
|
||||
this tasks runs at the lowest priority level so any instruction added
|
||||
here will be executed after all other tasks have been started.*/
|
||||
/*
|
||||
* Activates the serial driver 1 using the driver default configuration.
|
||||
*/
|
||||
sdStart(&SD1, NULL);
|
||||
|
||||
/*
|
||||
* Creates the example thread.
|
||||
*/
|
||||
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
|
||||
|
||||
/*
|
||||
* Normal main() thread activity, in this demo it does nothing except
|
||||
* sleeping in a loop and check the button state.
|
||||
*/
|
||||
while (true) {
|
||||
serial_test("Hurray! Serial works\r\n");
|
||||
chThdSleepMilliseconds(500);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
37
code/test.c
37
code/test.c
|
|
@ -20,15 +20,15 @@ void speaker_simple_test(float freq){
|
|||
.period = (1<<10), // 11 bits of data to give a 16 kHz update rate
|
||||
.callback = NULL,
|
||||
.channels = {
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_ACTIVE_HIGH, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL},
|
||||
{PWM_OUTPUT_DISABLED, NULL}
|
||||
},
|
||||
.cr2 = 0,
|
||||
.dier = 0,
|
||||
};
|
||||
pwmStart(&PWMD3, &spkr);
|
||||
pwmStart(&PWMD1, &spkr);
|
||||
const float tau = 6.2832;
|
||||
float step = freq * tau / 10e3;
|
||||
float x = 0;
|
||||
|
|
@ -37,7 +37,7 @@ void speaker_simple_test(float freq){
|
|||
if(x > tau)
|
||||
x -= tau;
|
||||
int16_t val = (1<<9)*(sin(x)+1);
|
||||
pwmEnableChannel(&PWMD3, 0, val);
|
||||
pwmEnableChannel(&PWMD1, 2, val);
|
||||
chThdSleepMicroseconds(100);
|
||||
}
|
||||
}
|
||||
|
|
@ -93,10 +93,10 @@ void encoder_test(void){
|
|||
.range = 1000
|
||||
};
|
||||
sdStart(&SD1, &scfg);
|
||||
qeiStart(&QEID1, &encoder);
|
||||
qeiEnable(&QEID1);
|
||||
qeiStart(&QEID3, &encoder);
|
||||
qeiEnable(&QEID3);
|
||||
while(1){
|
||||
int position = qeiGetPositionI(&QEID1);
|
||||
int position = qeiGetPositionI(&QEID3);
|
||||
char msg[20];
|
||||
int digits = format_int(msg, position);
|
||||
memcpy2(msg+digits, "\r\n", 2);
|
||||
|
|
@ -104,29 +104,6 @@ void encoder_test(void){
|
|||
chThdSleepMilliseconds(100);
|
||||
}
|
||||
}
|
||||
void dac_simple_test(float freq){
|
||||
const DACConfig dac1cfg1 = {
|
||||
.init = 2047U,
|
||||
.datamode = DAC_DHRM_12BIT_RIGHT,
|
||||
.cr = 0
|
||||
};
|
||||
dacStart(&DACD1, &dac1cfg1);
|
||||
const float tau = 6.2832;
|
||||
float step = freq * tau / 10e3;
|
||||
float x = 0;
|
||||
while(1){
|
||||
x += step;
|
||||
if(x > tau)
|
||||
x -= tau;
|
||||
int16_t val = (1<<9)*(sin(x)+1);
|
||||
dacPutChannelX(&DACD1, 1, val);
|
||||
chThdSleepMicroseconds(100);
|
||||
}
|
||||
}
|
||||
void dac_streaming_test(float freq){
|
||||
(void)freq;
|
||||
//TODO: Make callback function to handle half-buffer fill
|
||||
}
|
||||
void i2c_simple_test(void){
|
||||
const I2CConfig i2c_cfg; // No configuration?
|
||||
i2cStart(&I2CD1, &i2c_cfg);
|
||||
|
|
|
|||
|
|
@ -4,6 +4,4 @@ void speaker_simple_test(float freq);
|
|||
void speaker_streaming_test(float freq);
|
||||
void adc_simple_test(void);
|
||||
void encoder_test(void);
|
||||
void dac_simple_test(float freq);
|
||||
void dac_streaming_test(float freq);
|
||||
void i2c_simple_test(void);
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue