Rearranged project

Removed old files Brought PCB design to top level
2020-06-16 11:17:34 -07:00 · 2020-06-16 11:17:34 -07:00 · 87f46af173
commit 87f46af173
--- a/uSDX/.gitignore
+++ b/uSDX/.gitignore
@ -24,3 +24,6 @@ fp-info-cache
 # Exported BOM files
 *.xml
 *.csv
+
+# Hardware Datasheets
+datasheets/
--- a/QCX-SSB.ino
+++ b/QCX-SSB.ino
--- a/QCX-SSB_assembly_Rev-5.pdf
+++ b/QCX-SSB_assembly_Rev-5.pdf
--- a/uSDX/amp-cache.lib
+++ b/uSDX/amp-cache.lib
--- a/uSDX/amp.sch
+++ b/uSDX/amp.sch
--- a/block.png
+++ b/block.png
--- a/uSDX/fp-lib-table
+++ b/uSDX/fp-lib-table
--- a/layout.png
+++ b/layout.png
--- a/uSDX/mcu.sch
+++ b/uSDX/mcu.sch
--- a/pcb-bottom.png
+++ b/pcb-bottom.png
--- a/pcb-top.png
+++ b/pcb-top.png
--- a/pcb.png
+++ b/pcb.png
--- a/schematic.png
+++ b/schematic.png
--- a/uSDX/sym-lib-table
+++ b/uSDX/sym-lib-table
--- a/top.png
+++ b/top.png
--- a/twotone.png
+++ b/twotone.png
--- a/uSDX/uSDX-cache.lib
+++ b/uSDX/uSDX-cache.lib
--- a/uSDX/uSDX.kicad_pcb
+++ b/uSDX/uSDX.kicad_pcb
--- a/uSDX/uSDX.lib
+++ b/uSDX/uSDX.lib
--- a/uSDX/uSDX.pretty/73100-0105.kicad_mod
+++ b/uSDX/uSDX.pretty/73100-0105.kicad_mod
--- a/uSDX/uSDX.pretty/ASJ-112-M.kicad_mod
+++ b/uSDX/uSDX.pretty/ASJ-112-M.kicad_mod
--- a/uSDX/uSDX.pretty/Adafruit_SSD1306.kicad_mod
+++ b/uSDX/uSDX.pretty/Adafruit_SSD1306.kicad_mod
--- a/uSDX/uSDX.pretty/Adafruit_SSD1306_No_Mounting_Holes.kicad_mod
+++ b/uSDX/uSDX.pretty/Adafruit_SSD1306_No_Mounting_Holes.kicad_mod
--- a/uSDX/uSDX.pretty/Rotary_Encoder_Sw.kicad_mod
+++ b/uSDX/uSDX.pretty/Rotary_Encoder_Sw.kicad_mod
--- a/uSDX/uSDX.pro
+++ b/uSDX/uSDX.pro
--- a/uSDX/uSDX.sch
+++ b/uSDX/uSDX.sch
--- a/uSDX/amp.pro
+++ b/uSDX/amp.pro
@ -1,33 +0,0 @@
-update=22/05/2015 07:44:53
-version=1
-last_client=kicad
-[general]
-version=1
-RootSch=
-BoardNm=
-[pcbnew]
-version=1
-LastNetListRead=
-UseCmpFile=1
-PadDrill=0.600000000000
-PadDrillOvalY=0.600000000000
-PadSizeH=1.500000000000
-PadSizeV=1.500000000000
-PcbTextSizeV=1.500000000000
-PcbTextSizeH=1.500000000000
-PcbTextThickness=0.300000000000
-ModuleTextSizeV=1.000000000000
-ModuleTextSizeH=1.000000000000
-ModuleTextSizeThickness=0.150000000000
-SolderMaskClearance=0.000000000000
-SolderMaskMinWidth=0.000000000000
-DrawSegmentWidth=0.200000000000
-BoardOutlineThickness=0.100000000000
-ModuleOutlineThickness=0.150000000000
-[cvpcb]
-version=1
-NetIExt=net
-[eeschema]
-version=1
-LibDir=
-[eeschema/libraries]
--- a/ucx.png
+++ b/ucx.png