kopia lustrzana https://github.com/stlink-org/stlink
374 wiersze
13 KiB
C
374 wiersze
13 KiB
C
#include <stdio.h>
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#include <string.h>
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#include <unistd.h>
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#include <stlink.h>
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#include <helper.h>
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#include "flash_loader.h"
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#define FLASH_REGS_BANK2_OFS 0x40
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#define FLASH_BANK2_START_ADDR 0x08080000
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/* DO NOT MODIFY SOURCECODE DIRECTLY, EDIT ASSEMBLY FILES INSTEAD */
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/* flashloaders/stm32f0.s -- compiled with thumb2 */
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static const uint8_t loader_code_stm32vl[] = {
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0x00, 0xbf, 0x00, 0xbf,
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0x0f, 0x4f, 0x1f, 0x44,
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0x0f, 0x4e, 0x3e, 0x44,
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0x0f, 0x4d, 0x3d, 0x44,
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0x4f, 0xf0, 0x01, 0x07,
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0x34, 0x68, 0x3c, 0x43,
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0x34, 0x60, 0x04, 0x88,
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0x0c, 0x80, 0x02, 0x30,
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0x02, 0x31, 0x4f, 0xf0,
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0x01, 0x07, 0x2c, 0x68,
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0x3c, 0x42, 0xfc, 0xd1,
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0x4f, 0xf0, 0x14, 0x07,
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0x3c, 0x42, 0x01, 0xd1,
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0x02, 0x3a, 0xf0, 0xdc,
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0x4f, 0xf0, 0x01, 0x07,
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0x34, 0x68, 0xbc, 0x43,
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0x34, 0x60, 0x00, 0xbe,
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0x00, 0x20, 0x02, 0x40,
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0x10, 0x00, 0x00, 0x00,
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0x0c, 0x00, 0x00, 0x00
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};
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/* flashloaders/stm32f0.s -- thumb1 only, same sequence as for STM32VL, bank ignored */
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static const uint8_t loader_code_stm32f0[] = {
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0xc0, 0x46, 0xc0, 0x46,
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0x0d, 0x4f, 0x1f, 0x44,
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0x0d, 0x4e, 0x3e, 0x44,
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0x0d, 0x4d, 0x3d, 0x44,
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0x0d, 0x4f, 0x34, 0x68,
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0x3c, 0x43, 0x34, 0x60,
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0x04, 0x88, 0x0c, 0x80,
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0x02, 0x30, 0x02, 0x31,
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0x09, 0x4f, 0x2c, 0x68,
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0x3c, 0x42, 0xfc, 0xd1,
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0x08, 0x4f, 0x3c, 0x42,
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0x01, 0xd1, 0x02, 0x3a,
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0xf2, 0xdc, 0x05, 0x4f,
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0x34, 0x68, 0xbc, 0x43,
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0x34, 0x60, 0x00, 0xbe,
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0x00, 0x20, 0x02, 0x40,
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0x10, 0x00, 0x00, 0x00,
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0x0c, 0x00, 0x00, 0x00,
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0x01, 0x00, 0x00, 0x00,
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0x14, 0x00, 0x00, 0x00
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};
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static const uint8_t loader_code_stm32lx[] = {
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// flashloaders/stm32lx.s
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0x04, 0x68, 0x0c, 0x60,
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0x00, 0xf1, 0x04, 0x00,
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0x01, 0xf1, 0x04, 0x01,
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0x04, 0x3a, 0xf7, 0xdc,
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0x00, 0xbe
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};
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static const uint8_t loader_code_stm32f4[] = {
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// flashloaders/stm32f4.s
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0xdf, 0xf8, 0x24, 0xc0,
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0xdf, 0xf8, 0x24, 0xa0,
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0xe2, 0x44, 0x04, 0x68,
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0x0c, 0x60, 0x00, 0xf1,
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0x04, 0x00, 0x01, 0xf1,
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0x04, 0x01, 0xba, 0xf8,
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0x00, 0x40, 0x14, 0xf0,
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0x01, 0x0f, 0xfa, 0xd1,
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0x04, 0x3a, 0xf2, 0xdc,
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0x00, 0xbe, 0x00, 0xbf,
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0x00, 0x3c, 0x02, 0x40,
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0x0e, 0x00, 0x00, 0x00
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};
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static const uint8_t loader_code_stm32f4_lv[] = {
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// flashloaders/stm32f4lv.s
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0xdf, 0xf8, 0x24, 0xc0,
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0xdf, 0xf8, 0x24, 0xa0,
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0xe2, 0x44, 0x04, 0x78,
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0x0c, 0x70, 0x00, 0xf1,
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0x01, 0x00, 0x01, 0xf1,
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0x01, 0x01, 0xba, 0xf8,
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0x00, 0x40, 0x14, 0xf0,
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0x01, 0x0f, 0xfa, 0xd1,
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0x01, 0x3a, 0xf2, 0xdc,
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0x00, 0xbe, 0x00, 0xbf,
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0x00, 0x3c, 0x02, 0x40,
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0x0e, 0x00, 0x00, 0x00
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};
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static const uint8_t loader_code_stm32l4[] = {
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// flashloaders/stm32l4.s
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0xdf, 0xf8, 0x28, 0xc0,
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0xdf, 0xf8, 0x28, 0xa0,
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0xe2, 0x44, 0x05, 0x68,
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0x44, 0x68, 0x0d, 0x60,
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0x4c, 0x60, 0x00, 0xf1,
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0x08, 0x00, 0x01, 0xf1,
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0x08, 0x01, 0xda, 0xf8,
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0x00, 0x40, 0x14, 0xf4,
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0x80, 0x3f, 0xfa, 0xd1,
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0x08, 0x3a, 0xf0, 0xdc,
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0x00, 0xbe, 0x00, 0xbf,
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0x00, 0x20, 0x02, 0x40,
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0x10, 0x00, 0x00, 0x00
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};
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static const uint8_t loader_code_stm32f7[] = {
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// flashloaders/stm32f7.s
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0xdf, 0xf8, 0x28, 0xc0,
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0xdf, 0xf8, 0x28, 0xa0,
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0xe2, 0x44, 0x04, 0x68,
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0x0c, 0x60, 0x00, 0xf1,
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0x04, 0x00, 0x01, 0xf1,
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0x04, 0x01, 0xbf, 0xf3,
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0x4f, 0x8f, 0xba, 0xf8,
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0x00, 0x40, 0x14, 0xf0,
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0x01, 0x0f, 0xfa, 0xd1,
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0x04, 0x3a, 0xf0, 0xdc,
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0x00, 0xbe, 0x00, 0xbf,
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0x00, 0x3c, 0x02, 0x40,
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0x0e, 0x00, 0x00, 0x00
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};
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static const uint8_t loader_code_stm32f7_lv[] = {
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// flashloaders/stm32f7lv.s
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0xdf, 0xf8, 0x28, 0xc0,
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0xdf, 0xf8, 0x28, 0xa0,
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0xe2, 0x44, 0x04, 0x78,
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0x0c, 0x70, 0x00, 0xf1,
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0x01, 0x00, 0x01, 0xf1,
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0x01, 0x01, 0xbf, 0xf3,
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0x4f, 0x8f, 0xba, 0xf8,
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0x00, 0x40, 0x14, 0xf0,
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0x01, 0x0f, 0xfa, 0xd1,
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0x01, 0x3a, 0xf0, 0xdc,
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0x00, 0xbe, 0x00, 0xbf,
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0x00, 0x3c, 0x02, 0x40,
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0x0e, 0x00, 0x00, 0x00
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};
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int stlink_flash_loader_init(stlink_t *sl, flash_loader_t *fl) {
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size_t size = 0;
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// allocate the loader in SRAM
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if (stlink_flash_loader_write_to_sram(sl, &fl->loader_addr, &size) == -1) {
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WLOG("Failed to write flash loader to sram!\n");
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return(-1);
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}
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// allocate a one page buffer in SRAM right after loader
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fl->buf_addr = fl->loader_addr + (uint32_t)size;
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ILOG("Successfully loaded flash loader in sram\n");
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return(0);
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}
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static int loader_v_dependent_assignment(stlink_t *sl,
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const uint8_t **loader_code, size_t *loader_size,
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const uint8_t *high_v_loader, size_t high_v_loader_size,
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const uint8_t *low_v_loader, size_t low_v_loader_size) {
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int retval = 0;
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if ( sl->version.stlink_v == 1) {
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printf("STLINK V1 cannot read voltage, defaulting to 32-bit writes\n");
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*loader_code = high_v_loader;
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*loader_size = high_v_loader_size;
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} else {
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int voltage = stlink_target_voltage(sl);
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if (voltage == -1) {
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retval = -1;
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printf("Failed to read Target voltage\n");
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} else {
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if (voltage > 2700) {
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*loader_code = high_v_loader;
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*loader_size = high_v_loader_size;
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} else {
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*loader_code = low_v_loader;
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*loader_size = low_v_loader_size;
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}
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}
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}
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return(retval);
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}
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int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t* size) {
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const uint8_t* loader_code;
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size_t loader_size;
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if (sl->chip_id == STLINK_CHIPID_STM32_L1_MEDIUM ||
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sl->chip_id == STLINK_CHIPID_STM32_L1_CAT2 ||
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sl->chip_id == STLINK_CHIPID_STM32_L1_MEDIUM_PLUS ||
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sl->chip_id == STLINK_CHIPID_STM32_L1_HIGH ||
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sl->chip_id == STLINK_CHIPID_STM32_L152_RE ||
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sl->chip_id == STLINK_CHIPID_STM32_L011 ||
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sl->chip_id == STLINK_CHIPID_STM32_L0 ||
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sl->chip_id == STLINK_CHIPID_STM32_L0_CAT5 ||
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sl->chip_id == STLINK_CHIPID_STM32_L0_CAT2) { // STM32l
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loader_code = loader_code_stm32lx;
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loader_size = sizeof(loader_code_stm32lx);
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} else if (sl->core_id == STM32VL_CORE_ID ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_MEDIUM ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_HIGH ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_LOW ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_VL_MEDIUM_LOW ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_VL_HIGH ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_XL ||
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sl->chip_id == STLINK_CHIPID_STM32_F1_CONN ||
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sl->chip_id == STLINK_CHIPID_STM32_F3 ||
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sl->chip_id == STLINK_CHIPID_STM32_F3_SMALL ||
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sl->chip_id == STLINK_CHIPID_STM32_F303_HIGH ||
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sl->chip_id == STLINK_CHIPID_STM32_F37x ||
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sl->chip_id == STLINK_CHIPID_STM32_F334) {
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loader_code = loader_code_stm32vl;
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loader_size = sizeof(loader_code_stm32vl);
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} else if (sl->chip_id == STLINK_CHIPID_STM32_F2 ||
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sl->chip_id == STLINK_CHIPID_STM32_F4 ||
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sl->chip_id == STLINK_CHIPID_STM32_F4_DE ||
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sl->chip_id == STLINK_CHIPID_STM32_F4_LP ||
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sl->chip_id == STLINK_CHIPID_STM32_F4_HD ||
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sl->chip_id == STLINK_CHIPID_STM32_F4_DSI ||
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sl->chip_id == STLINK_CHIPID_STM32_F410 ||
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sl->chip_id == STLINK_CHIPID_STM32_F411RE ||
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sl->chip_id == STLINK_CHIPID_STM32_F412 ||
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sl->chip_id == STLINK_CHIPID_STM32_F413 ||
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sl->chip_id == STLINK_CHIPID_STM32_F446) {
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int retval;
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retval = loader_v_dependent_assignment(sl,
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&loader_code, &loader_size,
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loader_code_stm32f4, sizeof(loader_code_stm32f4),
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loader_code_stm32f4_lv, sizeof(loader_code_stm32f4_lv));
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if (retval == -1) { return(retval); }
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} else if (sl->core_id == STM32F7_CORE_ID ||
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sl->chip_id == STLINK_CHIPID_STM32_F7 ||
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sl->chip_id == STLINK_CHIPID_STM32_F7XXXX ||
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sl->chip_id == STLINK_CHIPID_STM32_F72XXX) {
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int retval;
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retval = loader_v_dependent_assignment(sl,
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&loader_code, &loader_size,
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loader_code_stm32f7, sizeof(loader_code_stm32f7),
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loader_code_stm32f7_lv, sizeof(loader_code_stm32f7_lv));
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if (retval == -1) { return(retval); }
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} else if (sl->chip_id == STLINK_CHIPID_STM32_F0 ||
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sl->chip_id == STLINK_CHIPID_STM32_F04 ||
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sl->chip_id == STLINK_CHIPID_STM32_F0_CAN ||
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sl->chip_id == STLINK_CHIPID_STM32_F0_SMALL ||
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sl->chip_id == STLINK_CHIPID_STM32_F09X) {
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loader_code = loader_code_stm32f0;
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loader_size = sizeof(loader_code_stm32f0);
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} else if ((sl->chip_id == STLINK_CHIPID_STM32_L4) ||
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(sl->chip_id == STLINK_CHIPID_STM32_L41X) ||
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(sl->chip_id == STLINK_CHIPID_STM32_L43X) ||
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(sl->chip_id == STLINK_CHIPID_STM32_L46X) ||
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(sl->chip_id == STLINK_CHIPID_STM32_L4RX) ||
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(sl->chip_id == STLINK_CHIPID_STM32_L496X)) {
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loader_code = loader_code_stm32l4;
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loader_size = sizeof(loader_code_stm32l4);
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} else {
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ELOG("unknown coreid, not sure what flash loader to use, aborting! coreid: %x, chipid: %x\n",
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sl->core_id, sl->chip_id);
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return(-1);
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}
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memcpy(sl->q_buf, loader_code, loader_size);
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int ret = stlink_write_mem32(sl, sl->sram_base, loader_size);
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if (ret) { return(ret); }
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*addr = sl->sram_base;
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*size = loader_size;
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return(0); // success
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}
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int stlink_flash_loader_run(stlink_t *sl, flash_loader_t* fl, stm32_addr_t target, const uint8_t* buf, size_t size) {
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struct stlink_reg rr;
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unsigned timeout;
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uint32_t flash_base = 0;
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uint32_t dhcsr, dfsr, cfsr, hfsr;
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DLOG("Running flash loader, write address:%#x, size: %u\n", target, (unsigned int)size);
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// TODO: This can never return -1
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if (write_buffer_to_sram(sl, fl, buf, size) == -1) {
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// IMPOSSIBLE!
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ELOG("write_buffer_to_sram() == -1\n");
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return(-1);
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}
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if ((sl->flash_type == STLINK_FLASH_TYPE_F1_XL) && (target >= FLASH_BANK2_START_ADDR)) {
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flash_base = FLASH_REGS_BANK2_OFS;
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}
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/* Setup core */
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stlink_write_reg(sl, fl->buf_addr, 0); // source
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stlink_write_reg(sl, target, 1); // target
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stlink_write_reg(sl, (uint32_t)size, 2); // count
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stlink_write_reg(sl, flash_base, 3); // flash register base
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// only used on VL/F1_XL, but harmless for others
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stlink_write_reg(sl, fl->loader_addr, 15); // pc register
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/* Run loader */
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stlink_run(sl);
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/* This piece of code used to try to spin for .1 second by waiting doing 10000 rounds of 10 µs.
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* But because this usually runs on Unix-like OSes, the 10 µs get rounded up to the "tick"
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* (actually almost two ticks) of the system. 1 ms. Thus, the ten thousand attempts, when
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* "something goes wrong" that requires the error message "flash loader run error" would wait
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* for something like 20 seconds before coming up with the error.
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* By increasing the sleep-per-round to the same order-of-magnitude as the tick-rounding that
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* the OS uses, the wait until the error message is reduced to the same order of magnitude
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* as what was intended. -- REW.
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*/
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// wait until done (reaches breakpoint)
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timeout = time_ms() + 500;
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while (time_ms() < timeout) {
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usleep(10000);
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if (stlink_is_core_halted(sl)) {
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timeout = 0;
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break;
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}
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}
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if (timeout) {
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ELOG("Flash loader run error\n");
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goto error;
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}
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// check written byte count
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stlink_read_reg(sl, 2, &rr);
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if (rr.r[2] != 0) {
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ELOG("Write error\n");
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goto error;
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}
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return(0);
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error:
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dhcsr = dfsr = cfsr = hfsr = 0;
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stlink_read_debug32(sl, STLINK_REG_DHCSR, &dhcsr);
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stlink_read_debug32(sl, STLINK_REG_DFSR, &dfsr);
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stlink_read_debug32(sl, STLINK_REG_CFSR, &cfsr);
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stlink_read_debug32(sl, STLINK_REG_HFSR, &hfsr);
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stlink_read_all_regs(sl, &rr);
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WLOG("Loader state: R2 0x%X R15 0x%X\n", rr.r[2], rr.r[15]);
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if (dhcsr != 0x3000B || dfsr != 0x3 || cfsr || hfsr) {
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WLOG("MCU state: DHCSR 0x%X DFSR 0x%X CFSR 0x%X HFSR 0x%X\n",
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dhcsr, dfsr, cfsr, hfsr);
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}
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return(-1);
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}
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