kopia lustrzana https://github.com/stlink-org/stlink
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19
CHANGELOG.md
19
CHANGELOG.md
|
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@ -2,7 +2,7 @@
|
|||
|
||||
# v1.8.0
|
||||
|
||||
Release date: 2023-xx-xx
|
||||
Release date: 2024-xx-xx
|
||||
|
||||
This release drops support for macOS and some older operating systems. Check project README for details.
|
||||
Removed Travis CI integration as it is no longer functional.
|
||||
|
|
@ -16,7 +16,7 @@ Features:
|
|||
|
||||
- Support for writing option bytes on STM32F0/F1/F3 ([#346](https://github.com/stlink-org/stlink/pull/346), [#458](https://github.com/stlink-org/stlink/pull/458), [#808](https://github.com/stlink-org/stlink/pull/808), [#1084](https://github.com/stlink-org/stlink/pull/1084), [#1112](https://github.com/stlink-org/stlink/pull/1112))
|
||||
- Initial support for STM32 L5 & U5 devices and minor changes ([#1005](https://github.com/stlink-org/stlink/pull/1005), [#1096](https://github.com/stlink-org/stlink/pull/1096), [#1247](https://github.com/stlink-org/stlink/pull/1247), [#1300](https://github.com/stlink-org/stlink/pull/1300), [#1301](https://github.com/stlink-org/stlink/pull/1301))
|
||||
- Added chip-IDs for STM32G0B0/G0B1/G0C1/G050/G051/G061 ([#1140](https://github.com/stlink-org/stlink/pull/1140))
|
||||
- Added chip-IDs for STM32G0B0/G0B1/G0C1/G050/G051/G061 ([#1140](https://github.com/stlink-org/stlink/pull/1140), [#1359](https://github.com/stlink-org/stlink/pull/1359))
|
||||
- Added option byte info for STM32F411XX ([#1141](https://github.com/stlink-org/stlink/pull/1141))
|
||||
- Expanded and revised list of chips ([#1145](https://github.com/stlink-org/stlink/pull/1145), [#1164](https://github.com/stlink-org/stlink/pull/1164))
|
||||
- STM32H72X/3X: Added full access to all device memory ([#1158](https://github.com/stlink-org/stlink/pull/1158), [#1159](https://github.com/stlink-org/stlink/pull/1159))
|
||||
|
|
@ -29,7 +29,9 @@ Features:
|
|||
- Added parametres option_base, option_size for F401xD_xE ([#1235](https://github.com/stlink-org/stlink/pull/1235))
|
||||
- Added support for option bytes to F1xx_XLD (GD32F30x) ([#1250](https://github.com/stlink-org/stlink/pull/1250))
|
||||
- Added option byte address for L4Rx devices ([#1254](https://github.com/stlink-org/stlink/pull/1254))
|
||||
- Added udev-rule rule for the STLink v3 MINIE programmer ([#1274](https://github.com/stlink-org/stlink/pull/1274), [#1281](https://github.com/stlink-org/stlink/pull/1281))
|
||||
- Added udev-rule rule for the STLink v3 MINIE programmer ([#1274](https://github.com/stlink-org/stlink/pull/1274), [#1281](https://github.com/stlink-org/stlink/pull/1281), [#1358](https://github.com/stlink-org/stlink/pull/1358))
|
||||
- Added support for STM32C0x1 devices ([#1329](https://github.com/stlink-org/stlink/pull/1329), [#1354](https://github.com/stlink-org/stlink/pull/1354))
|
||||
- First Implementation of the OTP Read/Write function ([#1352](https://github.com/stlink-org/stlink/pull/1352), [#1353](https://github.com/stlink-org/stlink/pull/1353))
|
||||
|
||||
Updates & changes:
|
||||
|
||||
|
|
@ -42,11 +44,13 @@ Updates & changes:
|
|||
- [doc] Human-readable flash_type in chip-id files ([#1155](https://github.com/stlink-org/stlink/pull/1155), commit [#1745bf5](https://github.com/stlink-org/stlink/commit/1745bf5193c4d3186d4f6fde59cc86e9bad6e61b))
|
||||
- Dropped execute bits from source code files ([#1167](https://github.com/stlink-org/stlink/pull/1167))
|
||||
- Use proper Markdown headers for supported MCUs ([#1168](https://github.com/stlink-org/stlink/pull/1168))
|
||||
- Ability to flash F7 devices when in dual-bank mode ([#1174](https://github.com/stlink-org/stlink/pull/1174))
|
||||
- Removed redundant array ([#1178](https://github.com/stlink-org/stlink/pull/1178))
|
||||
- Updated chip config files from the library structs ([#1181](https://github.com/stlink-org/stlink/pull/1181))
|
||||
- [doc] Corrected file path in tutorial ([#1186](https://github.com/stlink-org/stlink/pull/1186))
|
||||
- Improved chipid checks and printouts ([#1188](https://github.com/stlink-org/stlink/pull/1188))
|
||||
- [refactoring] Sourcefile 'common.c' ([#1218](https://github.com/stlink-org/stlink/pull/1218), [#1220](https://github.com/stlink-org/stlink/pull/1220))
|
||||
- [STM32H735]: Set hardware breakpoints for external bus ([#1219](https://github.com/stlink-org/stlink/pull/1219))
|
||||
- Set C standard through cmake variables ([#1221](https://github.com/stlink-org/stlink/pull/1221))
|
||||
- [doc] Added make install to the macOS compiling instructions ([#1259](https://github.com/stlink-org/stlink/pull/1259))
|
||||
- [doc] Linux Install from code Documentation improvement ([#1263](https://github.com/stlink-org/stlink/pull/1263), commit [#43498de](https://github.com/stlink-org/stlink/commit/43498dedf651260ef34197e512d35e3ad7142401))
|
||||
|
|
@ -56,12 +60,13 @@ Updates & changes:
|
|||
- [doc] Updated package source link for Arch Linux ([#1318](https://github.com/stlink-org/stlink/pull/1318))
|
||||
- CMake: Avoid hard-wired /usr/local/share ([#1325](https://github.com/stlink-org/stlink/pull/1325))
|
||||
|
||||
|
||||
Fixes:
|
||||
|
||||
- Fixed some flashing issues on STM32L0 ([#681](https://github.com/stlink-org/stlink/pull/681), [#1203](https://github.com/stlink-org/stlink/pull/1203), [#1225](https://github.com/stlink-org/stlink/pull/1225), [#1253](https://github.com/stlink-org/stlink/pull/1253), [#1289](https://github.com/stlink-org/stlink/pull/1289), [#1330](https://github.com/stlink-org/stlink/pull/1330))
|
||||
- cmake: Install shared libraries in proper directories ([#1098](https://github.com/stlink-org/stlink/pull/1098), [#1138](https://github.com/stlink-org/stlink/pull/1138), [#1154](https://github.com/stlink-org/stlink/pull/1154))
|
||||
- cmake: Install shared libraries in proper directories ([#1142](https://github.com/stlink-org/stlink/pull/1142))
|
||||
- Fixed clearance of the H7 dual bank flag ([#1146](https://github.com/stlink-org/stlink/pull/1146), [#1147](https://github.com/stlink-org/stlink/pull/1147))
|
||||
- Fixed clearance of the H7 dual bank flag ([#1146](https://github.com/stlink-org/stlink/pull/1146), [#1147](https://github.com/stlink-org/stlink/pull/1147), [#1342](https://github.com/stlink-org/stlink/pull/1342))
|
||||
- Fix for 'libusb_devices were leaked' when no ST-LINK programmer was found ([#1150](https://github.com/stlink-org/stlink/pull/1150))
|
||||
- Set of fixes and improvements ([#1153](https://github.com/stlink-org/stlink/pull/1153), [#1154](https://github.com/stlink-org/stlink/pull/1154))
|
||||
- Removed limit check for WRITEMEM_32BIT ([#1157](https://github.com/stlink-org/stlink/pull/1157))
|
||||
|
|
@ -75,7 +80,7 @@ Fixes:
|
|||
- st-flash and other utilities search for chip files in the wrong directory ([#1180](https://github.com/stlink-org/stlink/pull/1180), commit [#c8fc656](https://github.com/stlink-org/stlink/commit/c8fc6561fead79ad49c09d82bab864745086792c))
|
||||
- Fixed broken build on 32 bit systems ([#985](https://github.com/stlink-org/stlink/pull/985), [#1175](https://github.com/stlink-org/stlink/pull/1175), commit [#c8fc656](https://github.com/stlink-org/stlink/commit/c8fc6561fead79ad49c09d82bab864745086792c))
|
||||
- Define 'SSIZE_MAX' if not defined ([#1183](https://github.com/stlink-org/stlink/pull/1183))
|
||||
- STM32G031G8: BOOT_LOCK is not possible to change on option bytes address 0x1FFF7870 ([#1194](https://github.com/stlink-org/stlink/pull/1194))
|
||||
- [STM32G031G8]: BOOT_LOCK is not possible to change on option bytes address 0x1FFF7870 ([#1194](https://github.com/stlink-org/stlink/pull/1194))
|
||||
- Fixed compliation for OpenBSD 7.0 ([#1202](https://github.com/stlink-org/stlink/pull/1202))
|
||||
- Included 'SSIZE_MAX' from 'limits.h' in 'src/common.c' ([#1207](https://github.com/stlink-org/stlink/pull/1207))
|
||||
- Fix for libusb_kernel_driver_active & error handling for st.st_size () ([#1210](https://github.com/stlink-org/stlink/pull/1210), [#1211](https://github.com/stlink-org/stlink/pull/1211), [#1214](https://github.com/stlink-org/stlink/pull/1214))
|
||||
|
|
@ -93,7 +98,11 @@ Fixes:
|
|||
- Fixed unbounded write and check return values of sscanf ([#1306](https://github.com/stlink-org/stlink/pull/1306))
|
||||
- Added null check for return value of stlink_chipid_get_params() ([#1307](https://github.com/stlink-org/stlink/pull/1307))
|
||||
- Fixed warning in a few *.cmake files ([#1309](https://github.com/stlink-org/stlink/pull/1309))
|
||||
- Fixed support for STM32U5 chips ([#1320](https://github.com/stlink-org/stlink/pull/1320), [#1355](https://github.com/stlink-org/stlink/pull/1355))
|
||||
- [STM32G0B1]: Erase fails starting page 64 ([#1321](https://github.com/stlink-org/stlink/pull/1321))
|
||||
- Notification "unknown option -- u" in tool st-util ([#1326](https://github.com/stlink-org/stlink/pull/1326), [#1327](https://github.com/stlink-org/stlink/pull/1327))
|
||||
- Do not crash when the STLink chip returns a voltage factor of zero ([#1343](https://github.com/stlink-org/stlink/pull/1343))
|
||||
- stlink-gui: failed to allocate 139988352155568 bytes ([#1356](https://github.com/stlink-org/stlink/pull/1356))
|
||||
|
||||
# v1.7.0
|
||||
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
#
|
||||
dev_type STM32C011xx
|
||||
ref_manual_id 0490
|
||||
chip_id 0x453 // STM32_CHIPID_C011xx
|
||||
chip_id 0x443 // STM32_CHIPID_C011xx
|
||||
flash_type C0
|
||||
flash_size_reg 0x1fff75a0
|
||||
flash_pagesize 0x800 // 2 KB
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ Alexey Cherevatenko
|
|||
Alexey Panarin
|
||||
Anatoli Klassen [dev26th]
|
||||
Andrea Mucignat
|
||||
Andrew Andrianov [necromant]
|
||||
Andrew Andrianov [nekromant]
|
||||
Andrey Yurovsky
|
||||
Andy Isaacson
|
||||
Andreas Sandberg [andysan]
|
||||
|
|
@ -52,10 +52,10 @@ Greg Meiste [meisteg]
|
|||
Grzegorz Szymaszek [gszy]
|
||||
Guillaume Revaillot [grevaillot]
|
||||
Gwenhael Goavec-Merou [trabucayre]
|
||||
Hakkavélin <hakkavelin@braudrist.lan>
|
||||
[Hakkavélin]
|
||||
Halt Hammerzeit
|
||||
Hsu Pu [hsupu]
|
||||
[hydroconstructor]
|
||||
htk <htk@vdr.fritz.box>
|
||||
Ian Griffiths
|
||||
Jack Peel
|
||||
Jakub Tyszkowski
|
||||
|
|
@ -68,6 +68,7 @@ Jens Hoffmann
|
|||
Jerome Lambourg
|
||||
Jim Paris
|
||||
Jiří Netolický
|
||||
Jerry Jacobs [xor-gate]
|
||||
Jerry Nosky [jnosky]
|
||||
Jochen Wilhelmy [Jochen0x90h]
|
||||
John Hall [simplerobot]
|
||||
|
|
@ -90,7 +91,6 @@ Michael Pratt [prattmic]
|
|||
Michael Sparmann
|
||||
Mike Szczys
|
||||
Magnus Lundin [mlu]
|
||||
mux <freelancer.c@gmail.com>
|
||||
Ned Konz
|
||||
Nic McDonald
|
||||
Nicolas Schodet
|
||||
|
|
@ -98,7 +98,7 @@ Oleksiy Slyshyk [slyshykO]
|
|||
Olivier Croquette
|
||||
Olivier Gay
|
||||
Onno Kortmann
|
||||
orangeudav <orangeudav@gmail.com>
|
||||
[orangeudav]
|
||||
Pavel Kirienko
|
||||
Pekka Nikander
|
||||
Pete Nelson
|
||||
|
|
@ -107,6 +107,7 @@ Peter Zotov
|
|||
Petteri Aimonen
|
||||
Piotr Haber
|
||||
[RafaelLeeImg]
|
||||
[rcubee]
|
||||
Rene Hopf [rene-dev]
|
||||
Robin Kreis
|
||||
Roger Wolff [rewolff]
|
||||
|
|
@ -117,11 +118,11 @@ Sean Simmons
|
|||
Sergey Alirzaev
|
||||
Simon Derr [sderr]
|
||||
Simon Wright
|
||||
[simplerobot]
|
||||
Stany Marcel
|
||||
Stefan Misik
|
||||
Sven Wegener
|
||||
Tarek Bochkati [tarek-bochkati] (STMicroelectronics)
|
||||
Tarek Bochkati [tarek-bochkati]
|
||||
[texane]
|
||||
Timothy Lee [timothytylee]
|
||||
Tuomo Kaikkonen
|
||||
Theodore A. Roth
|
||||
|
|
@ -136,6 +137,7 @@ Vasiliy Glazov [Vascom]
|
|||
Vegard Storheil Eriksen
|
||||
Viacheslav Dobromyslov
|
||||
Victor Mayoral Vilches
|
||||
[whitequark]
|
||||
William Ransohoff [WRansohoff]
|
||||
Wojciech A. Koszek
|
||||
Woodrow Douglass
|
||||
|
|
|
|||
|
|
@ -165,7 +165,7 @@ Within the sourcefolder of the project, these rules are located in the subdirect
|
|||
Afterwards it may be necessary to reload the udev rules:
|
||||
|
||||
```sh
|
||||
$ sudo cp -a config/udev/rules.d/* /etc/udev/rules.d/
|
||||
$ sudo cp -a config/udev/rules.d/* /lib/udev/rules.d/
|
||||
$ sudo udevadm control --reload-rules
|
||||
$ sudo udevadm trigger
|
||||
```
|
||||
|
|
|
|||
|
|
@ -2,18 +2,18 @@
|
|||
|
||||
## Available tools and options
|
||||
|
||||
| Option | Tool | Description | Available<br />since |
|
||||
| --------------------- | ---------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | -------------------- |
|
||||
| --flash=n[k, M] | st-flash | One can specify `--flash=128k` for example, to override the default value of 64k for the STM32F103C8T6<br />to assume 128k of flash being present. This option accepts decimal (128k), octal 0200k, or hex 0x80k values.<br />Leaving the multiplier out is equally valid, e.g.: `--flash=0x20000`. The size may be followed by an optional<br />"k" or "M" to multiply the given value by 1k (1024) or 1M (1024 x 1024) respectively.<br />One can read arbitary addresses of memory out to a binary file with: `st-flash read out.bin 0x8000000 4096`.<br />In this example `4096 bytes` are read and subsequently written to `out.bin`.<br />Binary files (here: `in.bin`) are written into flash memory with: `st-flash write in.bin 0x8000000` | v1.4.0 |
|
||||
| --format | st-flash | Specify file image format to read or write. Valid formats are `binary` and `ihex`. | v1.3.0 |
|
||||
| --freq=n[k, M] | st-info<br />st-flash<br />st-util | The frequency of the SWD/JTAG interface can be specified, to override the default 1800 kHz configuration.<br />This option solely accepts decimal values with the unit `Hz` being left out. Valid frequencies are:<br />`5k, 15k, 25k, 50k, 100k, 125k, 240k, 480k, 950k, 1200k (1.2M), 1800k (1.8M), 4000k (4M)`. | v1.6.1 |
|
||||
| --opt | st-flash | Optimisation can be enabled in order to skip flashing empty (0x00 or 0xff) bytes at the end of binary file.<br />This may cause some garbage data left after a flash operation. This option was enabled by default in earlier releases. | v1.6.1 |
|
||||
| --reset | st-flash | Trigger a reset after flashing. The default uses the hardware reset through `NRST` pin.<br />A software reset (via `AIRCR`; since v1.5.1) is used, if the hardware reset failed (`NRST` pin not connected). | v1.0.0 |
|
||||
| --connect-under-reset | st-info<br />st-flash<br />st-util | Connect under reset. Option makes it possible to connect to the device before code execution. This is useful<br />when the target contains code that lets the device go to sleep, disables debug pins or other special code. | v1.6.1 |
|
||||
| --hot-plug | st-info<br />st-flash<br />st-util | Connect to the target without reset. | v1.6.2 |
|
||||
| --probe | st-info | Display hardware information about the connected programmer and target MCU. | v1.2.0 |
|
||||
| --version | st-info<br />st-flash<br />st-util | Print version information. | v1.3.0 |
|
||||
| --help | st-flash<br />st-util | Print list of available commands. | |
|
||||
| Option | Tool | Description | Available<br />since |
|
||||
| --------------------- | ---------------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ | -------------------- |
|
||||
| --flash=n[k, M] | st-flash | One can specify `--flash=128k` for example, to override the default value of 64k for the STM32F103C8T6 to assume 128k of flash being present. This option accepts decimal (128k), octal 0200k, or hex 0x80k values.<br />Leaving the multiplier out is equally valid, e.g.: `--flash=0x20000`. The size may be followed by an optional "k" or "M" to multiply the given value by 1k (1024) or 1M (1024 x 1024) respectively.<br />One can read arbitary addresses of memory out to a binary file with: `st-flash read out.bin 0x8000000 4096`. In this example `4096 bytes` are read and subsequently written to `out.bin`.<br />Binary files (here: `in.bin`) are written into flash memory with: `st-flash write in.bin 0x8000000` | v1.4.0 |
|
||||
| --format | st-flash | Specify file image format to read or write.<br />Valid formats are `binary` and `ihex`. | v1.3.0 |
|
||||
| --freq=n[k, M] | st-info<br />st-flash<br />st-util | The frequency of the SWD/JTAG interface can be specified, to override the default 1800 kHz configuration.<br />This option solely accepts decimal values with the unit `Hz` being left out. Valid frequencies are:<br />`5k, 15k, 25k, 50k, 100k, 125k, 240k, 480k, 950k, 1200k (1.2M), 1800k (1.8M), 4000k (4M)`. | v1.6.1 |
|
||||
| --opt | st-flash | Optimisation can be enabled in order to skip flashing empty (0x00 or 0xff) bytes at the end of binary file.<br />This may cause some garbage data left after a flash operation. This option was enabled by default in earlier releases. | v1.6.1 |
|
||||
| --reset | st-flash | Trigger a reset after flashing. The default uses the hardware reset through `NRST` pin.<br />A software reset (via `AIRCR`; since v1.5.1) is used, if the hardware reset failed (`NRST` pin not connected). | v1.0.0 |
|
||||
| --connect-under-reset | st-info<br />st-flash<br />st-util | Connect under reset. Option makes it possible to connect to the device before code execution. This is useful when the target contains code that lets the device go to sleep, disables debug pins or other special code. | v1.6.1 |
|
||||
| --hot-plug | st-info<br />st-flash<br />st-util | Connect to the target without reset. | v1.6.2 |
|
||||
| --probe | st-info | Display hardware information about the connected programmer and target MCU. | v1.2.0 |
|
||||
| --version | st-info<br />st-flash<br />st-util | Print version information. | v1.3.0 |
|
||||
| --help | st-flash<br />st-util | Print list of available commands. | |
|
||||
|
||||
### Reading & Writing Option Bytes
|
||||
|
||||
|
|
@ -62,7 +62,7 @@ On my system I see the following:
|
|||
crw-rw-rw- 1 root root 189, 528 Jan 24 17:52 /dev/bus/usb/005/017
|
||||
```
|
||||
|
||||
which is world writable (this is from the `MODE:="0666"` below). I have several files in my `/etc/udev/rules.d` directory. In this particular case, the `49-stlinkv2-1.rules` file contains the following:
|
||||
which is world writable (this is from the `MODE:="0666"` below). I have several files in my `/lib/udev/rules.d` directory. In this particular case, the `49-stlinkv2-1.rules` file contains the following:
|
||||
|
||||
```
|
||||
# STM32 nucleo boards, with onboard STLINK/V2-1
|
||||
|
|
@ -81,7 +81,7 @@ SUBSYSTEMS=="usb", ATTRS{idVendor}=="0483", ATTRS{idProduct}=="374b", \
|
|||
|
||||
and the `idVendor` of `0483` and `idProduct` of `374b` matches the vendor id from the `lsusb` output.
|
||||
|
||||
Make sure that you have all 3 files from [/config/udev/rules.d](https://github.com/stlink-org/stlink/tree/master/config/udev/rules.d) in your `/etc/udev/rules.d` directory. After copying new files or editing existing files in `/etc/udev/ruled.d` you should run the following:
|
||||
Make sure that you have all 3 files from [/config/udev/rules.d](https://github.com/stlink-org/stlink/tree/master/config/udev/rules.d) in your `/lib/udev/rules.d` directory. After copying new files or editing existing files in `/lib/udev/rules.d` you should run the following:
|
||||
|
||||
```
|
||||
sudo udevadm control --reload-rules
|
||||
|
|
@ -156,6 +156,14 @@ Here flashing of the device is now possible with and without the `--reset` optio
|
|||
|
||||
The debug command `(gdb) monitor jtag_reset` sends a _hard reset_ signal via the `NRST` pin to reset the device and allows for flashing it (again).
|
||||
|
||||
### e) Note on setting hardware breakpoints for external bus (Example: STM32H735-DK)
|
||||
|
||||
GDB is setting breakpoints based on the XML memory map designation of `rom` or `ram`, which is hardcoded in st-util for a given processor.
|
||||
However the external bus can be *RAM* or *ROM* depending on design.
|
||||
|
||||
The STM32H735-DK has external FLASH at address 0x90000000. As a result, because the entire external memory range is `ram` as it could be either,
|
||||
software breakpoints (Z0) get sent when a breakpoint is created and they never get tripped as the memory area is read only.
|
||||
|
||||
---
|
||||
|
||||
( Content below is currently unrevised and may be outdated as of Mar 2021. )
|
||||
|
|
|
|||
|
|
@ -25,42 +25,34 @@ Maintained versions of:
|
|||
|
||||
Other Linux-/Unix-based Operating Systems:
|
||||
|
||||
| Operating System | libusb | cmake | libgtk-dev | Notes |
|
||||
| ------------------------ | ------------------------------ | ---------- | ----------- | ------------------------ |
|
||||
| Debian Sid | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Debian 11 (Bullseye) | 1.0.24 | 3.**18.4** | 3.24.24 | |
|
||||
| Debian 10 (Buster) | 1.0.**22** | 3.**13.4** | 3.24.**5** | |
|
||||
| | | | | |
|
||||
| Ubuntu 20.04 LTS (Focal) | 1.0.23 | 3.**16.3** | 3.24.**18** | |
|
||||
| | | | | |
|
||||
| Alpine 3.15 | 1.0.24 | 3.21.3 | 3.24.30 | End of Support: Nov 2023 |
|
||||
| Alpine 3.14 | 1.0.24 | 3.20.3 | 3.24.28 | End of Support: May 2023 |
|
||||
| | | | | |
|
||||
| FreeBSD 13.x | 1.0.**16-18** (API 0x01000102) | 3.22.1 | 3.24.31 | |
|
||||
| FreeBSD 12.x | 1.0.**16-18** (API 0x01000102) | 3.22.1 | 3.24.31 | |
|
||||
| | | | | |
|
||||
| NetBSD 9.x | 1.0.24 | 3.21.2 | 3.24.30 | |
|
||||
| NetBSD 8.x | 1.0.24 | 3.**19.7** | 3.24.27 | |
|
||||
| | | | | |
|
||||
| CentOS 9 Stream [x64] | 1.0.24 (`libusbx`) | 3.20.3 | 3.24.30 | |
|
||||
| CentOS 8 Stream [x64] | 1.0.23 (`libusbx`) | 3.20.2 | 3.**22.30** | |
|
||||
| | | | | |
|
||||
| ALT Linux Sisyphus | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| ALT Linux P10 | 1.0.24 | 3.20.5 | 3.24.31 | |
|
||||
| ALT Linux P9 | 1.0.**22** | 3.**16.3** | 3.24.29 | |
|
||||
| | | | | |
|
||||
| OpenMandriva Rolling | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| OpenMandriva Cooker | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| OpenMandriva Lx 4.2 | 1.0.24 | 3.**19.3** | 3.24.24 | |
|
||||
| | | | | |
|
||||
| Arch Linux | 1.0.24 | 3.22.1 | - | |
|
||||
| KaOS [x64] | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Mageia Cauldron | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| PCLinuxOS [x64] | (?) | 3.22.1 | 3.24.31 | |
|
||||
| Solus [x64] | 1.0.24 | 3.22.1 | 3.24.30 | |
|
||||
| Void Linux | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Slackware Current | 1.0.24 | 3.21.4 | 3.24.31 | |
|
||||
| Adélie 1.0 | 1.0.23 | 3.**16.4** | 3.24.23 | |
|
||||
| Operating System | libusb | cmake | libgtk-dev | End of<br />OS-Support |
|
||||
| ------------------------ | ------------------------------ | ---------- | ----------- | ---------------------- |
|
||||
| Debian Sid | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Debian 11 (Bullseye) | 1.0.24 | 3.**18.4** | 3.24.24 | |
|
||||
| Debian 10 (Buster) | 1.0.**22** | 3.**13.4** | 3.24.**5** | Jun 2024 |
|
||||
| | | | | |
|
||||
| Ubuntu 20.04 LTS (Focal) | 1.0.23 | 3.**16.3** | 3.24.**18** | May 2025 |
|
||||
| | | | | |
|
||||
| FreeBSD 13.x | 1.0.**16-18** (API 0x01000102) | 3.22.1 | 3.24.31 | |
|
||||
| FreeBSD 12.x | 1.0.**16-18** (API 0x01000102) | 3.22.1 | 3.24.31 | Dec 2023 |
|
||||
| | | | | |
|
||||
| NetBSD 9.x | 1.0.24 | 3.21.2 | 3.24.30 | |
|
||||
| NetBSD 8.x | 1.0.24 | 3.**19.7** | 3.24.27 | |
|
||||
| | | | | |
|
||||
| CentOS 9 Stream [x64] | 1.0.24 (`libusbx`) | 3.20.3 | 3.24.30 | |
|
||||
| CentOS 8 Stream [x64] | 1.0.23 (`libusbx`) | 3.20.2 | 3.**22.30** | May 2024 |
|
||||
| | | | | |
|
||||
| ALT Linux Sisyphus | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| ALT Linux P10 | 1.0.24 | 3.20.5 | 3.24.31 | |
|
||||
| ALT Linux P9 | 1.0.**22** | 3.**16.3** | 3.24.29 | |
|
||||
| | | | | |
|
||||
| KaOS [x64] | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Mageia Cauldron | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| PCLinuxOS [x64] | (?) | 3.22.1 | 3.24.31 | |
|
||||
| Solus [x64] | 1.0.24 | 3.22.1 | 3.24.30 | |
|
||||
| Void Linux | 1.0.24 | 3.22.1 | 3.24.31 | |
|
||||
| Slackware Current | 1.0.24 | 3.21.4 | 3.24.31 | |
|
||||
| Adélie 1.0 | 1.0.23 | 3.**16.4** | 3.24.23 | |
|
||||
|
||||
## Unsupported Operating Systems (as of Release v1.8.0)
|
||||
|
||||
|
|
@ -68,9 +60,12 @@ Systems with highlighted versions remain compatible with this toolset.
|
|||
|
||||
| Operating System | libusb | cmake | End of<br />OS-Support |
|
||||
| ---------------------------------------- | ------------------------------ | ---------- | ---------------------- |
|
||||
| Alpine 3.15 | 1.0.**24** | 3.**21.3** | Nov 2023 |
|
||||
| Fedora 35 [x64] | 1.0.**24** | 3.**21.3** | Dec 2022 |
|
||||
| Alpine 3.14 | 1.0.**24** | 3.**20.3** | May 2023 |
|
||||
| CentOS / Rocky Linux / AlmaLinux 8 [x64] | 1.0.**23** (`libusbx`) | 3.**20.3** | Dec 2021 |
|
||||
| Fedora 34 [x64] | 1.0.**24** (`libusbx`) | 3.**19.7** | Jun 2022 |
|
||||
| OpenMandriva Lx 4.2 | 1.0.**24** | 3.**19.3** | Mar 2023 |
|
||||
| Mageia 8 | 1.0.**24** | 3.**19.2** | Aug 2022 |
|
||||
| Alpine 3.13 | 1.0.**24** | 3.**18.4** | Nov 2022 |
|
||||
| Ubuntu 21.04 (Hirsute) | 1.0.**24** | 3.**18.4** | Jan 2022 |
|
||||
|
|
|
|||
38
inc/stlink.h
38
inc/stlink.h
|
|
@ -66,7 +66,8 @@ enum target_state {
|
|||
|
||||
#define STLINK_V3_MAX_FREQ_NB 10
|
||||
|
||||
#define STLINK_TRACE_BUF_LEN 2048
|
||||
#define STLINK_V2_TRACE_BUF_LEN 2048
|
||||
#define STLINK_V3_TRACE_BUF_LEN 8192
|
||||
#define STLINK_V2_MAX_TRACE_FREQUENCY 2000000
|
||||
#define STLINK_V3_MAX_TRACE_FREQUENCY 24000000
|
||||
#define STLINK_DEFAULT_TRACE_FREQUENCY 2000000
|
||||
|
|
@ -199,23 +200,23 @@ struct _stlink {
|
|||
// transport layer verboseness: 0 for no debug info, 10 for lots
|
||||
int32_t verbose;
|
||||
int32_t opt;
|
||||
uint32_t core_id; // set by stlink_core_id(), result from STLINK_DEBUGREADCOREID
|
||||
uint32_t chip_id; // set by stlink_load_device_params(), used to identify flash and sram
|
||||
enum target_state core_stat; // set by stlink_status()
|
||||
uint32_t core_id; // set by stlink_core_id(), result from STLINK_DEBUGREADCOREID
|
||||
uint32_t chip_id; // set by stlink_load_device_params(), used to identify flash and sram
|
||||
enum target_state core_stat; // set by stlink_status()
|
||||
|
||||
char serial[STLINK_SERIAL_BUFFER_SIZE];
|
||||
int32_t freq; // set by stlink_open_usb(), values: STLINK_SWDCLK_xxx_DIVISOR
|
||||
int32_t freq; // set by stlink_open_usb(), values: STLINK_SWDCLK_xxx_DIVISOR
|
||||
|
||||
enum stm32_flash_type flash_type;
|
||||
// stlink_chipid_params.flash_type, set by stlink_load_device_params(), values: STM32_FLASH_TYPE_xx
|
||||
|
||||
stm32_addr_t flash_base; // STM32_FLASH_BASE, set by stlink_load_device_params()
|
||||
uint32_t flash_size; // calculated by stlink_load_device_params()
|
||||
uint32_t flash_pgsz; // stlink_chipid_params.flash_pagesize, set by stlink_load_device_params()
|
||||
stm32_addr_t flash_base; // STM32_FLASH_BASE, set by stlink_load_device_params()
|
||||
uint32_t flash_size; // calculated by stlink_load_device_params()
|
||||
uint32_t flash_pgsz; // stlink_chipid_params.flash_pagesize, set by stlink_load_device_params()
|
||||
|
||||
/* sram settings */
|
||||
stm32_addr_t sram_base; // STM32_SRAM_BASE, set by stlink_load_device_params()
|
||||
uint32_t sram_size; // stlink_chipid_params.sram_size, set by stlink_load_device_params()
|
||||
stm32_addr_t sram_base; // STM32_SRAM_BASE, set by stlink_load_device_params()
|
||||
uint32_t sram_size; // stlink_chipid_params.sram_size, set by stlink_load_device_params()
|
||||
|
||||
/* option settings */
|
||||
stm32_addr_t option_base;
|
||||
|
|
@ -224,14 +225,14 @@ struct _stlink {
|
|||
// bootloader
|
||||
// sys_base and sys_size are not used by the tools, but are only there to download the bootloader code
|
||||
// (see tests/sg.c)
|
||||
stm32_addr_t sys_base; // stlink_chipid_params.bootrom_base, set by stlink_load_device_params()
|
||||
uint32_t sys_size; // stlink_chipid_params.bootrom_size, set by stlink_load_device_params()
|
||||
stm32_addr_t sys_base; // stlink_chipid_params.bootrom_base, set by stlink_load_device_params()
|
||||
uint32_t sys_size; // stlink_chipid_params.bootrom_size, set by stlink_load_device_params()
|
||||
|
||||
struct stlink_version_ version;
|
||||
|
||||
uint32_t chip_flags; // stlink_chipid_params.flags, set by stlink_load_device_params(), values: CHIP_F_xxx
|
||||
uint32_t chip_flags; // stlink_chipid_params.flags, set by stlink_load_device_params(), values: CHIP_F_xxx
|
||||
|
||||
uint32_t max_trace_freq; // set by stlink_open_usb()
|
||||
uint32_t max_trace_freq; // set by stlink_open_usb()
|
||||
|
||||
uint32_t otp_base;
|
||||
uint32_t otp_size;
|
||||
|
|
@ -254,9 +255,6 @@ int32_t stlink_current_mode(stlink_t *sl);
|
|||
int32_t stlink_force_debug(stlink_t *sl);
|
||||
int32_t stlink_target_voltage(stlink_t *sl);
|
||||
int32_t stlink_set_swdclk(stlink_t *sl, int32_t freq_khz);
|
||||
int32_t stlink_trace_enable(stlink_t* sl, uint32_t frequency);
|
||||
int32_t stlink_trace_disable(stlink_t* sl);
|
||||
int32_t stlink_trace_read(stlink_t* sl, uint8_t* buf, uint32_t size);
|
||||
int32_t stlink_parse_ihex(const char* path, uint8_t erased_pattern, uint8_t* *mem, uint32_t* size, uint32_t* begin);
|
||||
uint8_t stlink_get_erased_pattern(stlink_t *sl);
|
||||
int32_t stlink_mwrite_sram(stlink_t *sl, uint8_t* data, uint32_t length, stm32_addr_t addr);
|
||||
|
|
@ -273,7 +271,13 @@ int32_t stlink_fread(stlink_t* sl, const char* path, bool is_ihex, stm32_addr_t
|
|||
int32_t stlink_load_device_params(stlink_t *sl);
|
||||
int32_t stlink_target_connect(stlink_t *sl, enum connect_type connect);
|
||||
|
||||
#include <chipid.h>
|
||||
#include <commands.h>
|
||||
#include <flash_loader.h>
|
||||
#include <sg.h>
|
||||
#include <usb.h>
|
||||
#include <version.h>
|
||||
#include <logging.h>
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
|
|
|||
|
|
@ -152,12 +152,12 @@
|
|||
|
||||
// F7 Flash status register
|
||||
#define FLASH_F7_SR_BSY 16
|
||||
#define FLASH_F7_SR_ERS_ERR 7 /* Erase Sequence Error */
|
||||
#define FLASH_F7_SR_PGP_ERR 6 /* Programming parallelism error */
|
||||
#define FLASH_F7_SR_PGA_ERR 5 /* Programming alignment error */
|
||||
#define FLASH_F7_SR_WRP_ERR 4 /* Write protection error */
|
||||
#define FLASH_F7_SR_OP_ERR 1 /* Operation error */
|
||||
#define FLASH_F7_SR_EOP 0 /* End of operation */
|
||||
#define FLASH_F7_SR_ERS_ERR 7 /* Erase Sequence Error */
|
||||
#define FLASH_F7_SR_PGP_ERR 6 /* Programming parallelism error */
|
||||
#define FLASH_F7_SR_PGA_ERR 5 /* Programming alignment error */
|
||||
#define FLASH_F7_SR_WRP_ERR 4 /* Write protection error */
|
||||
#define FLASH_F7_SR_OP_ERR 1 /* Operation error */
|
||||
#define FLASH_F7_SR_EOP 0 /* End of operation */
|
||||
#define FLASH_F7_SR_ERROR_MASK \
|
||||
((1 << FLASH_F7_SR_ERS_ERR) | (1 << FLASH_F7_SR_PGP_ERR) | \
|
||||
(1 << FLASH_F7_SR_PGA_ERR) | (1 << FLASH_F7_SR_WRP_ERR) | \
|
||||
|
|
@ -196,8 +196,8 @@
|
|||
#define FLASH_Gx_SR_PROGERR (3)
|
||||
#define FLASH_Gx_SR_WRPERR (4)
|
||||
#define FLASH_Gx_SR_PGAERR (5)
|
||||
#define FLASH_Gx_SR_BSY (16) /* FLASH_SR Busy */
|
||||
#define FLASH_Gx_SR_EOP (0) /* FLASH_EOP End of Operation */
|
||||
#define FLASH_Gx_SR_BSY (16) /* FLASH_SR Busy */
|
||||
#define FLASH_Gx_SR_EOP (0) /* FLASH_EOP End of Operation */
|
||||
|
||||
// == STM32G0 == (RM0444 Table 1, sec. 3.7)
|
||||
// Mostly the same as G4 chips, but the notation
|
||||
|
|
@ -272,8 +272,8 @@
|
|||
#define FLASH_H7_SR_WRPERR 17
|
||||
#define FLASH_H7_SR_PGSERR 18
|
||||
#define FLASH_H7_SR_STRBERR 19
|
||||
#define FLASH_H7_SR_ERROR_MASK \
|
||||
((1 << FLASH_H7_SR_PGSERR) | (1 << FLASH_H7_SR_STRBERR) | \
|
||||
#define FLASH_H7_SR_ERROR_MASK \
|
||||
((1 << FLASH_H7_SR_PGSERR) | (1 << FLASH_H7_SR_STRBERR) | \
|
||||
(1 << FLASH_H7_SR_WRPERR))
|
||||
|
||||
// == STM32L0/L1/L4/L5 ==
|
||||
|
|
@ -332,27 +332,27 @@
|
|||
#define FLASH_L4_OPTR (FLASH_REGS_ADDR + 0x20)
|
||||
|
||||
// L4 Flash status register
|
||||
#define FLASH_L4_SR_ERROR_MASK 0x3f8 /* SR [9:3] */
|
||||
#define FLASH_L4_SR_ERROR_MASK 0x3f8 // SR [9:3]
|
||||
#define FLASH_L4_SR_PROGERR 3
|
||||
#define FLASH_L4_SR_WRPERR 4
|
||||
#define FLASH_L4_SR_PGAERR 5
|
||||
#define FLASH_L4_SR_BSY 16
|
||||
|
||||
// L4 Flash control register
|
||||
#define FLASH_L4_CR_LOCK 31 /* Lock control register */
|
||||
#define FLASH_L4_CR_OPTLOCK 30 /* Lock option bytes */
|
||||
#define FLASH_L4_CR_PG 0 /* Program */
|
||||
#define FLASH_L4_CR_PER 1 /* Page erase */
|
||||
#define FLASH_L4_CR_MER1 2 /* Bank 1 erase */
|
||||
#define FLASH_L4_CR_MER2 15 /* Bank 2 erase */
|
||||
#define FLASH_L4_CR_STRT 16 /* Start command */
|
||||
#define FLASH_L4_CR_OPTSTRT 17 /* Start writing option bytes */
|
||||
#define FLASH_L4_CR_BKER 11 /* Bank select for page erase */
|
||||
#define FLASH_L4_CR_PNB 3 /* Page number (8 bits) */
|
||||
#define FLASH_L4_CR_OBL_LAUNCH 27 /* Option bytes reload */
|
||||
#define FLASH_L4_CR_LOCK 31 /* Lock control register */
|
||||
#define FLASH_L4_CR_OPTLOCK 30 /* Lock option bytes */
|
||||
#define FLASH_L4_CR_PG 0 /* Program */
|
||||
#define FLASH_L4_CR_PER 1 /* Page erase */
|
||||
#define FLASH_L4_CR_MER1 2 /* Bank 1 erase */
|
||||
#define FLASH_L4_CR_MER2 15 /* Bank 2 erase */
|
||||
#define FLASH_L4_CR_STRT 16 /* Start command */
|
||||
#define FLASH_L4_CR_OPTSTRT 17 /* Start writing option bytes */
|
||||
#define FLASH_L4_CR_BKER 11 /* Bank select for page erase */
|
||||
#define FLASH_L4_CR_PNB 3 /* Page number (8 bits) */
|
||||
#define FLASH_L4_CR_OBL_LAUNCH 27 /* Option bytes reload */
|
||||
// Bits requesting flash operations (useful when we want to clear them)
|
||||
#define FLASH_L4_CR_OPBITS \
|
||||
(uint32_t)((1lu << FLASH_L4_CR_PG) | (1lu << FLASH_L4_CR_PER) | \
|
||||
#define FLASH_L4_CR_OPBITS \
|
||||
(uint32_t)((1lu << FLASH_L4_CR_PG) | (1lu << FLASH_L4_CR_PER) | \
|
||||
(1lu << FLASH_L4_CR_MER1) | (1lu << FLASH_L4_CR_MER1))
|
||||
// Page is fully specified by BKER and PNB
|
||||
#define FLASH_L4_CR_PAGEMASK (uint32_t)(0x1fflu << FLASH_L4_CR_PNB)
|
||||
|
|
@ -428,10 +428,10 @@
|
|||
#define FLASH_WB_CR_LOCK (31) /* Lock */
|
||||
|
||||
// WB Flash status register
|
||||
#define FLASH_WB_SR_ERROR_MASK (0x3f8) /* SR [9:3] */
|
||||
#define FLASH_WB_SR_PROGERR (3) /* Programming alignment error */
|
||||
#define FLASH_WB_SR_WRPERR (4) /* Write protection error */
|
||||
#define FLASH_WB_SR_PGAERR (5) /* Programming error */
|
||||
#define FLASH_WB_SR_BSY (16) /* Busy */
|
||||
#define FLASH_WB_SR_ERROR_MASK (0x3f8) // SR [9:3]
|
||||
#define FLASH_WB_SR_PROGERR (3) /* Programming alignment error */
|
||||
#define FLASH_WB_SR_WRPERR (4) /* Write protection error */
|
||||
#define FLASH_WB_SR_PGAERR (5) /* Programming error */
|
||||
#define FLASH_WB_SR_BSY (16) /* Busy */
|
||||
|
||||
#endif // STM32FLASH_H
|
||||
|
|
|
|||
|
|
@ -97,6 +97,20 @@ BOOL WINAPI CtrlHandler(DWORD fdwCtrlType) {
|
|||
}
|
||||
#endif
|
||||
|
||||
int32_t stlink_trace_enable(stlink_t *sl, uint32_t frequency) {
|
||||
DLOG("*** stlink_trace_enable ***\n");
|
||||
return (sl->backend->trace_enable(sl, frequency));
|
||||
}
|
||||
|
||||
int32_t stlink_trace_disable(stlink_t *sl) {
|
||||
DLOG("*** stlink_trace_disable ***\n");
|
||||
return (sl->backend->trace_disable(sl));
|
||||
}
|
||||
|
||||
int32_t stlink_trace_read(stlink_t *sl, uint8_t *buf, uint32_t size) {
|
||||
return (sl->backend->trace_read(sl, buf, size));
|
||||
}
|
||||
|
||||
static void usage(void) {
|
||||
puts("st-trace - usage:");
|
||||
puts(" -h, --help Print this help");
|
||||
|
|
@ -112,8 +126,7 @@ static void usage(void) {
|
|||
puts(" -f, --force Ignore most initialization errors");
|
||||
}
|
||||
|
||||
static bool parse_frequency(char* text, uint32_t* result)
|
||||
{
|
||||
static bool parse_frequency(char* text, uint32_t* result) {
|
||||
if (text == NULL) {
|
||||
ELOG("Invalid frequency.\n");
|
||||
return false;
|
||||
|
|
@ -193,12 +206,10 @@ bool parse_options(int32_t argc, char **argv, st_settings_t *settings) {
|
|||
ugly_init(settings->logging_level);
|
||||
break;
|
||||
case 'c':
|
||||
if (!parse_frequency(optarg, &settings->core_frequency))
|
||||
error = true;
|
||||
if (!parse_frequency(optarg, &settings->core_frequency)) error = true;
|
||||
break;
|
||||
case 't':
|
||||
if (!parse_frequency(optarg, &settings->trace_frequency))
|
||||
error = true;
|
||||
if (!parse_frequency(optarg, &settings->trace_frequency)) error = true;
|
||||
break;
|
||||
case 'n':
|
||||
settings->reset_board = false;
|
||||
|
|
@ -226,29 +237,24 @@ bool parse_options(int32_t argc, char **argv, st_settings_t *settings) {
|
|||
error = true;
|
||||
}
|
||||
|
||||
if (error && !settings->force)
|
||||
return false;
|
||||
if (error && !settings->force) return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static stlink_t *stlink_connect(const st_settings_t *settings) {
|
||||
return stlink_open_usb(settings->logging_level, false,
|
||||
settings->serial_number, 0);
|
||||
return stlink_open_usb(settings->logging_level, false, settings->serial_number, 0);
|
||||
}
|
||||
|
||||
static bool enable_trace(stlink_t *stlink, const st_settings_t *settings,
|
||||
uint32_t trace_frequency) {
|
||||
static bool enable_trace(stlink_t *stlink, const st_settings_t *settings, uint32_t trace_frequency) {
|
||||
|
||||
if (stlink_force_debug(stlink)) {
|
||||
ELOG("Unable to debug device\n");
|
||||
if (!settings->force)
|
||||
return false;
|
||||
if (!settings->force) return false;
|
||||
}
|
||||
if (settings->reset_board && stlink_reset(stlink, RESET_SOFT_AND_HALT)) {
|
||||
ELOG("Unable to reset device\n");
|
||||
if (!settings->force)
|
||||
return false;
|
||||
if (!settings->force) return false;
|
||||
}
|
||||
|
||||
stlink_write_debug32(stlink, STLINK_REG_DHCSR,
|
||||
|
|
@ -262,29 +268,24 @@ static bool enable_trace(stlink_t *stlink, const st_settings_t *settings,
|
|||
stlink_write_debug32(stlink, STLINK_REG_DWT_FUNCTION2, 0);
|
||||
stlink_write_debug32(stlink, STLINK_REG_DWT_FUNCTION3, 0);
|
||||
stlink_write_debug32(stlink, STLINK_REG_DWT_CTRL, 0);
|
||||
stlink_write_debug32(
|
||||
stlink, STLINK_REG_DBGMCU_CR,
|
||||
stlink_write_debug32(stlink, STLINK_REG_DBGMCU_CR,
|
||||
STLINK_REG_DBGMCU_CR_DBG_SLEEP | STLINK_REG_DBGMCU_CR_DBG_STOP |
|
||||
STLINK_REG_DBGMCU_CR_DBG_STANDBY | STLINK_REG_DBGMCU_CR_TRACE_IOEN |
|
||||
STLINK_REG_DBGMCU_CR_TRACE_MODE_ASYNC);
|
||||
|
||||
if (stlink_trace_enable(stlink, trace_frequency)) {
|
||||
ELOG("Unable to turn on tracing in stlink\n");
|
||||
if (!settings->force)
|
||||
return false;
|
||||
if (!settings->force) return false;
|
||||
}
|
||||
|
||||
stlink_write_debug32(stlink, STLINK_REG_TPI_CSPSR,
|
||||
STLINK_REG_TPI_CSPSR_PORT_SIZE_1);
|
||||
stlink_write_debug32(stlink, STLINK_REG_TPI_CSPSR, STLINK_REG_TPI_CSPSR_PORT_SIZE_1);
|
||||
|
||||
if (settings->core_frequency) {
|
||||
uint32_t prescaler = settings->core_frequency / trace_frequency - 1;
|
||||
if (prescaler > STLINK_REG_TPI_ACPR_MAX) {
|
||||
ELOG("Trace frequency prescaler %d out of range. Try setting a faster "
|
||||
"trace frequency.\n",
|
||||
prescaler);
|
||||
if (!settings->force)
|
||||
return false;
|
||||
ELOG("Trace frequency prescaler %d out of range. Try setting a faster "
|
||||
"trace frequency.\n", prescaler);
|
||||
if (!settings->force) return false;
|
||||
}
|
||||
stlink_write_debug32(stlink, STLINK_REG_TPI_ACPR,
|
||||
prescaler); // Set TPIU_ACPR clock divisor
|
||||
|
|
@ -294,12 +295,11 @@ static bool enable_trace(stlink_t *stlink, const st_settings_t *settings,
|
|||
stlink_write_debug32(stlink, STLINK_REG_TPI_SPPR,
|
||||
STLINK_REG_TPI_SPPR_SWO_NRZ);
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_LAR, STLINK_REG_ITM_LAR_KEY);
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_TCC,
|
||||
0x00000400); // Set sync counter
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_TCC, 0x00000400); // Set sync counter
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_TCR,
|
||||
STLINK_REG_ITM_TCR_TRACE_BUS_ID_1 |
|
||||
STLINK_REG_ITM_TCR_TS_ENA |
|
||||
STLINK_REG_ITM_TCR_ITM_ENA);
|
||||
STLINK_REG_ITM_TCR_TS_ENA |
|
||||
STLINK_REG_ITM_TCR_ITM_ENA);
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_TER,
|
||||
STLINK_REG_ITM_TER_PORTS_ALL);
|
||||
stlink_write_debug32(stlink, STLINK_REG_ITM_TPR,
|
||||
|
|
@ -333,9 +333,7 @@ static bool enable_trace(stlink_t *stlink, const st_settings_t *settings,
|
|||
static trace_state update_trace_idle(st_trace_t *trace, uint8_t c) {
|
||||
// Handle a trace byte when we are in the idle state.
|
||||
|
||||
if (TRACE_OP_IS_TARGET_SOURCE(c)) {
|
||||
return TRACE_STATE_TARGET_SOURCE;
|
||||
}
|
||||
if (TRACE_OP_IS_TARGET_SOURCE(c)) return TRACE_STATE_TARGET_SOURCE;
|
||||
|
||||
if (TRACE_OP_IS_SOURCE(c)) {
|
||||
uint8_t size = TRACE_OP_GET_SOURCE_SIZE(c);
|
||||
|
|
@ -345,36 +343,28 @@ static trace_state update_trace_idle(st_trace_t *trace, uint8_t c) {
|
|||
WLOG("Unsupported source 0x%x size %d\n", addr, size);
|
||||
trace->unknown_sources |= (1 << addr);
|
||||
}
|
||||
if (size == 1)
|
||||
return TRACE_STATE_SKIP_1;
|
||||
if (size == 2)
|
||||
return TRACE_STATE_SKIP_2;
|
||||
if (size == 3)
|
||||
return TRACE_STATE_SKIP_4;
|
||||
if (size == 1) return TRACE_STATE_SKIP_1;
|
||||
if (size == 2) return TRACE_STATE_SKIP_2;
|
||||
if (size == 3) return TRACE_STATE_SKIP_4;
|
||||
}
|
||||
|
||||
if (TRACE_OP_IS_LOCAL_TIME(c) || TRACE_OP_IS_GLOBAL_TIME(c)) {
|
||||
trace->count_time_packets++;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME
|
||||
: TRACE_STATE_IDLE;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME : TRACE_STATE_IDLE;
|
||||
}
|
||||
|
||||
if (TRACE_OP_IS_EXTENSION(c)) {
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME
|
||||
: TRACE_STATE_IDLE;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME : TRACE_STATE_IDLE;
|
||||
}
|
||||
|
||||
if (TRACE_OP_IS_OVERFLOW(c)) {
|
||||
trace->count_hw_overflow++;
|
||||
}
|
||||
if (TRACE_OP_IS_OVERFLOW(c)) trace->count_hw_overflow++;
|
||||
|
||||
if (!(trace->unknown_opcodes[c / 8] & (1 << c % 8)))
|
||||
WLOG("Unknown opcode 0x%02x\n", c);
|
||||
trace->unknown_opcodes[c / 8] |= (1 << c % 8);
|
||||
|
||||
trace->count_error++;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME
|
||||
: TRACE_STATE_IDLE;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME : TRACE_STATE_IDLE;
|
||||
}
|
||||
|
||||
static trace_state update_trace(st_trace_t *trace, uint8_t c) {
|
||||
|
|
@ -383,8 +373,7 @@ static trace_state update_trace(st_trace_t *trace, uint8_t c) {
|
|||
// Parse the input using a state machine.
|
||||
|
||||
if (trace->state == TRACE_STATE_UNKNOWN) {
|
||||
if (TRACE_OP_IS_TARGET_SOURCE(c) || TRACE_OP_IS_LOCAL_TIME(c) ||
|
||||
TRACE_OP_IS_GLOBAL_TIME(c))
|
||||
if (TRACE_OP_IS_TARGET_SOURCE(c) || TRACE_OP_IS_LOCAL_TIME(c) || TRACE_OP_IS_GLOBAL_TIME(c))
|
||||
trace->state = TRACE_STATE_IDLE;
|
||||
}
|
||||
|
||||
|
|
@ -394,14 +383,12 @@ static trace_state update_trace(st_trace_t *trace, uint8_t c) {
|
|||
|
||||
case TRACE_STATE_TARGET_SOURCE:
|
||||
putchar(c);
|
||||
if (c == '\n')
|
||||
fflush(stdout);
|
||||
if (c == '\n') fflush(stdout);
|
||||
trace->count_target_data++;
|
||||
return TRACE_STATE_IDLE;
|
||||
|
||||
case TRACE_STATE_SKIP_FRAME:
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME
|
||||
: TRACE_STATE_IDLE;
|
||||
return TRACE_OP_GET_CONTINUATION(c) ? TRACE_STATE_SKIP_FRAME : TRACE_STATE_IDLE;
|
||||
|
||||
case TRACE_STATE_SKIP_4:
|
||||
return TRACE_STATE_SKIP_3;
|
||||
|
|
@ -425,7 +412,7 @@ static trace_state update_trace(st_trace_t *trace, uint8_t c) {
|
|||
}
|
||||
|
||||
static bool read_trace(stlink_t *stlink, st_trace_t *trace) {
|
||||
uint8_t buffer[STLINK_TRACE_BUF_LEN];
|
||||
uint8_t* buffer = 0;
|
||||
int32_t length = stlink_trace_read(stlink, buffer, sizeof(buffer));
|
||||
|
||||
if (length < 0) {
|
||||
|
|
@ -453,8 +440,7 @@ static bool read_trace(stlink_t *stlink, st_trace_t *trace) {
|
|||
return true;
|
||||
}
|
||||
|
||||
static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace,
|
||||
uint32_t trace_frequency) {
|
||||
static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace, uint32_t trace_frequency) {
|
||||
// Only check configuration one time after the first 10 seconds of running.
|
||||
time_t elapsed_time_s = time(NULL) - trace->start_time;
|
||||
if (trace->configuration_checked || elapsed_time_s < 10) {
|
||||
|
|
@ -469,8 +455,7 @@ static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace,
|
|||
bool error_bad_data = (trace->count_error > 1 || trace->unknown_sources > 0);
|
||||
bool error_dropped_data = (trace->count_sw_overflow > 0);
|
||||
|
||||
if (!error_no_data && !error_low_data && !error_bad_data &&
|
||||
!error_dropped_data)
|
||||
if (!error_no_data && !error_low_data && !error_bad_data && !error_dropped_data)
|
||||
return;
|
||||
|
||||
WLOG("****\n");
|
||||
|
|
@ -487,8 +472,7 @@ static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace,
|
|||
stlink_read_debug32(stlink, STLINK_REG_TPI_ACPR, &prescaler);
|
||||
if (prescaler) {
|
||||
uint32_t system_clock_speed = (prescaler + 1) * trace_frequency;
|
||||
WLOG("Verify the system clock is running at %d Hz.\n",
|
||||
system_clock_speed);
|
||||
WLOG("Verify the system clock is running at %d Hz.\n", system_clock_speed);
|
||||
}
|
||||
WLOG("Try specifying the system clock with the --clock=XX command line "
|
||||
"option.\n");
|
||||
|
|
@ -510,11 +494,8 @@ static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace,
|
|||
uint32_t offset = 0;
|
||||
for (uint32_t i = 0; i <= 0xFF; i++)
|
||||
if (trace->unknown_opcodes[i / 8] & (1 << i % 8)) {
|
||||
uint32_t n =
|
||||
snprintf(buffer + offset, sizeof(buffer) - offset, "%02x, ", i);
|
||||
if (n >= sizeof(buffer) - offset) {
|
||||
break;
|
||||
}
|
||||
uint32_t n = snprintf(buffer + offset, sizeof(buffer) - offset, "%02x, ", i);
|
||||
if (n >= sizeof(buffer) - offset) break;
|
||||
offset += n;
|
||||
}
|
||||
WLOG("Unknown Opcodes: %s\n", buffer);
|
||||
|
|
@ -523,11 +504,8 @@ static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace,
|
|||
offset = 0;
|
||||
for (uint32_t i = 0; i < 32; i++)
|
||||
if (trace->unknown_sources & (1 << i)) {
|
||||
uint32_t n =
|
||||
snprintf(buffer + offset, sizeof(buffer) - offset, "%d, ", i);
|
||||
if (n >= sizeof(buffer) - offset) {
|
||||
break;
|
||||
}
|
||||
uint32_t n = snprintf(buffer + offset, sizeof(buffer) - offset, "%d, ", i);
|
||||
if (n >= sizeof(buffer) - offset) break;
|
||||
offset += n;
|
||||
}
|
||||
WLOG("Unknown Sources: %s\n", buffer);
|
||||
|
|
@ -583,48 +561,38 @@ int32_t main(int32_t argc, char **argv) {
|
|||
|
||||
if (stlink->chip_id == STM32_CHIPID_UNKNOWN) {
|
||||
ELOG("Your stlink is not connected to a device\n");
|
||||
if (!settings.force)
|
||||
return APP_RESULT_STLINK_MISSING_DEVICE;
|
||||
if (!settings.force) return APP_RESULT_STLINK_MISSING_DEVICE;
|
||||
}
|
||||
|
||||
if (!(stlink->version.flags & STLINK_F_HAS_TRACE)) {
|
||||
ELOG("Your stlink does not support tracing\n");
|
||||
if (!settings.force)
|
||||
return APP_RESULT_STLINK_UNSUPPORTED_LINK;
|
||||
if (!settings.force) return APP_RESULT_STLINK_UNSUPPORTED_LINK;
|
||||
}
|
||||
|
||||
if (!(stlink->chip_flags & CHIP_F_HAS_SWO_TRACING)) {
|
||||
const struct stlink_chipid_params *params =
|
||||
stlink_chipid_get_params(stlink->chip_id);
|
||||
ELOG("We do not support SWO output for device '%s'\n",
|
||||
params ? params->dev_type : "");
|
||||
if (!settings.force)
|
||||
return APP_RESULT_STLINK_UNSUPPORTED_DEVICE;
|
||||
const struct stlink_chipid_params *params = stlink_chipid_get_params(stlink->chip_id);
|
||||
ELOG("We do not support SWO output for device '%s'\n", params ? params->dev_type : "");
|
||||
if (!settings.force) return APP_RESULT_STLINK_UNSUPPORTED_DEVICE;
|
||||
}
|
||||
|
||||
uint32_t trace_frequency = settings.trace_frequency;
|
||||
if (!trace_frequency)
|
||||
trace_frequency = STLINK_DEFAULT_TRACE_FREQUENCY;
|
||||
if (!trace_frequency) trace_frequency = STLINK_DEFAULT_TRACE_FREQUENCY;
|
||||
uint32_t max_trace_freq = stlink->max_trace_freq;
|
||||
uint32_t min_trace_freq = 0;
|
||||
|
||||
if (settings.core_frequency != 0) {
|
||||
if (max_trace_freq > settings.core_frequency / 5)
|
||||
max_trace_freq = settings.core_frequency / 5;
|
||||
if (max_trace_freq > settings.core_frequency / 5) max_trace_freq = settings.core_frequency / 5;
|
||||
min_trace_freq = settings.core_frequency / (STLINK_REG_TPI_ACPR_MAX + 1);
|
||||
}
|
||||
if (trace_frequency > max_trace_freq ||
|
||||
trace_frequency < min_trace_freq) {
|
||||
ELOG("Invalid trace frequency %d (min %d max %d)\n", trace_frequency,
|
||||
min_trace_freq, max_trace_freq);
|
||||
if (!settings.force)
|
||||
return APP_RESULT_UNSUPPORTED_TRACE_FREQUENCY;
|
||||
if (trace_frequency > max_trace_freq || trace_frequency < min_trace_freq) {
|
||||
ELOG("Invalid trace frequency %d (min %d max %d)\n", trace_frequency, min_trace_freq,
|
||||
max_trace_freq);
|
||||
if (!settings.force) return APP_RESULT_UNSUPPORTED_TRACE_FREQUENCY;
|
||||
}
|
||||
|
||||
if (!enable_trace(stlink, &settings, trace_frequency)) {
|
||||
ELOG("Unable to enable trace mode\n");
|
||||
if (!settings.force)
|
||||
return APP_RESULT_STLINK_STATE_ERROR;
|
||||
if (!settings.force) return APP_RESULT_STLINK_STATE_ERROR;
|
||||
}
|
||||
|
||||
ILOG("Reading Trace\n");
|
||||
|
|
@ -634,8 +602,7 @@ int32_t main(int32_t argc, char **argv) {
|
|||
|
||||
if (stlink_run(stlink, RUN_NORMAL)) {
|
||||
ELOG("Unable to run device\n");
|
||||
if (!settings.force)
|
||||
return APP_RESULT_STLINK_STATE_ERROR;
|
||||
if (!settings.force) return APP_RESULT_STLINK_STATE_ERROR;
|
||||
}
|
||||
|
||||
while (!g_abort_trace && read_trace(stlink, &trace)) {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* File: trace.h
|
||||
*
|
||||
* Tool st-trace
|
||||
*/
|
||||
|
||||
#ifndef TRACE_H
|
||||
#define TRACE_H
|
||||
|
||||
int32_t stlink_trace_enable(stlink_t* sl, uint32_t frequency);
|
||||
int32_t stlink_trace_disable(stlink_t* sl);
|
||||
int32_t stlink_trace_read(stlink_t* sl, uint8_t* buf, uint32_t size);
|
||||
|
||||
static void usage(void);
|
||||
static bool parse_frequency(char* text, uint32_t* result);
|
||||
bool parse_options(int32_t argc, char **argv, st_settings_t *settings);
|
||||
static stlink_t *stlink_connect(const st_settings_t *settings);
|
||||
static bool enable_trace(stlink_t *stlink, const st_settings_t *settings, uint32_t trace_frequency);
|
||||
static trace_state update_trace_idle(st_trace_t *trace, uint8_t c);
|
||||
static trace_state update_trace(st_trace_t *trace, uint8_t c);
|
||||
static bool read_trace(stlink_t *stlink, st_trace_t *trace);
|
||||
static void check_for_configuration_error(stlink_t *stlink, st_trace_t *trace, uint32_t trace_frequency);
|
||||
|
||||
#endif // TRACE_H
|
||||
|
|
@ -29,6 +29,7 @@
|
|||
#include <stlink.h>
|
||||
#include "gdb-server.h"
|
||||
#include "gdb-remote.h"
|
||||
#include "memory-map.h"
|
||||
#include "semihosting.h"
|
||||
|
||||
#include <chipid.h>
|
||||
|
|
@ -344,219 +345,6 @@ static const char* const target_description =
|
|||
" </feature>"
|
||||
"</target>";
|
||||
|
||||
static const char* const memory_map_template_F4 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // sram
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0xE0000\">" // Sectors 5..11
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F4_HD =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x40000\"/>" // sram
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x10000000\"/>" // fmc bank 1 (nor/psram/sram)
|
||||
" <memory type=\"ram\" start=\"0x70000000\" length=\"0x20000000\"/>" // fmc bank 2 & 3 (nand flash)
|
||||
" <memory type=\"ram\" start=\"0x90000000\" length=\"0x10000000\"/>" // fmc bank 4 (pc card)
|
||||
" <memory type=\"ram\" start=\"0xC0000000\" length=\"0x20000000\"/>" // fmc sdram bank 1 & 2
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0xE0000\">" // Sectors 5..11
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F2 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // sram
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x%x\">" // Sectors 5..
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_L4 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x8000\"/>" // SRAM2 (32kB)
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x18000\"/>" // SRAM1 (96kB)
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x800</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7000\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x10\"/>" // option byte area
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_L496 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // SRAM2 (64kB)
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x50000\"/>" // SRAM1 + aliased SRAM2 (256 + 64 = 320kB)
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x800</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7000\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x10\"/>" // option byte area
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // sram 8kB
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F7 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"ram\" start=\"0x00000000\" length=\"0x4000\"/>" // ITCM ram 16kB
|
||||
" <memory type=\"rom\" start=\"0x00200000\" length=\"0x100000\"/>" // ITCM flash
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // sram
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x20000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x8000</property>" // 32kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x20000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08040000\" length=\"0xC0000\">" // Sectors 5..7
|
||||
" <property name=\"blocksize\">0x40000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x00100000\" length=\"0xEDC0\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x20\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_H7 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x10000\"/>" // ITCMRAM 64kB
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // DTCMRAM 128kB
|
||||
" <memory type=\"ram\" start=\"0x24000000\" length=\"0x80000\"/>" // RAM D1 512kB
|
||||
" <memory type=\"ram\" start=\"0x30000000\" length=\"0x48000\"/>" // RAM D2 288kB
|
||||
" <memory type=\"ram\" start=\"0x38000000\" length=\"0x10000\"/>" // RAM D3 64kB
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1ff00000\" length=\"0x20000\"/>" // bootrom
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_H72x3x =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x40000\"/>" // ITCMRAM 64kB + Optional remap
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // DTCMRAM 128kB
|
||||
" <memory type=\"ram\" start=\"0x24000000\" length=\"0x80000\"/>" // RAM D1 320kB
|
||||
" <memory type=\"ram\" start=\"0x30000000\" length=\"0x08000\"/>" // RAM D2 23kB
|
||||
" <memory type=\"ram\" start=\"0x38000000\" length=\"0x04000\"/>" // RAM D3 16kB
|
||||
" <memory type=\"ram\" start=\"0x38800000\" length=\"0x01000\"/>" // Backup RAM 4kB
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x3fffffff\"/>" // External Memory
|
||||
" <memory type=\"ram\" start=\"0xC0000000\" length=\"0x1fffffff\"/>" // External device
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1ff00000\" length=\"0x20000\"/>" // bootrom
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F4_DE =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x80000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x18000\"/>" // sram
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x60000\">" // Sectors 5..7
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x210\"/>" // otp
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
char* make_memory_map(stlink_t *sl) {
|
||||
// this will be freed in serve()
|
||||
const uint32_t sz = 4096;
|
||||
|
|
|
|||
|
|
@ -0,0 +1,217 @@
|
|||
#ifndef MEMORY_MAP_H
|
||||
#define MEMORY_MAP_H
|
||||
|
||||
static const char* const memory_map_template_F4 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // sram
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0...3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0xE0000\">" // Sectors 5...11
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F4_HD =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x100000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // ccm ram
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x40000\"/>" // sram
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x10000000\"/>" // fmc bank 1 (nor/psram/sram)
|
||||
" <memory type=\"ram\" start=\"0x70000000\" length=\"0x20000000\"/>" // fmc bank 2 & 3 (nand flash)
|
||||
" <memory type=\"ram\" start=\"0x90000000\" length=\"0x10000000\"/>" // fmc bank 4 (pc card)
|
||||
" <memory type=\"ram\" start=\"0xC0000000\" length=\"0x20000000\"/>" // fmc sdram bank 1 & 2
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0...3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0xE0000\">" // Sectors 5...11
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F2 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // SRAM
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0...3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x%x\">" // Sectors 5...
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_L4 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x8000\"/>" // SRAM2 (32 kB)
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x18000\"/>" // SRAM1 (96 kB)
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x800</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7000\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x10\"/>" // option byte area
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_L496 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x10000000\" length=\"0x10000\"/>" // SRAM2 (64 kB)
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x50000\"/>" // SRAM1 + aliased SRAM2 (256 + 64 = 320 kB)
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x800</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7000\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x10\"/>" // option byte area
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x%x\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // SRAM (8 kB)
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x%08x\" length=\"0x%x\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1ffff800\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F7 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"ram\" start=\"0x00000000\" length=\"0x4000\"/>" // ITCM ram 16 kB
|
||||
" <memory type=\"rom\" start=\"0x00200000\" length=\"0x100000\"/>" // ITCM flash
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x%x\"/>" // SRAM
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x20000\">" // Sectors 0...3
|
||||
" <property name=\"blocksize\">0x8000</property>" // 32 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x20000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08040000\" length=\"0xC0000\">" // Sectors 5...7
|
||||
" <property name=\"blocksize\">0x40000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x7fffffff\"/>" // AHB3 Peripherals
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x00100000\" length=\"0xEDC0\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x20\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_H7 =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x10000\"/>" // ITCMRAM 64 kB
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // DTCMRAM 128 kB
|
||||
" <memory type=\"ram\" start=\"0x24000000\" length=\"0x80000\"/>" // RAM D1 512 kB
|
||||
" <memory type=\"ram\" start=\"0x30000000\" length=\"0x48000\"/>" // RAM D2 288 kB
|
||||
" <memory type=\"ram\" start=\"0x38000000\" length=\"0x10000\"/>" // RAM D3 64 kB
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1ff00000\" length=\"0x20000\"/>" // bootrom
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_H72x3x =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x40000\"/>" // ITCMRAM 64 kB + Optional remap
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x20000\"/>" // DTCMRAM 128 kB
|
||||
" <memory type=\"ram\" start=\"0x24000000\" length=\"0x80000\"/>" // RAM D1 320 kB
|
||||
" <memory type=\"ram\" start=\"0x30000000\" length=\"0x08000\"/>" // RAM D2 23 kB
|
||||
" <memory type=\"ram\" start=\"0x38000000\" length=\"0x04000\"/>" // RAM D3 16 kB
|
||||
" <memory type=\"ram\" start=\"0x38800000\" length=\"0x01000\"/>" // Backup RAM 4 kB
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x%x\">"
|
||||
" <property name=\"blocksize\">0x%x</property>"
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0x60000000\" length=\"0x3fffffff\"/>" // External Memory
|
||||
" <memory type=\"ram\" start=\"0xC0000000\" length=\"0x1fffffff\"/>" // External device
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1ff00000\" length=\"0x20000\"/>" // bootrom
|
||||
"</memory-map>";
|
||||
|
||||
static const char* const memory_map_template_F4_DE =
|
||||
"<?xml version=\"1.0\"?>"
|
||||
"<!DOCTYPE memory-map PUBLIC \"+//IDN gnu.org//DTD GDB Memory Map V1.0//EN\""
|
||||
" \"http://sourceware.org/gdb/gdb-memory-map.dtd\">"
|
||||
"<memory-map>"
|
||||
" <memory type=\"rom\" start=\"0x00000000\" length=\"0x80000\"/>" // code = sram, bootrom or flash; flash is bigger
|
||||
" <memory type=\"ram\" start=\"0x20000000\" length=\"0x18000\"/>" // SRAM
|
||||
" <memory type=\"flash\" start=\"0x08000000\" length=\"0x10000\">" // Sectors 0..3
|
||||
" <property name=\"blocksize\">0x4000</property>" // 16 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08010000\" length=\"0x10000\">" // Sector 4
|
||||
" <property name=\"blocksize\">0x10000</property>" // 64 kB
|
||||
" </memory>"
|
||||
" <memory type=\"flash\" start=\"0x08020000\" length=\"0x60000\">" // Sectors 5..7
|
||||
" <property name=\"blocksize\">0x20000</property>" // 128 kB
|
||||
" </memory>"
|
||||
" <memory type=\"ram\" start=\"0x40000000\" length=\"0x1fffffff\"/>" // peripheral regs
|
||||
" <memory type=\"ram\" start=\"0xe0000000\" length=\"0x1fffffff\"/>" // cortex regs
|
||||
" <memory type=\"rom\" start=\"0x1fff0000\" length=\"0x7800\"/>" // bootrom
|
||||
" <memory type=\"rom\" start=\"0x1fff7800\" length=\"0x210\"/>" // otp
|
||||
" <memory type=\"rom\" start=\"0x1fffc000\" length=\"0x10\"/>" // option byte area
|
||||
"</memory-map>";
|
||||
|
||||
#endif // MEMORY_MAP_H
|
||||
|
|
@ -2,7 +2,7 @@
|
|||
# Build GUI
|
||||
###
|
||||
|
||||
if (NOT WIN32 AND NOT CMAKE_CROSSCOMPILING)
|
||||
if (NOT WIN32)
|
||||
find_package(PkgConfig)
|
||||
pkg_check_modules(GTK3 gtk+-3.0)
|
||||
|
||||
|
|
|
|||
|
|
@ -49,10 +49,8 @@ uint32_t calculate_F7_sectornum(uint32_t flashaddr) {
|
|||
}
|
||||
|
||||
uint32_t calculate_H7_sectornum(stlink_t *sl, uint32_t flashaddr, uint32_t bank) {
|
||||
flashaddr &=
|
||||
~((bank == BANK_1)
|
||||
? STM32_FLASH_BASE
|
||||
: STM32_H7_FLASH_BANK2_BASE); // sector holding the flash address
|
||||
// sector holding the flash address
|
||||
flashaddr &= ~((bank == BANK_1) ? STM32_FLASH_BASE : STM32_H7_FLASH_BANK2_BASE);
|
||||
return (flashaddr / sl->flash_pgsz);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -599,23 +599,6 @@ int32_t stlink_current_mode(stlink_t *sl) {
|
|||
return (STLINK_DEV_UNKNOWN_MODE);
|
||||
}
|
||||
|
||||
// 274
|
||||
int32_t stlink_trace_enable(stlink_t *sl, uint32_t frequency) {
|
||||
DLOG("*** stlink_trace_enable ***\n");
|
||||
return (sl->backend->trace_enable(sl, frequency));
|
||||
}
|
||||
|
||||
// 275
|
||||
int32_t stlink_trace_disable(stlink_t *sl) {
|
||||
DLOG("*** stlink_trace_disable ***\n");
|
||||
return (sl->backend->trace_disable(sl));
|
||||
}
|
||||
|
||||
// 276
|
||||
int32_t stlink_trace_read(stlink_t *sl, uint8_t *buf, uint32_t size) {
|
||||
return (sl->backend->trace_read(sl, buf, size));
|
||||
}
|
||||
|
||||
// 294
|
||||
void stlink_print_data(stlink_t *sl) {
|
||||
if (sl->q_len <= 0 || sl->verbose < UDEBUG) {
|
||||
|
|
@ -832,6 +815,7 @@ int32_t write_buffer_to_sram(stlink_t *sl, flash_loader_t *fl, const uint8_t *bu
|
|||
|
||||
// 291
|
||||
uint32_t stlink_calculate_pagesize(stlink_t *sl, uint32_t flashaddr) {
|
||||
|
||||
if ((sl->chip_id == STM32_CHIPID_F2) ||
|
||||
(sl->chip_id == STM32_CHIPID_F4) ||
|
||||
(sl->chip_id == STM32_CHIPID_F4_DE) ||
|
||||
|
|
|
|||
|
|
@ -363,7 +363,7 @@ int32_t stlink_flash_loader_run(stlink_t *sl, flash_loader_t* fl, stm32_addr_t t
|
|||
/* Run loader */
|
||||
stlink_run(sl, RUN_FLASH_LOADER);
|
||||
|
||||
/*
|
||||
/*
|
||||
* This piece of code used to try to spin for .1 second by waiting doing 10000 rounds of 10 µs.
|
||||
* But because this usually runs on Unix-like OSes, the 10 µs get rounded up to the "tick"
|
||||
* (actually almost two ticks) of the system. 1 ms. Thus, the ten thousand attempts, when
|
||||
|
|
@ -393,7 +393,7 @@ int32_t stlink_flash_loader_run(stlink_t *sl, flash_loader_t* fl, stm32_addr_t t
|
|||
// check written byte count
|
||||
stlink_read_reg(sl, 2, &rr);
|
||||
|
||||
/*
|
||||
/*
|
||||
* The chunk size for loading is not rounded. The flash loader
|
||||
* subtracts the size of the written block (1-8 bytes) from
|
||||
* the remaining size each time. A negative value may mean that
|
||||
|
|
|
|||
|
|
@ -8,10 +8,16 @@
|
|||
#ifndef LOGGING_H
|
||||
#define LOGGING_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include "spdlog_wrapper.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif // __cplusplus
|
||||
|
||||
/* Optional: Enable interface for SPDLOG to replace UglyLogging */
|
||||
// #define SPDLOG_LOGGING
|
||||
|
||||
enum ugly_loglevel {
|
||||
UDEBUG = 90,
|
||||
UINFO = 50,
|
||||
|
|
@ -44,6 +50,17 @@ int32_t ugly_libusb_log_level(enum ugly_loglevel v);
|
|||
#define ELOG_HELPER(format, ...) ugly_log(UERROR, UGLY_LOG_FILE, format, __VA_ARGS__)
|
||||
#define ELOG(...) ugly_log(UERROR, UGLY_LOG_FILE, __VA_ARGS__)
|
||||
|
||||
#if defined(SPDLOG_LOGGING)
|
||||
#undef DLOG_HELPER
|
||||
#undef ILOG_HELPER
|
||||
#undef WLOG_HELPER
|
||||
#undef ELOG_HELPER
|
||||
#define DLOG(...) spdlogLog(UDEBUG, __VA_ARGS__)
|
||||
#define ILOG(...) spdlogLog(UINFO, __VA_ARGS__)
|
||||
#define WLOG(...) spdlogLog(UWARN, __VA_ARGS__)
|
||||
#define ELOG(...) spdlogLog(UERROR, __VA_ARGS__)
|
||||
#endif // SPDLOG_LOGGING
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif // __cplusplus
|
||||
|
|
|
|||
|
|
@ -0,0 +1,14 @@
|
|||
#ifndef _SPDLOG_WRAPPER_
|
||||
#define _SPDLOG_WRAPPER_
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define EXTERNC extern "C"
|
||||
#else
|
||||
#define EXTERNC
|
||||
#endif
|
||||
|
||||
EXTERNC int spdlogLog(int level, const char *str, ...);
|
||||
|
||||
#undef EXTERNC
|
||||
|
||||
#endif
|
||||
|
|
@ -977,11 +977,18 @@ int32_t _stlink_usb_enable_trace(stlink_t* sl, uint32_t frequency) {
|
|||
unsigned char* const cmd = sl->c_buf;
|
||||
ssize_t size;
|
||||
uint32_t rep_len = 2;
|
||||
uint32_t max_trace_buf_len = 0;
|
||||
|
||||
if(sl->version.stlink_v == 2) {
|
||||
max_trace_buf_len = STLINK_V2_TRACE_BUF_LEN;
|
||||
} else if (sl->version.stlink_v == 3) {
|
||||
max_trace_buf_len = STLINK_V3_TRACE_BUF_LEN;
|
||||
};
|
||||
|
||||
int32_t i = fill_command(sl, SG_DXFER_TO_DEV, rep_len);
|
||||
cmd[i++] = STLINK_DEBUG_COMMAND;
|
||||
cmd[i++] = STLINK_DEBUG_APIV2_START_TRACE_RX;
|
||||
write_uint16(&cmd[i + 0], 2 * STLINK_TRACE_BUF_LEN);
|
||||
write_uint16(&cmd[i + 0], 2 * max_trace_buf_len);
|
||||
write_uint32(&cmd[i + 2], frequency);
|
||||
|
||||
size = send_recv(slu, 1, cmd, slu->cmd_len, data, rep_len, CMD_CHECK_STATUS, "START_TRACE_RX");
|
||||
|
|
|
|||
Ładowanie…
Reference in New Issue