diff --git a/doc/tutorial.md b/doc/tutorial.md
index 53ecabe..736c428 100644
--- a/doc/tutorial.md
+++ b/doc/tutorial.md
@@ -2,18 +2,18 @@
## Available tools and options
-| Option | Tool | Description | Available
since |
-| --------------------- | ---------------------------------- | --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- | -------------------- |
-| --flash=n[k, M] | st-flash | One can specify `--flash=128k` for example, to override the default value of 64k for the STM32F103C8T6
to assume 128k of flash being present. This option accepts decimal (128k), octal 0200k, or hex 0x80k values.
Leaving the multiplier out is equally valid, e.g.: `--flash=0x20000`. The size may be followed by an optional
"k" or "M" to multiply the given value by 1k (1024) or 1M (1024 x 1024) respectively.
One can read arbitary addresses of memory out to a binary file with: `st-flash read out.bin 0x8000000 4096`.
In this example `4096 bytes` are read and subsequently written to `out.bin`.
Binary files (here: `in.bin`) are written into flash memory with: `st-flash write in.bin 0x8000000` | v1.4.0 |
-| --format | st-flash | Specify file image format to read or write. Valid formats are `binary` and `ihex`. | v1.3.0 |
-| --freq=n[k, M] | st-info
st-flash
st-util | The frequency of the SWD/JTAG interface can be specified, to override the default 1800 kHz configuration.
This option solely accepts decimal values with the unit `Hz` being left out. Valid frequencies are:
`5k, 15k, 25k, 50k, 100k, 125k, 240k, 480k, 950k, 1200k (1.2M), 1800k (1.8M), 4000k (4M)`. | v1.6.1 |
-| --opt | st-flash | Optimisation can be enabled in order to skip flashing empty (0x00 or 0xff) bytes at the end of binary file.
This may cause some garbage data left after a flash operation. This option was enabled by default in earlier releases. | v1.6.1 |
-| --reset | st-flash | Trigger a reset after flashing. The default uses the hardware reset through `NRST` pin.
A software reset (via `AIRCR`; since v1.5.1) is used, if the hardware reset failed (`NRST` pin not connected). | v1.0.0 |
-| --connect-under-reset | st-info
st-flash
st-util | Connect under reset. Option makes it possible to connect to the device before code execution. This is useful
when the target contains code that lets the device go to sleep, disables debug pins or other special code. | v1.6.1 |
-| --hot-plug | st-info
st-flash
st-util | Connect to the target without reset. | v1.6.2 |
-| --probe | st-info | Display hardware information about the connected programmer and target MCU. | v1.2.0 |
-| --version | st-info
st-flash
st-util | Print version information. | v1.3.0 |
-| --help | st-flash
st-util | Print list of available commands. | |
+| Option | Tool | Description | Available
since |
+| --------------------- | ---------------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------ | -------------------- |
+| --flash=n[k, M] | st-flash | One can specify `--flash=128k` for example, to override the default value of 64k for the STM32F103C8T6 to assume 128k of flash being present. This option accepts decimal (128k), octal 0200k, or hex 0x80k values.
Leaving the multiplier out is equally valid, e.g.: `--flash=0x20000`. The size may be followed by an optional "k" or "M" to multiply the given value by 1k (1024) or 1M (1024 x 1024) respectively.
One can read arbitary addresses of memory out to a binary file with: `st-flash read out.bin 0x8000000 4096`. In this example `4096 bytes` are read and subsequently written to `out.bin`.
Binary files (here: `in.bin`) are written into flash memory with: `st-flash write in.bin 0x8000000` | v1.4.0 |
+| --format | st-flash | Specify file image format to read or write.
Valid formats are `binary` and `ihex`. | v1.3.0 |
+| --freq=n[k, M] | st-info
st-flash
st-util | The frequency of the SWD/JTAG interface can be specified, to override the default 1800 kHz configuration.
This option solely accepts decimal values with the unit `Hz` being left out. Valid frequencies are:
`5k, 15k, 25k, 50k, 100k, 125k, 240k, 480k, 950k, 1200k (1.2M), 1800k (1.8M), 4000k (4M)`. | v1.6.1 |
+| --opt | st-flash | Optimisation can be enabled in order to skip flashing empty (0x00 or 0xff) bytes at the end of binary file.
This may cause some garbage data left after a flash operation. This option was enabled by default in earlier releases. | v1.6.1 |
+| --reset | st-flash | Trigger a reset after flashing. The default uses the hardware reset through `NRST` pin.
A software reset (via `AIRCR`; since v1.5.1) is used, if the hardware reset failed (`NRST` pin not connected). | v1.0.0 |
+| --connect-under-reset | st-info
st-flash
st-util | Connect under reset. Option makes it possible to connect to the device before code execution. This is useful when the target contains code that lets the device go to sleep, disables debug pins or other special code. | v1.6.1 |
+| --hot-plug | st-info
st-flash
st-util | Connect to the target without reset. | v1.6.2 |
+| --probe | st-info | Display hardware information about the connected programmer and target MCU. | v1.2.0 |
+| --version | st-info
st-flash
st-util | Print version information. | v1.3.0 |
+| --help | st-flash
st-util | Print list of available commands. | |
### Reading & Writing Option Bytes
@@ -156,6 +156,14 @@ Here flashing of the device is now possible with and without the `--reset` optio
The debug command `(gdb) monitor jtag_reset` sends a _hard reset_ signal via the `NRST` pin to reset the device and allows for flashing it (again).
+### e) Note on setting hardware breakpoints for external bus (Example: STM32H735-DK)
+
+GDB is setting breakpoints based on the XML memory map designation of `rom` or `ram`, which is hardcoded in st-util for a given processor.
+However the external bus can be *RAM* or *ROM* depending on design.
+
+The STM32H735-DK has external FLASH at address 0x90000000. As a result, because the entire external memory range is `ram` as it could be either,
+software breakpoints (Z0) get sent when a breakpoint is created and they never get tripped as the memory area is read only.
+
---
( Content below is currently unrevised and may be outdated as of Mar 2021. )
diff --git a/src/st-util/gdb-server.c b/src/st-util/gdb-server.c
index 71f24fb..28e0623 100644
--- a/src/st-util/gdb-server.c
+++ b/src/st-util/gdb-server.c
@@ -29,6 +29,7 @@
#include
#include "gdb-server.h"
#include "gdb-remote.h"
+#include "memory-map.h"
#include "semihosting.h"
#include
@@ -344,219 +345,6 @@ static const char* const target_description =
" "
"";
-static const char* const memory_map_template_F4 =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // ccm ram
- " " // sram
- " " // Sectors 0..3
- " 0x4000" // 16kB
- " "
- " " // Sector 4
- " 0x10000" // 64kB
- " "
- " " // Sectors 5..11
- " 0x20000" // 128kB
- " "
- " " // peripheral regs
- " " // AHB3 Peripherals
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- "";
-
-static const char* const memory_map_template_F4_HD =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // ccm ram
- " " // sram
- " " // fmc bank 1 (nor/psram/sram)
- " " // fmc bank 2 & 3 (nand flash)
- " " // fmc bank 4 (pc card)
- " " // fmc sdram bank 1 & 2
- " " // Sectors 0..3
- " 0x4000" // 16kB
- " "
- " " // Sector 4
- " 0x10000" // 64kB
- " "
- " " // Sectors 5..11
- " 0x20000" // 128kB
- " "
- " " // peripheral regs
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- "";
-
-static const char* const memory_map_template_F2 =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // sram
- " " // Sectors 0..3
- " 0x4000" // 16kB
- " "
- " " // Sector 4
- " 0x10000" // 64kB
- " "
- " " // Sectors 5..
- " 0x20000" // 128kB
- " "
- " " // peripheral regs
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- "";
-
-static const char* const memory_map_template_L4 =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // SRAM2 (32kB)
- " " // SRAM1 (96kB)
- " "
- " 0x800"
- " "
- " " // peripheral regs
- " " // AHB3 Peripherals
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- " " // option byte area
- "";
-
-static const char* const memory_map_template_L496 =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // SRAM2 (64kB)
- " " // SRAM1 + aliased SRAM2 (256 + 64 = 320kB)
- " "
- " 0x800"
- " "
- " " // peripheral regs
- " " // AHB3 Peripherals
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- " " // option byte area
- "";
-
-static const char* const memory_map_template =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // sram 8kB
- " "
- " 0x%x"
- " "
- " " // peripheral regs
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- "";
-
-static const char* const memory_map_template_F7 =
- ""
- ""
- ""
- " " // ITCM ram 16kB
- " " // ITCM flash
- " " // sram
- " " // Sectors 0..3
- " 0x8000" // 32kB
- " "
- " " // Sector 4
- " 0x20000" // 128kB
- " "
- " " // Sectors 5..7
- " 0x40000" // 128kB
- " "
- " " // peripheral regs
- " " // AHB3 Peripherals
- " " // cortex regs
- " " // bootrom
- " " // option byte area
- "";
-
-static const char* const memory_map_template_H7 =
- ""
- ""
- ""
- " " // ITCMRAM 64kB
- " " // DTCMRAM 128kB
- " " // RAM D1 512kB
- " " // RAM D2 288kB
- " " // RAM D3 64kB
- " "
- " 0x%x"
- " "
- " " // peripheral regs
- " " // cortex regs
- " " // bootrom
- "";
-
-static const char* const memory_map_template_H72x3x =
- ""
- ""
- ""
- " " // ITCMRAM 64kB + Optional remap
- " " // DTCMRAM 128kB
- " " // RAM D1 320kB
- " " // RAM D2 23kB
- " " // RAM D3 16kB
- " " // Backup RAM 4kB
- " "
- " 0x%x"
- " "
- " " // peripheral regs
- " " // External Memory
- " " // External device
- " " // cortex regs
- " " // bootrom
- "";
-
-static const char* const memory_map_template_F4_DE =
- ""
- ""
- ""
- " " // code = sram, bootrom or flash; flash is bigger
- " " // sram
- " " // Sectors 0..3
- " 0x4000" // 16kB
- " "
- " " // Sector 4
- " 0x10000" // 64kB
- " "
- " " // Sectors 5..7
- " 0x20000" // 128kB
- " "
- " " // peripheral regs
- " " // cortex regs
- " " // bootrom
- " " // otp
- " " // option byte area
- "";
-
char* make_memory_map(stlink_t *sl) {
// this will be freed in serve()
const uint32_t sz = 4096;
diff --git a/src/st-util/memory-map.h b/src/st-util/memory-map.h
new file mode 100644
index 0000000..6f34eed
--- /dev/null
+++ b/src/st-util/memory-map.h
@@ -0,0 +1,217 @@
+#ifndef MEMORY_MAP_H
+#define MEMORY_MAP_H
+
+static const char* const memory_map_template_F4 =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // ccm ram
+ " " // sram
+ " " // Sectors 0...3
+ " 0x4000" // 16 kB
+ " "
+ " " // Sector 4
+ " 0x10000" // 64 kB
+ " "
+ " " // Sectors 5...11
+ " 0x20000" // 128 kB
+ " "
+ " " // peripheral regs
+ " " // AHB3 Peripherals
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_F4_HD =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // ccm ram
+ " " // sram
+ " " // fmc bank 1 (nor/psram/sram)
+ " " // fmc bank 2 & 3 (nand flash)
+ " " // fmc bank 4 (pc card)
+ " " // fmc sdram bank 1 & 2
+ " " // Sectors 0...3
+ " 0x4000" // 16 kB
+ " "
+ " " // Sector 4
+ " 0x10000" // 64 kB
+ " "
+ " " // Sectors 5...11
+ " 0x20000" // 128 kB
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_F2 =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // SRAM
+ " " // Sectors 0...3
+ " 0x4000" // 16 kB
+ " "
+ " " // Sector 4
+ " 0x10000" // 64 kB
+ " "
+ " " // Sectors 5...
+ " 0x20000" // 128 kB
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_L4 =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // SRAM2 (32 kB)
+ " " // SRAM1 (96 kB)
+ " "
+ " 0x800"
+ " "
+ " " // peripheral regs
+ " " // AHB3 Peripherals
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_L496 =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // SRAM2 (64 kB)
+ " " // SRAM1 + aliased SRAM2 (256 + 64 = 320 kB)
+ " "
+ " 0x800"
+ " "
+ " " // peripheral regs
+ " " // AHB3 Peripherals
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // SRAM (8 kB)
+ " "
+ " 0x%x"
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_F7 =
+ ""
+ ""
+ ""
+ " " // ITCM ram 16 kB
+ " " // ITCM flash
+ " " // SRAM
+ " " // Sectors 0...3
+ " 0x8000" // 32 kB
+ " "
+ " " // Sector 4
+ " 0x20000" // 128 kB
+ " "
+ " " // Sectors 5...7
+ " 0x40000" // 128 kB
+ " "
+ " " // peripheral regs
+ " " // AHB3 Peripherals
+ " " // cortex regs
+ " " // bootrom
+ " " // option byte area
+ "";
+
+static const char* const memory_map_template_H7 =
+ ""
+ ""
+ ""
+ " " // ITCMRAM 64 kB
+ " " // DTCMRAM 128 kB
+ " " // RAM D1 512 kB
+ " " // RAM D2 288 kB
+ " " // RAM D3 64 kB
+ " "
+ " 0x%x"
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ "";
+
+static const char* const memory_map_template_H72x3x =
+ ""
+ ""
+ ""
+ " " // ITCMRAM 64 kB + Optional remap
+ " " // DTCMRAM 128 kB
+ " " // RAM D1 320 kB
+ " " // RAM D2 23 kB
+ " " // RAM D3 16 kB
+ " " // Backup RAM 4 kB
+ " "
+ " 0x%x"
+ " "
+ " " // peripheral regs
+ " " // External Memory
+ " " // External device
+ " " // cortex regs
+ " " // bootrom
+ "";
+
+static const char* const memory_map_template_F4_DE =
+ ""
+ ""
+ ""
+ " " // code = sram, bootrom or flash; flash is bigger
+ " " // SRAM
+ " " // Sectors 0..3
+ " 0x4000" // 16 kB
+ " "
+ " " // Sector 4
+ " 0x10000" // 64 kB
+ " "
+ " " // Sectors 5..7
+ " 0x20000" // 128 kB
+ " "
+ " " // peripheral regs
+ " " // cortex regs
+ " " // bootrom
+ " " // otp
+ " " // option byte area
+ "";
+
+#endif // MEMORY_MAP_H
\ No newline at end of file