mirror
/
stlink
kopia lustrzana https://github.com/stlink-org/stlink
1
0
Forkuj 0
Kod Zgłoszenia Packages Projekty Wydania Wiki Aktywność

Unified chipid enum naming for L0 series

pull/1312/head
nightwalker-87 2023-04-30 19:21:17 +02:00
rodzic ab286988b4
commit 7c2c953ff6
5 zmienionych plików z 11 dodań i 11 usunięć
Pokaż statystyki Ściągnij plik aktualizacji Ściągnij plik porównania Expand all files Collapse all files

2
config/chips/L0xxx_Cat_1.chip
Wyświetl plik

@ -2,7 +2,7 @@
#
dev_type STM32L0xxx_Cat_1
ref_manual_id 0451 // also RM0377
chip_id 0x457 // STM32_CHIPID_L011
chip_id 0x457 // STM32_CHIPID_L0_CAT1
flash_type L0_L1
flash_size_reg 0x1ff8007c
flash_pagesize 0x80 // 128 B

2
config/chips/L0xxx_Cat_3.chip
Wyświetl plik

@ -2,7 +2,7 @@
#
dev_type STM32L0xxx_Cat_3
ref_manual_id 0451 // also RM0367 & RM0377
chip_id 0x417 // STM32_CHIPID_L0
chip_id 0x417 // STM32_CHIPID_L0_CAT3
flash_type L0_L1
flash_size_reg 0x1ff8007c
flash_pagesize 0x80 // 128 B

4
inc/stm32.h
Wyświetl plik

@ -76,7 +76,7 @@ enum stm32_chipids {
STM32_CHIPID_F1_HD = 0x414, /* high density */
STM32_CHIPID_L4 = 0x415,
STM32_CHIPID_L1_MD = 0x416, /* medium density */
STM32_CHIPID_L0 = 0x417,
STM32_CHIPID_L0_CAT3 = 0x417,
STM32_CHIPID_F1_CONN = 0x418, /* connectivity line */
STM32_CHIPID_F4_HD = 0x419, /* high density */
STM32_CHIPID_F1_VL_MD_LD = 0x420, /* value line medium & low density */
@ -110,7 +110,7 @@ enum stm32_chipids {
STM32_CHIPID_F76xxx = 0x451,
STM32_CHIPID_F72xxx = 0x452, /* Nucleo F722ZE board */
STM32_CHIPID_G0_CAT4 = 0x456, /* G051/G061 */
STM32_CHIPID_L011 = 0x457,
STM32_CHIPID_L0_CAT1 = 0x457,
STM32_CHIPID_F410 = 0x458,
STM32_CHIPID_G0_CAT2 = 0x460, /* G07x/G08x */
STM32_CHIPID_L496x_L4A6x = 0x461,

6
src/stlink-lib/common_flash.c
Wyświetl plik

@ -12,10 +12,10 @@
uint32_t get_stm32l0_flash_base(stlink_t *sl) {
switch (sl->chip_id) {
case STM32_CHIPID_L0:
case STM32_CHIPID_L0_CAT5:
case STM32_CHIPID_L0_CAT1:
case STM32_CHIPID_L0_CAT2:
case STM32_CHIPID_L011:
case STM32_CHIPID_L0_CAT3:
case STM32_CHIPID_L0_CAT5:
return (STM32L0_FLASH_REGS_ADDR);
case STM32_CHIPID_L1_CAT2:

8
src/stlink-lib/flash_loader.c
Wyświetl plik

@ -238,10 +238,10 @@ int stlink_flash_loader_write_to_sram(stlink_t *sl, stm32_addr_t* addr, size_t*
sl->chip_id == STM32_CHIPID_L1_MD_PLUS ||
sl->chip_id == STM32_CHIPID_L1_MD_PLUS_HD ||
sl->chip_id == STM32_CHIPID_L152_RE ||
sl->chip_id == STM32_CHIPID_L011 ||
sl->chip_id == STM32_CHIPID_L0 ||
sl->chip_id == STM32_CHIPID_L0_CAT5 ||
sl->chip_id == STM32_CHIPID_L0_CAT2) {
sl->chip_id == STM32_CHIPID_L0_CAT1 ||
sl->chip_id == STM32_CHIPID_L0_CAT2 ||
sl->chip_id == STM32_CHIPID_L0_CAT3 ||
sl->chip_id == STM32_CHIPID_L0_CAT5) {
loader_code = loader_code_stm32lx;
loader_size = sizeof(loader_code_stm32lx);
} else if (sl->core_id == STM32_CORE_ID_M3_r1p1_SWD ||