Wykres commitów

  • 65163b34e5 readme.md master Xael South 2024-05-12 20:32:56 +0200
  • 497c70121b remove dc offset is optional Xael South 2024-05-12 20:23:45 +0200
  • 0b9d4459d9 some channel coding related stuff Xael South 2024-05-12 13:05:41 +0200
  • da0512fd81 added samples from issues; renamed samples2; added util mode functions Xael South 2024-05-11 13:27:01 +0200
  • 4e6f58296b demodulated signal can be redirected into a file for audacity Xael South 2024-05-10 16:51:45 +0200
  • 6b2189d8fe Just some rearrangements around CHECK_FLOW. Xael South 2024-05-10 01:32:54 +0200
  • a9af64c152 Fixed following issues: - cannot recover corrupted preamble #47 - amiplus frames not decoded #49 Xael South 2024-05-09 23:29:04 +0200
  • 390bbe073c Merge remote-tracking branch 'origin/master' Xael South 2024-05-09 17:53:22 +0200
  • 6354b039ba dc removal offset Xael South 2024-05-09 17:49:20 +0200
  • 20cafdcecf
    Merge pull request #43 from weetmuts/AddFlowCheck Xael South 2024-01-18 07:52:35 +0100
  • 325a2eb8e2 Only print help if no arguments given and stdin is a tty. Fredrik Öhrström 2023-08-16 16:44:48 +0200
  • 1928547817 Add option -f check if incoming data has stalled, if so force an exit. Fredrik Öhrström 2023-08-16 16:08:50 +0200
  • f2a89a0a1b
    Merge pull request #42 from weetmuts/master Xael South 2023-05-08 21:35:43 +0200
  • db02550327 Fix make install to not trigger a build of rtl_wmbus. Fredrik Öhrström 2023-05-07 12:58:25 +0200
  • 388e7adb8e debian-compat = 11; build-deb.sh Xael South 2022-05-07 16:40:24 +0000
  • 6b3f7f3a4a
    Merge pull request #36 from petterreinholdtsen/debian-packaging Xael South 2022-05-07 16:24:08 +0000
  • ecf533eb85
    Merge pull request #34 from petterreinholdtsen/remove-build-dir Xael South 2022-05-07 16:23:58 +0000
  • 264456747c
    Merge pull request #33 from petterreinholdtsen/build-install Xael South 2022-05-07 16:23:43 +0000
  • 5e06abec9c Add build rules for Debian package Petter Reinholdtsen 2022-04-28 15:10:09 +0200
  • 96c097ad5f Remove generated files from git repository. Petter Reinholdtsen 2022-04-28 08:54:28 +0200
  • 81b38ec2cc Allow CFLAGS additions and install in DESTDIR Petter Reinholdtsen 2022-04-28 07:21:33 +0200
  • d2be82cfa2 equalizer comments removed d2be82c Unknown 2021-05-06 14:12:59 +0200
  • 7759518240 split signal processing chains Xael South 2021-05-06 11:56:09 +0000
  • 70706c4c53 split signal processing chains Xael South 2021-05-06 11:54:06 +0000
  • a07541f904
    Merge pull request #23 from weetmuts/master Xael South 2021-05-06 11:43:34 +0200
  • 9417c4d739 Drop non-working ifeq. Fredrik Öhrström 2021-04-13 20:53:46 +0200
  • 7717896a98 Add commit hash and exit after printing version number. Fredrik Öhrström 2021-04-13 20:16:43 +0200
  • f976ce856e Add version number and -V option to print version number. Fredrik Öhrström 2021-04-13 20:14:36 +0200
  • cce47b67b7 Support MinGW and Win Xael South 2021-03-15 12:10:31 +0000
  • ec6c1f5d86 Support MinGW and Win Xael South 2021-03-15 12:07:04 +0000
  • f897f1d7e5 868.7 -> 868.625 Xael South 2021-02-23 09:03:37 +0000
  • b69187031e add equalizer (inactive by default) Xael South 2021-02-19 12:22:22 +0000
  • b4e2170df5 add comments Xael South 2021-02-16 09:57:29 +0000
  • bd89c1c56b typos Xael South 2021-02-16 09:07:54 +0000
  • f5914475cb typos Xael South 2021-02-15 20:45:27 +0000
  • 99cfa2bfca Test for T1/C1 at 869.275M to uncomment Xael South 2021-02-15 20:21:34 +0000
  • 139633fa0b rearranging frequencies translation Xael South 2021-02-15 20:18:07 +0000
  • f9f42caafb trailing spaces Xael South 2021-02-15 20:22:26 +0100
  • f361385d40 inaccurate atan (not by default) Xael South 2021-02-15 20:21:02 +0100
  • f53fd26781 run length algo for s1 Xael South 2021-02-15 19:10:50 +0100
  • 986d62fe78
    Merge pull request #2 from alalons/alalons-complex-optimizations alalons 2021-02-14 04:01:52 +0100
  • a541f44f43
    Update rtl_wmbus.c alalons 2021-02-14 03:57:34 +0100
  • afd546e304
    Merge pull request #1 from xaelsouth/master alalons 2021-02-14 03:45:24 +0100
  • 8a29d0e459
    Merge branch 'master' into patch-1 alalons 2021-02-14 03:23:44 +0100
  • 7459c7e30a use conjf instead of conj (which is for double) Xael South 2021-02-12 17:42:07 +0000
  • d03089ffa0 moving average slightly optimized Xael South 2021-02-12 17:22:42 +0000
  • e777c0f20d
    Simultaneous Frecuency shifting optimization alalons 2021-02-12 03:31:07 +0100
  • 686356d201 typos Xael South 2021-02-08 08:20:53 +0000
  • 73b67b5c66 s1 decoder small fixes Xael South 2021-02-06 12:01:52 +0000
  • 02a46cb826 fixing rssi=0 S1 mode; rssi filtering done right again Xael South 2021-02-06 10:36:14 +0000
  • b32ee02e4c
    Merge pull request #18 from weetmuts/ImproveREADME Xael South 2021-02-06 11:08:37 +0100
  • d603a3b4ce Add information about column meanings. Fredrik Öhrström 2021-02-06 08:22:07 +0100
  • 9ab45b4866 droppped one freq shift Xael South 2021-02-05 21:48:05 +0000
  • 284dd6cc0e simultaneously rx T1, C1 ans S1, but the latter is untested Xael South 2021-02-05 14:33:16 +0000
  • 2d02db273a simultaneously rx T1, C1 ans S1, but the latter is untested Xael South 2021-02-05 14:30:20 +0000
  • ae5d8f818f simultaneously rx T1, C1 ans S1, but the latter is untested Xael South 2021-02-05 12:56:22 +0000
  • 8ac790dc16 C1 receiver with better filtering Xael South 2021-02-04 14:20:04 +0000
  • 8bec4a2b08 C1 mode improvements; S1 mode implemented Xael South 2021-02-02 17:29:08 +0000
  • a517da71d1 C1 mode improvements; S1 mode implemented Xael South 2021-02-02 17:27:50 +0000
  • cec199312e clock recovering for time2 method only if latter selected Xael South 2021-02-02 08:28:24 +0000
  • 6d92d1b3f1 rx_sdr Xael South 2021-01-28 14:26:50 +0000
  • 4098aa84bb configurable decimation rate Xael South 2021-01-28 13:32:59 +0000
  • 683c99e1d8 Some checks around the L field Xael South 2021-01-27 22:44:27 +0100
  • a75bd89d7b 16 byte alignment on decoder->packet Xael South 2021-01-26 20:21:46 +0100
  • 0dc6a61c92 Get rid of some compiler warnings. Xael South 2021-01-26 12:44:57 +0100
  • 4aceda56d6 Fix warnings for g++ 7.5.0 Xael South 2021-01-26 12:36:34 +0100
  • 355ba64a57 - run length algorithm for picking datagrams out of the bit stream implemented. - L(ength) field fixed for C1 Mode B datagrams. - Allow to redefine CFLAGS and OUTPUT directory. Xael South 2021-01-26 11:50:05 +0100
  • f213753a98
    Merge pull request #8 from dwrobel/dw-1 Xael South 2021-01-26 11:09:42 +0100
  • 80af0e0057 Allow to redefine CFLAGS* and OUTPUT directory Damian Wrobel 2020-02-28 17:19:19 +0100
  • 864ffa52d7 Should be -1. weetmuts 2020-02-03 17:49:41 +0100
  • 2b3f8ee8de Adjust length byte after CRC:s are removed. weetmuts 2020-02-02 16:35:46 +0100
  • 6a04c45482 Mode C1 datagram type B is supported now Xael South 2019-12-13 22:32:15 +0100
  • 2453cd8c0f #define SSE4.2 Xael South 2018-02-05 19:30:44 +0100
  • 9bfaa9bc72 Added some pictures of demodulated signal. xaelsouth 2018-01-27 19:37:24 +0000
  • 150201060f Typo Xael South 2018-01-22 21:34:10 +0100
  • e145466bb2 Removed compiler options: -msse4.2 Xael South 2018-01-22 21:25:19 +0100
  • 9830c25ac0 Update README.md Xael South 2017-04-22 18:00:15 +0200
  • ebe0a8bef6 initial commit xaelsouth 2017-04-04 20:29:40 +0000