kopia lustrzana https://github.com/amedes/pico_tnc
add PIO program for Sigma Delta 1-bit DAC
amedes
rodzic
0b9de7ccaf
commit
ef4e067a1d
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@ -22,6 +22,8 @@ add_executable(pico_tnc
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kiss.c
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)
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pico_generate_pio_header(pico_tnc ${CMAKE_CURRENT_LIST_DIR}/pio_dac.pio)
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target_include_directories(pico_tnc PRIVATE
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include
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)
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@ -35,7 +37,7 @@ target_link_libraries(pico_tnc
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hardware_pwm
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hardware_uart
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# For the dummy output:
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#hardware_pio
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hardware_pio
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#pico_multicore
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)
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@ -0,0 +1,40 @@
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;
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; Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
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;
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; SPDX-License-Identifier: BSD-3-Clause
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;
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.program pio_dac
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; Repeatedly get one word of data from the TX FIFO, stalling when the FIFO is
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; empty. Write the least significant bit to the OUT pin group.
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.wrap_target
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out pins, 1
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.wrap
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% c-sdk {
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#include "hardware/clocks.h"
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static inline void pio_dac_program_init(PIO pio, uint sm, uint offset, uint pin, float fs) {
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pio_sm_config c = pio_dac_program_get_default_config(offset);
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// Map the state machine's OUT pin group to one pin, namely the `pin`
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// parameter to this function.
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sm_config_set_out_shift(&c, true, true, 32);
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sm_config_set_out_pins(&c, pin, 1);
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sm_config_set_clkdiv(&c, (float)clock_get_hz(clk_sys) / fs);
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// Set this pin's GPIO function (connect PIO to the pad)
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pio_gpio_init(pio, pin);
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// Set the pin direction to output at the PIO
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pio_sm_set_consecutive_pindirs(pio, sm, pin, 1, true);
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// Load our configuration, and jump to the start of the program
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pio_sm_init(pio, sm, offset, &c);
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// Set the state machine running
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pio_sm_set_enabled(pio, sm, true);
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}
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%}
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@ -1,29 +1,8 @@
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/*
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Copyright (c) 2021, JN1DFF
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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* Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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* Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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* Neither the name of the <organization> nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/**
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* Copyright (c) 2021 JN1DFF
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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* send.c - send packet
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@ -37,15 +16,18 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#include "hardware/pwm.h"
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#include "hardware/irq.h"
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#include "hardware/sync.h"
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#include "hardware/pio.h"
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#include "hardware/structs/uart.h"
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#include "pico/util/queue.h"
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#include "pio_dac.pio.h"
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#include "tnc.h"
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#include "send.h"
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#include "ax25.h"
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//#include "wave_table.h"
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#include "wave_table_132mhz.h"
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#include "wave_table.h"
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static const int pwm_pins[] = {
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10, // port 0
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@ -75,31 +57,30 @@ static void __isr dma_handler(void)
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for (int i = 0; i < PORT_N; i++) {
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tnc_t *tp = &tnc[i];
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if (int_status & tp->data_chan_mask) {
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if (int_status & tp->data_chan_mask) {
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// generate modem signal
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uint32_t *addr;
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if (queue_try_remove(&tp->dac_queue, &addr)) {
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// generate modem signal
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uint32_t *addr;
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if (queue_try_remove(&tp->dac_queue, &addr)) {
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dma_channel_set_read_addr(tp->ctrl_chan, addr, true);
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dma_channel_set_read_addr(tp->ctrl_chan, addr, true);
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#if 0
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printf("dma_hander: block = %p\n", &block[0]);
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for (int i = 0; i < CONTROL_N + 1; i++) {
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printf("block[%d] = %p\n", i, block[i]);
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}
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#endif
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} else {
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gpio_put(tp->ptt_pin, 0); // PTT off
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pwm_set_chan_level(tp->pwm_slice, PWM_CHAN_A, 0); // set pwm level 0
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tp->busy = false;
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//printf("(%u) dma_handler: queue is empty, port = %d, data_chan = %d, ints = %08x\n", tnc_time(), tp->port, tp->data_chan, int_status);
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} else {
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gpio_put(tp->ptt_pin, 0); // PTT off
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//pwm_set_chan_level(tp->pwm_slice, PWM_CHAN_A, 0); // set pwm level 0
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tp->busy = false;
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//printf("(%u) dma_handler: queue is empty, port = %d, data_chan = %d, ints = %08x\n", tnc_time(), tp->port, tp->data_chan, int_status);
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}
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//dma_hw->ints0 = tp->data_chan_mask;
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}
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//dma_hw->ints0 = tp->data_chan_mask;
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}
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} // for
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dma_hw->ints0 = int_status;
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}
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static void send_start(tnc_t *tp)
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@ -108,7 +89,7 @@ static void send_start(tnc_t *tp)
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gpio_put(tp->ptt_pin, 1); // PTT on
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tp->busy = true;
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//printf("restart dma, ctrl = %08x, port = %d\n", dma_hw->ch[tp->data_chan].ctrl_trig, tp->port);
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dma_channel_set_read_addr(tp->data_chan, NULL, true);
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dma_channel_set_read_addr(tp->data_chan, NULL, true); // trigger NULL interrupt
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}
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}
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@ -193,7 +174,7 @@ int send_byte(tnc_t *tp, uint8_t data, bool bit_stuff)
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tp->dma_blocks[tp->next][idx] = NULL;
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// send fsk data to dac queue
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uint16_t const **block = &tp->dma_blocks[tp->next][0];
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uint32_t const **block = &tp->dma_blocks[tp->next][0];
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if (queue_try_add(&tp->dac_queue, &block)) {
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#if 0
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if (!tp->busy) {
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@ -223,7 +204,12 @@ int send_byte(tnc_t *tp, uint8_t data, bool bit_stuff)
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void send_init(void)
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{
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// set system clock, PWM uses system clock
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set_sys_clock_khz(SYS_CLK_KHZ, true);
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//set_sys_clock_khz(SYS_CLK_KHZ, true);
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// pio_dac initialize
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PIO pio = pio0;
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// load pio_dac program
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uint offset = pio_add_program(pio, &pio_dac_program);
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// initialize tnc[]
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for (int i = 0; i < PORT_N; i++) {
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@ -241,6 +227,7 @@ void send_init(void)
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gpio_set_dir(tp->ptt_pin, true); // output
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gpio_put(tp->ptt_pin, 0);
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#if 0
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// PWM pins
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tp->pwm_pin = pwm_pins[i];
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// PWM configuration
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@ -253,6 +240,12 @@ void send_init(void)
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pwm_config_set_clkdiv_int(&pc, 1); // 1.0
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pwm_config_set_wrap(&pc, PWM_CYCLE - 1);
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pwm_init(tp->pwm_slice, &pc, true); // start PWM
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#endif
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// PIO
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// find free state machine
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uint sm = pio_claim_unused_sm(pio, true);
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pio_dac_program_init(pio, sm, offset, pwm_pins[i], PIO_DAC_FS);
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// DMA
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tp->ctrl_chan = dma_claim_unused_channel(true);
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@ -278,8 +271,8 @@ void send_init(void)
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// DMA data channel
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dc = dma_channel_get_default_config(tp->data_chan);
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channel_config_set_transfer_data_size(&dc, DMA_SIZE_16); // PWM level is 16 bits
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channel_config_set_dreq(&dc, DREQ_PWM_WRAP0 + tp->pwm_slice);
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channel_config_set_transfer_data_size(&dc, DMA_SIZE_32); // pio_dac data size, 32bit
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channel_config_set_dreq(&dc, pio_get_dreq(pio, sm, true)); // pio sm, TX
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channel_config_set_chain_to(&dc, tp->ctrl_chan);
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channel_config_set_irq_quiet(&dc, true);
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// set high priority bit
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@ -288,7 +281,7 @@ void send_init(void)
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dma_channel_configure(
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tp->data_chan,
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&dc,
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&pwm_hw->slice[tp->pwm_slice].cc,
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&pio0_hw->txf[sm], // The initial write address
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NULL, // Initial read address and transfer count are unimportant;
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BIT_CYCLE, // audio data of 1/1200 s
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false // Don't start yet.
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@ -33,7 +33,7 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//#include "cmd.h"
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// number of ports
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#define PORT_N 1 // number of ports, 1..3
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#define PORT_N 3 // number of ports, 1..3
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#define BAUD_RATE 1200
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#define SAMPLING_N 11
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@ -163,7 +163,7 @@ typedef struct TNC {
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int cnt_one;
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// wave buffer for DMA
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uint16_t const *dma_blocks[DAC_BLOCK_LEN][CONTROL_N + 1];
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uint32_t const *dma_blocks[DAC_BLOCK_LEN][CONTROL_N + 1];
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// send data queue
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queue_t send_queue;
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@ -0,0 +1,68 @@
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/**
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* Copyright (c) 2021 JN1DFF
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*
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sine wave table for Bell202 AFSK signal
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*/
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#if 0
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#define SYS_CLK_KHZ 132000
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#define BIT_CYCLE 440
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#define MARK_CYCLE 440
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#define SPACE_CYCLE 240
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#define MARK_TAB_LEN 807
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#define SPACE_TAB_LEN 640
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#define PWM_CYCLE 250
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#endif
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#define BAUD 1200 // bit rate
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#define BIT_CYCLE 66 // DMA data words in 1/1200s
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#define MARK_TAB_LEN 121 // 66 * 5/6 + 66
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#define SPACE_TAB_LEN 96 // 36 * 5/6 + 66
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#define PHASE_CYCLE 6
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#define PIO_DAC_FS (BIT_CYCLE * BAUD * 32)
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/* sine table for delta sigma modulation, 1200Hz */
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static const uint32_t mark_tab[MARK_TAB_LEN] = {
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0x20000200, 0x00010000, 0x00040004, 0x10008002, 0x40080100, 0x04020100, 0x02040404, 0x82082081,
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0x84210420, 0x84442210, 0x44888888, 0x24491224, 0x4a492489, 0x94949492, 0x54a54a52, 0xaa9552a9,
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0xaaaaaaaa, 0xaad55aaa, 0xb5ad6ad5, 0xd6dadad6, 0xb6db6db6, 0xeddb76dd, 0x7777776e, 0x7bddeef7,
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0xbef7bdf7, 0xdfbefbef, 0xfbfbf7ef, 0xdfeff7fb, 0xbffbff7f, 0xfefffbff, 0xffbfffbf, 0xfdffff7f,
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0xffffdfff, 0xffeffffe, 0xfbfffeff, 0xf7fff7ff, 0xff7ffdff, 0xfdffbff7, 0xbfbfdff7, 0xdfbfbfbf,
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0xdf7efbef, 0xdef7defb, 0xddeef7bb, 0xeddddddd, 0x6edbb76e, 0xdb6db6db, 0xb6b6b6b6, 0x56ad6ad6,
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0xaab556ab, 0xaa5556aa, 0xaa554aaa, 0x94a52a54, 0x92525252, 0x12492494, 0x48912249, 0x22222224,
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0x10884422, 0x08210842, 0x02081042, 0x40404081, 0x01008040, 0x00801004, 0x40010008, 0x20002000,
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0x00008000, 0x00400004, 0x20000200, 0x00010000, 0x00040004, 0x10008002, 0x40080100, 0x04020100,
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0x02040404, 0x82082081, 0x84210420, 0x84442210, 0x44888888, 0x24491224, 0x4a492489, 0x94949492,
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0x54a54a52, 0xaa9552a9, 0xaaaaaaaa, 0xaad55aaa, 0xb5ad6ad5, 0xd6dadad6, 0xb6db6db6, 0xeddb76dd,
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0x7777776e, 0x7bddeef7, 0xbef7bdf7, 0xdfbefbef, 0xfbfbf7ef, 0xdfeff7fb, 0xbffbff7f, 0xfefffbff,
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0xffbfffbf, 0xfdffff7f, 0xffffdfff, 0xffeffffe, 0xfbfffeff, 0xf7fff7ff, 0xff7ffdff, 0xfdffbff7,
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0xbfbfdff7, 0xdfbfbfbf, 0xdf7efbef, 0xdef7defb, 0xddeef7bb, 0xeddddddd, 0x6edbb76e, 0xdb6db6db,
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0xb6b6b6b6, 0x56ad6ad6, 0xaab556ab, 0xaa5556aa, 0xaa554aaa, 0x94a52a54, 0x92525252, 0x12492494,
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0x48912249,
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};
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/* sine table for delta sigma modulation, 2200Hz */
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static const uint32_t space_tab[SPACE_TAB_LEN] = {
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0x10000200, 0x10002000, 0x20100200, 0x20404040, 0x44108208, 0x11111108, 0x24924489, 0xa9494949,
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0x5552aa54, 0x55aad555, 0x6dadad6b, 0xb76dbb6d, 0x77bbbbbb, 0xfbefbdef, 0xbfdfbf7e, 0xbffbff7f,
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0xf7fff7ff, 0xffffdfff, 0xffeffffe, 0xffbfffbf, 0xfdff7ff7, 0xfbf7f7fb, 0xef7bef7e, 0xbbbbbbbd,
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0x6db76ddb, 0xad6b5b6b, 0x5556aad5, 0x54aa5555, 0x24a4a52a, 0x12449249, 0x21110911, 0x10420842,
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0x02020408, 0x00801004, 0x00040008, 0x00400008, 0x10000200, 0x10002000, 0x20100200, 0x20404040,
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0x44108208, 0x11111108, 0x24924489, 0xa9494949, 0x5552aa54, 0x55aad555, 0x6dadad6b, 0xb76dbb6d,
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0x77bbbbbb, 0xfbefbdef, 0xbfdfbf7e, 0xbffbff7f, 0xf7fff7ff, 0xffffdfff, 0xffeffffe, 0xffbfffbf,
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0xfdff7ff7, 0xfbf7f7fb, 0xef7bef7e, 0xbbbbbbbd, 0x6db76ddb, 0xad6b5b6b, 0x5556aad5, 0x54aa5555,
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0x24a4a52a, 0x12449249, 0x21110911, 0x10420842, 0x02020408, 0x00801004, 0x00040008, 0x00400008,
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0x10000200, 0x10002000, 0x20100200, 0x20404040, 0x44108208, 0x11111108, 0x24924489, 0xa9494949,
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0x5552aa54, 0x55aad555, 0x6dadad6b, 0xb76dbb6d, 0x77bbbbbb, 0xfbefbdef, 0xbfdfbf7e, 0xbffbff7f,
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0xf7fff7ff, 0xffffdfff, 0xffeffffe, 0xffbfffbf, 0xfdff7ff7, 0xfbf7f7fb, 0xef7bef7e, 0xbbbbbbbd,
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};
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/* sine table for different phase */
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static const uint32_t *phase_tab[2][PHASE_CYCLE] = {
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{ &space_tab[0], &space_tab[6], &space_tab[12], &space_tab[18], &space_tab[24], &space_tab[30], },
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{ &mark_tab[0], &mark_tab[11], &mark_tab[22], &mark_tab[33], &mark_tab[44], &mark_tab[55], },
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};
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