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rocketry
Richard Eoin Meadows 2014-07-26 13:05:58 +01:00
rodzic 438a85b6f0
commit 484cf55d9d
4 zmienionych plików z 4599 dodań i 169 usunięć
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20
hardware/fbri_development.brd
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@ -11824,8 +11824,10 @@ design rules under a new name.</description>
<via x="12.25" y="14.25" extent="1-16" drill="0.3"/>
<wire x1="12.25" y1="14.25" x2="9.46" y2="14.25" width="0.1524" layer="16"/>
<wire x1="9.46" y1="14.25" x2="3" y2="14.25" width="0.1524" layer="16"/>
<wire x1="15" y1="11.875" x2="14.625" y2="11.875" width="0.1524" layer="1"/>
<wire x1="14.625" y1="11.875" x2="12.25" y2="14.25" width="0.1524" layer="1"/>
<wire x1="15" y1="11.875" x2="14.375" y2="11.875" width="0.1524" layer="1"/>
<wire x1="14.375" y1="11.875" x2="12.625" y2="13.625" width="0.1524" layer="1"/>
<wire x1="12.625" y1="13.625" x2="12.625" y2="13.875" width="0.1524" layer="1"/>
<wire x1="12.625" y1="13.875" x2="12.25" y2="14.25" width="0.1524" layer="1"/>
</signal>
<signal name="TIME_1KHZ">
<contactref element="U1" pad="27"/>
@ -12048,7 +12050,6 @@ design rules under a new name.</description>
</signal>
<signal name="SI_HF_CLK">
<contactref element="U2" pad="17"/>
<contactref element="U1" pad="17"/>
<contactref element="JP10" pad="2"/>
<wire x1="4.905" y1="8.5" x2="4.375" y2="8.5" width="0.1524" layer="1"/>
<wire x1="4.375" y1="8.5" x2="4.125" y2="8.75" width="0.1524" layer="1"/>
@ -12062,11 +12063,13 @@ design rules under a new name.</description>
<wire x1="12.25" y1="10.5" x2="12.25" y2="12" width="0.1524" layer="16"/>
<wire x1="12.25" y1="12" x2="13.25" y2="13" width="0.1524" layer="16"/>
<wire x1="13.25" y1="13" x2="13.25" y2="14.25" width="0.1524" layer="16"/>
<wire x1="15" y1="12.875" x2="14.625" y2="12.875" width="0.1524" layer="1"/>
<wire x1="14.625" y1="12.875" x2="13.25" y2="14.25" width="0.1524" layer="1"/>
<wire x1="14.625" y1="12.375" x2="13.5" y2="13.5" width="0.1524" layer="1"/>
<wire x1="13.5" y1="13.5" x2="13.5" y2="14" width="0.1524" layer="1"/>
<wire x1="13.5" y1="14" x2="13.25" y2="14.25" width="0.1524" layer="1"/>
<contactref element="U1" pad="18"/>
<wire x1="15" y1="12.375" x2="14.625" y2="12.375" width="0.1524" layer="1"/>
</signal>
<signal name="SI_SDN">
<contactref element="U1" pad="16"/>
<contactref element="U2" pad="1"/>
<contactref element="JP9" pad="5"/>
<wire x1="5.875" y1="6.03" x2="5.655" y2="6.25" width="0.1524" layer="1"/>
@ -12076,10 +12079,11 @@ design rules under a new name.</description>
<wire x1="2.75" y1="12.75" x2="0.25" y2="15.25" width="0.1524" layer="1"/>
<wire x1="0.25" y1="15.25" x2="0.25" y2="17.533" width="0.1524" layer="1"/>
<wire x1="0.25" y1="17.533" x2="1.84" y2="19.123" width="0.1524" layer="1"/>
<wire x1="15.75" y1="13.625" x2="15.75" y2="18" width="0.1524" layer="1"/>
<wire x1="12.75" y1="21" x2="3.717" y2="21" width="0.1524" layer="1"/>
<wire x1="3.717" y1="21" x2="1.84" y2="19.123" width="0.1524" layer="1"/>
<wire x1="12.75" y1="21" x2="15.75" y2="18" width="0.1524" layer="1"/>
<wire x1="12.75" y1="21" x2="15" y2="18.75" width="0.1524" layer="1"/>
<contactref element="U1" pad="17"/>
<wire x1="15" y1="12.875" x2="15" y2="18.75" width="0.1524" layer="1"/>
</signal>
<signal name="SI_GPIO0">
<contactref element="U2" pad="9"/>

22
hardware/fbri_development.sch
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@ -10515,7 +10515,7 @@ a bourns CVH252009-3R3M with 0.1Ω ESR max in a 1008 package</text>
<text x="170.18" y="151.384" size="1.27" layer="97" font="vector" ratio="11">(SERCOM0)</text>
<wire x1="169.164" y1="153.924" x2="169.164" y2="149.352" width="0.1524" layer="97"/>
<text x="93.98" y="114.554" size="1.27" layer="97" font="vector" ratio="11" rot="MR0">(DO: PAD2, SCK: PAD3, DOPO: 0x1)</text>
<text x="170.18" y="135.128" size="1.27" layer="97" font="vector" ratio="11">(GCLK_IO[2])</text>
<text x="170.18" y="132.588" size="1.27" layer="97" font="vector" ratio="11">(GCLK_IO[3])</text>
<text x="96.52" y="132.334" size="1.27" layer="97" font="vector" ratio="11" rot="MR0">(SERCOM1)</text>
<wire x1="97.536" y1="133.604" x2="97.536" y2="129.032" width="0.1524" layer="97"/>
<text x="96.52" y="129.794" size="1.27" layer="97" font="vector" ratio="11" rot="MR0">(TX: PAD0, TXPO: 0x0)</text>
@ -11628,23 +11628,18 @@ a bourns CVH252009-3R3M with 0.1Ω ESR max in a 1008 package</text>
<label x="340.36" y="137.16" size="1.778" layer="95" ratio="11"/>
</segment>
<segment>
<pinref part="U1" gate="G$1" pin="PA16"/>
<wire x1="152.4" y1="134.62" x2="167.64" y2="134.62" width="0.1524" layer="91"/>
<label x="154.94" y="134.62" size="1.778" layer="95" ratio="11"/>
</segment>
<segment>
<wire x1="17.78" y1="256.54" x2="33.02" y2="256.54" width="0.1524" layer="91"/>
<label x="20.32" y="256.54" size="1.778" layer="95"/>
<pinref part="JP10" gate="G$1" pin="2"/>
</segment>
<segment>
<pinref part="U1" gate="G$1" pin="PA17"/>
<wire x1="152.4" y1="132.08" x2="167.64" y2="132.08" width="0.1524" layer="91"/>
<label x="154.94" y="132.08" size="1.778" layer="95"/>
</segment>
</net>
<net name="SI_SDN" class="0">
<segment>
<pinref part="U1" gate="G$1" pin="PA15"/>
<wire x1="152.4" y1="137.16" x2="167.64" y2="137.16" width="0.1524" layer="91"/>
<label x="154.94" y="137.16" size="1.778" layer="95" ratio="11"/>
</segment>
<segment>
<pinref part="U2" gate="G$1" pin="SDN"/>
<wire x1="401.32" y1="134.62" x2="419.1" y2="134.62" width="0.1524" layer="91"/>
<label x="403.86" y="134.62" size="1.778" layer="95" ratio="11"/>
@ -11654,6 +11649,11 @@ a bourns CVH252009-3R3M with 0.1Ω ESR max in a 1008 package</text>
<wire x1="17.78" y1="281.94" x2="33.02" y2="281.94" width="0.1524" layer="91"/>
<label x="20.32" y="281.94" size="1.778" layer="95"/>
</segment>
<segment>
<pinref part="U1" gate="G$1" pin="PA16"/>
<wire x1="152.4" y1="134.62" x2="167.64" y2="134.62" width="0.1524" layer="91"/>
<label x="154.94" y="134.62" size="1.778" layer="95"/>
</segment>
</net>
<net name="SI_GPIO0" class="0">
<segment>

1370
hardware/fbri_flight_straight.brd
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Plik diff jest za duży Load Diff

3356
hardware/fbri_flight_straight.sch
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Plik diff jest za duży Load Diff