kopia lustrzana https://github.com/RPiks/pico-hf-oscillator
186 wiersze
6.9 KiB
C
186 wiersze
6.9 KiB
C
///////////////////////////////////////////////////////////////////////////////
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//
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// Roman Piksaykin [piksaykin@gmail.com], R2BDY
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// https://www.qrz.com/db/r2bdy
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//
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///////////////////////////////////////////////////////////////////////////////
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//
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//
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// piodco.c - Digital controlled radio freq oscillator based on PIO.
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//
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//
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// DESCRIPTION
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//
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// The oscillator provides precise generation of any frequency ranging
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// from 1.1 to 9.4 MHz with tenth's of millihertz resolution (please note that
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// this is relative resolution owing to the fact that the absolute accuracy of
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// onboard crystal of pi pico is limited).
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// The DCO uses phase locked loop principle programmed in C.
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// The DCO does *NOT* use any floating point operations - all time-critical
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// instructions run in 1 CPU cycle.
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// Currently the upper freq. limit is about 9.8 MHz and it is achieved only
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// using pi pico overclocking to 270MHz.
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// Owing to the meager frequency step, it is possible to use 3, 5, or 7th
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// harmonics of generated frequency. Such solution completely cover all HF and
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// low band up to about 66 MHz.
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// This is an experimental project of amateur radio class and it is devised
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// by me on the free will base in order to experiment with QRP narrowband
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// digital modes.
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// I gracefully appreciate any thoughts or comments on that matter.
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//
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// PLATFORM
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// Raspberry Pi pico.
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//
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// REVISION HISTORY
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//
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// Rev 0.1 05 Nov 2023 Initial release
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// Rev 0.2 18 Nov 2023
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//
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// PROJECT PAGE
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// https://github.com/RPiks/pico-hf-oscillator
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//
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// LICENCE
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// MIT License (http://www.opensource.org/licenses/mit-license.php)
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//
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// Copyright (c) 2023 by Roman Piksaykin
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//
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// Permission is hereby granted, free of charge,to any person obtaining a copy
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// of this software and associated documentation files (the Software), to deal
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// in the Software without restriction,including without limitation the rights
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// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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// copies of the Software, and to permit persons to whom the Software is
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// furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in
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// all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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// LIABILITY,WHETHER IN AN ACTION OF CONTRACT,TORT OR OTHERWISE, ARISING FROM,
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// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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// THE SOFTWARE.
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///////////////////////////////////////////////////////////////////////////////
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#include "piodco.h"
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#include <string.h>
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#include "../lib/assert.h"
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#include "build/dco.pio.h"
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int32_t si32precise_cycles;
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/// @brief Initializes DCO context and prepares PIO hardware.
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/// @param pdco Ptr to DCO context.
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/// @param gpio The GPIO of DCO output.
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/// @param cpuclkhz The system CPU clock freq., Hz.
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/// @return 0 if OK.
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int PioDCOInit(PioDco *pdco, int gpio, int cpuclkhz)
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{
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assert_(pdco);
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assert_(cpuclkhz);
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memset(pdco, 0, sizeof(PioDco));
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pdco->_clkfreq_hz = cpuclkhz;
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pdco->_pio = pio0;
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pdco->_gpio = gpio;
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pdco->_offset = pio_add_program(pdco->_pio, &dco_program);
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pdco->_ism = pio_claim_unused_sm(pdco->_pio, true);
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dco_program_init(pdco->_pio, pdco->_ism, pdco->_offset, pdco->_gpio);
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pdco->_pio_sm = dco_program_get_default_config(pdco->_offset);
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sm_config_set_set_pins(&pdco->_pio_sm, pdco->_gpio, 1);
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pio_gpio_init(pdco->_pio, pdco->_gpio);
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pio_sm_init(pdco->_pio, pdco->_ism, pdco->_offset, &pdco->_pio_sm);
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//pio_sm_set_enabled(pdco->_pio, pdco->_ism, true);
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return 0;
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}
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/// @brief Sets DCO working frequency in Hz: Fout = ui32_frq_hz + ui32_frq_millihz * 1e-3.
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/// @param pdco Ptr to DCO context.
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/// @param ui32_frq_hz The `coarse` part of frequency [Hz].
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/// @param ui32_frq_millihz The `fine` part of frequency [Hz].
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/// @return 0 if OK. -1 invalid freq.
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/// @attention The func can be called while DCO running.
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int PioDCOSetFreq(PioDco *pdco, uint32_t ui32_frq_hz, uint32_t ui32_frq_millihz)
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{
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assert_(pdco);
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assert(pdco->_clkfreq_hz);
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/* RPix: Calculate an accurate value of phase increment of the freq
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per 1 tick of CPU clock, here 2^24 is scaling coefficient. */
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const int64_t i64denominator = 2000LL * (int64_t)ui32_frq_hz + (int64_t)ui32_frq_millihz;
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pdco->_frq_cycles_per_pi = (int32_t)(((int64_t)pdco->_clkfreq_hz * (int64_t)(1<<24) * 1000LL
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+(i64denominator>>1)) / i64denominator);
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//pdco->_frq_cycles_per_pi = (int32_t)(((int64_t)pdco->_clkfreq_hz * (int64_t)(1<<24)
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//+ (ui32_frq_hz>>1)) / (int64_t)ui32_frq_hz);
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si32precise_cycles = pdco->_frq_cycles_per_pi;
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return 0;
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}
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/// @brief Starts the DCO.
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/// @param pdco Ptr to DCO context.
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void PioDCOStart(PioDco *pdco)
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{
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assert_(pdco);
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pio_sm_set_enabled(pdco->_pio, pdco->_ism, true);
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}
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/// @brief Stops the DCO.
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/// @param pdco Ptr to DCO context.
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void PioDCOStop(PioDco *pdco)
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{
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assert_(pdco);
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pio_sm_set_enabled(pdco->_pio, pdco->_ism, false);
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}
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/// @brief Main worker task of DCO. It is time critical, so it ought to be run on
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/// @brief the dedicated pi pico core.
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/// @param pDCO Ptr to DCO context.
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/// @return No return. It spins forever.
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void RAM (PioDCOWorker)(PioDco *pDCO)
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{
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assert_(pDCO);
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register PIO pio = pDCO->_pio;
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register uint sm = pDCO->_ism;
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register int32_t i32acc_error = 0;
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register uint32_t *preg32 = pDCO->_ui32_pioreg;
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register uint8_t *pu8reg = (uint8_t *)preg32;
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//si32precise_cycles = pDCO->_frq_cycles_per_pi;
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for(;;)
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{
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const register int32_t i32reg = si32precise_cycles;
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/* RPix: Load the next precise value of CPU CLK cycles per DCO cycle,
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scaled by 2^24. It yields about 24 millihertz resolution at @10MHz
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DCO frequency. */
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for(int i = 0; i < 32; ++i)
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{
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/* RPix: Calculate the integer number of CPU CLK cycles per next
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DCO cycle, corrected by accumulated error (feedback of the PLL). */
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const int32_t i32wc = iSAR(i32reg - i32acc_error + (1<<23), 24);
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/* RPix: Calculate the difference btw calculated value scaled to
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`fine` state and precise value of DCO cycles per CPU CLK cycle.
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This forms a phase locked loop which provides precise freq
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on long run. */
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i32acc_error += (i32wc<<24) - i32reg;
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/* RPix: Set PIO array contents corrected by pio program delay
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of N CPU CLK cycles owing to pio asm instructions. */
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pu8reg[i] = i32wc - PIOASM_DELAY_CYCLES;
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}
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dco_program_puts(pio, sm, preg32);
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}
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}
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