kopia lustrzana https://github.com/majbthrd/pico-debug
160 wiersze
7.4 KiB
C
160 wiersze
7.4 KiB
C
/**
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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// =============================================================================
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// Register block : XOSC
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// Version : 1
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// Bus type : apb
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// Description : Controls the crystal oscillator
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// =============================================================================
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#ifndef HARDWARE_REGS_XOSC_DEFINED
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#define HARDWARE_REGS_XOSC_DEFINED
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// =============================================================================
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// Register : XOSC_CTRL
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// Description : Crystal Oscillator Control
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#define XOSC_CTRL_OFFSET 0x00000000
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#define XOSC_CTRL_BITS 0x00ffffff
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#define XOSC_CTRL_RESET 0x00000000
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// -----------------------------------------------------------------------------
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// Field : XOSC_CTRL_ENABLE
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// Description : On power-up this field is initialised to DISABLE and the chip
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// runs from the ROSC.
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// If the chip has subsequently been programmed to run from the
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// XOSC then setting this field to DISABLE may lock-up the chip.
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// If this is a concern then run the clk_ref from the ROSC and
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// enable the clk_sys RESUS feature.
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// The 12-bit code is intended to give some protection against
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// accidental writes. An invalid setting will enable the
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// oscillator.
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// 0xd1e -> DISABLE
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// 0xfab -> ENABLE
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#define XOSC_CTRL_ENABLE_RESET "-"
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#define XOSC_CTRL_ENABLE_BITS 0x00fff000
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#define XOSC_CTRL_ENABLE_MSB 23
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#define XOSC_CTRL_ENABLE_LSB 12
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#define XOSC_CTRL_ENABLE_ACCESS "RW"
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#define XOSC_CTRL_ENABLE_VALUE_DISABLE 0xd1e
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#define XOSC_CTRL_ENABLE_VALUE_ENABLE 0xfab
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// -----------------------------------------------------------------------------
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// Field : XOSC_CTRL_FREQ_RANGE
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// Description : Frequency range. This resets to 0xAA0 and cannot be changed.
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// 0xaa0 -> 1_15MHZ
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// 0xaa1 -> RESERVED_1
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// 0xaa2 -> RESERVED_2
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// 0xaa3 -> RESERVED_3
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#define XOSC_CTRL_FREQ_RANGE_RESET "-"
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#define XOSC_CTRL_FREQ_RANGE_BITS 0x00000fff
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#define XOSC_CTRL_FREQ_RANGE_MSB 11
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#define XOSC_CTRL_FREQ_RANGE_LSB 0
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#define XOSC_CTRL_FREQ_RANGE_ACCESS "RW"
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#define XOSC_CTRL_FREQ_RANGE_VALUE_1_15MHZ 0xaa0
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#define XOSC_CTRL_FREQ_RANGE_VALUE_RESERVED_1 0xaa1
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#define XOSC_CTRL_FREQ_RANGE_VALUE_RESERVED_2 0xaa2
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#define XOSC_CTRL_FREQ_RANGE_VALUE_RESERVED_3 0xaa3
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// =============================================================================
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// Register : XOSC_STATUS
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// Description : Crystal Oscillator Status
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#define XOSC_STATUS_OFFSET 0x00000004
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#define XOSC_STATUS_BITS 0x81001003
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#define XOSC_STATUS_RESET 0x00000000
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// -----------------------------------------------------------------------------
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// Field : XOSC_STATUS_STABLE
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// Description : Oscillator is running and stable
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#define XOSC_STATUS_STABLE_RESET 0x0
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#define XOSC_STATUS_STABLE_BITS 0x80000000
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#define XOSC_STATUS_STABLE_MSB 31
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#define XOSC_STATUS_STABLE_LSB 31
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#define XOSC_STATUS_STABLE_ACCESS "RO"
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// -----------------------------------------------------------------------------
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// Field : XOSC_STATUS_BADWRITE
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// Description : An invalid value has been written to CTRL_ENABLE or
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// CTRL_FREQ_RANGE or DORMANT
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#define XOSC_STATUS_BADWRITE_RESET 0x0
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#define XOSC_STATUS_BADWRITE_BITS 0x01000000
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#define XOSC_STATUS_BADWRITE_MSB 24
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#define XOSC_STATUS_BADWRITE_LSB 24
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#define XOSC_STATUS_BADWRITE_ACCESS "WC"
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// -----------------------------------------------------------------------------
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// Field : XOSC_STATUS_ENABLED
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// Description : Oscillator is enabled but not necessarily running and stable,
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// resets to 0
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#define XOSC_STATUS_ENABLED_RESET "-"
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#define XOSC_STATUS_ENABLED_BITS 0x00001000
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#define XOSC_STATUS_ENABLED_MSB 12
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#define XOSC_STATUS_ENABLED_LSB 12
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#define XOSC_STATUS_ENABLED_ACCESS "RO"
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// -----------------------------------------------------------------------------
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// Field : XOSC_STATUS_FREQ_RANGE
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// Description : The current frequency range setting, always reads 0
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// 0x0 -> 1_15MHZ
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// 0x1 -> RESERVED_1
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// 0x2 -> RESERVED_2
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// 0x3 -> RESERVED_3
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#define XOSC_STATUS_FREQ_RANGE_RESET "-"
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#define XOSC_STATUS_FREQ_RANGE_BITS 0x00000003
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#define XOSC_STATUS_FREQ_RANGE_MSB 1
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#define XOSC_STATUS_FREQ_RANGE_LSB 0
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#define XOSC_STATUS_FREQ_RANGE_ACCESS "RO"
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#define XOSC_STATUS_FREQ_RANGE_VALUE_1_15MHZ 0x0
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#define XOSC_STATUS_FREQ_RANGE_VALUE_RESERVED_1 0x1
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#define XOSC_STATUS_FREQ_RANGE_VALUE_RESERVED_2 0x2
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#define XOSC_STATUS_FREQ_RANGE_VALUE_RESERVED_3 0x3
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// =============================================================================
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// Register : XOSC_DORMANT
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// Description : Crystal Oscillator pause control
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// This is used to save power by pausing the XOSC
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// On power-up this field is initialised to WAKE
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// An invalid write will also select WAKE
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// WARNING: stop the PLLs before selecting dormant mode
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// WARNING: setup the irq before selecting dormant mode
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// 0x636f6d61 -> DORMANT
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// 0x77616b65 -> WAKE
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#define XOSC_DORMANT_OFFSET 0x00000008
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#define XOSC_DORMANT_BITS 0xffffffff
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#define XOSC_DORMANT_RESET "-"
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#define XOSC_DORMANT_MSB 31
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#define XOSC_DORMANT_LSB 0
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#define XOSC_DORMANT_ACCESS "RW"
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#define XOSC_DORMANT_VALUE_DORMANT 0x636f6d61
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#define XOSC_DORMANT_VALUE_WAKE 0x77616b65
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// =============================================================================
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// Register : XOSC_STARTUP
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// Description : Controls the startup delay
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#define XOSC_STARTUP_OFFSET 0x0000000c
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#define XOSC_STARTUP_BITS 0x00103fff
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#define XOSC_STARTUP_RESET 0x00000000
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// -----------------------------------------------------------------------------
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// Field : XOSC_STARTUP_X4
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// Description : Multiplies the startup_delay by 4. This is of little value to
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// the user given that the delay can be programmed directly
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#define XOSC_STARTUP_X4_RESET "-"
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#define XOSC_STARTUP_X4_BITS 0x00100000
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#define XOSC_STARTUP_X4_MSB 20
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#define XOSC_STARTUP_X4_LSB 20
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#define XOSC_STARTUP_X4_ACCESS "RW"
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// -----------------------------------------------------------------------------
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// Field : XOSC_STARTUP_DELAY
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// Description : in multiples of 256*xtal_period
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#define XOSC_STARTUP_DELAY_RESET "-"
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#define XOSC_STARTUP_DELAY_BITS 0x00003fff
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#define XOSC_STARTUP_DELAY_MSB 13
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#define XOSC_STARTUP_DELAY_LSB 0
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#define XOSC_STARTUP_DELAY_ACCESS "RW"
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// =============================================================================
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// Register : XOSC_COUNT
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// Description : A down counter running at the xosc frequency which counts to
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// zero and stops.
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// To start the counter write a non-zero value.
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// Can be used for short software pauses when setting up time
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// sensitive hardware.
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#define XOSC_COUNT_OFFSET 0x0000001c
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#define XOSC_COUNT_BITS 0x000000ff
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#define XOSC_COUNT_RESET 0x00000000
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#define XOSC_COUNT_MSB 7
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#define XOSC_COUNT_LSB 0
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#define XOSC_COUNT_ACCESS "RW"
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// =============================================================================
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#endif // HARDWARE_REGS_XOSC_DEFINED
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