Fix EI2C for 10B board. Enable debug UART. Handle ICU zer0.

pull/4/head
bob 2018-07-12 22:42:03 +10:00
rodzic ee710c7c59
commit 5b6b8f5c52
10 zmienionych plików z 88 dodań i 66 usunięć

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@ -150,6 +150,9 @@
/* The external port can be used for bit bang I2C. */
#define ENABLE_EXTERNAL_I2C TRUE
#define EI2C_SCL LINE_IO_TXD /* SCL */
#define EI2C_SDA LINE_IO_RXD /* SDA */
/* To use IO_TXD/IO_RXD for UART debug channel. */
#define ENABLE_SERIAL_DEBUG FALSE

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@ -149,7 +149,10 @@
//#define LINE_UART4_RX PAL_LINE(GPIOA, 11U)
/* The external port can be used for bit bang I2C. */
#define ENABLE_EXTERNAL_I2C FALSE
#define ENABLE_EXTERNAL_I2C TRUE
#define EI2C_SCL LINE_GPIO_PIN1 /* SCL */
#define EI2C_SDA LINE_GPIO_PIN2 /* SDA */
/* To use IO_TXD/IO_RXD for UART debug channel. */
#define ENABLE_SERIAL_DEBUG TRUE

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@ -3,8 +3,9 @@
* pins of the Pecan. The I2C bus is bitbanged and operates at 45 kHz if the
* STM32 is operated at SYSCLK=48MHz.
*
* TXD pin: SCL
* RXD pin: SDA
* GPIO pins...
* EI2C_SCL
* EI2C_SDA
*
* @see https://en.wikipedia.org/wiki/I%C2%B2C
*/
@ -14,32 +15,29 @@
#include "debug.h"
#include "portab.h"
#define SCL LINE_IO_TXD /* SCL is connected to the TXD labeled line */
#define SDA LINE_IO_RXD /* SDA is connected to the RXD labeled line */
static bool started = false;
static inline bool read_SCL(void) { // Return current level of SCL line, 0 or 1
palSetLineMode(SCL, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
return palReadLine(SCL);
palSetLineMode(EI2C_SCL, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
return palReadLine(EI2C_SCL);
}
static inline bool read_SDA(void) { // Return current level of SDA line, 0 or 1
palSetLineMode(SDA, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
return palReadLine(SDA);
palSetLineMode(EI2C_SDA, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
return palReadLine(EI2C_SDA);
}
static inline void set_SCL(void) { // Do not drive SCL(set pin high-impedance)
palSetLineMode(SCL, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
palSetLineMode(EI2C_SCL, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
}
static inline void clear_SCL(void) { // Actively drive SCL signal low
palSetLineMode(SCL, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palClearLine(SCL);
palSetLineMode(EI2C_SCL, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palClearLine(EI2C_SCL);
}
static inline void set_SDA(void) { // Do not drive SDA(set pin high-impedance)
palSetLineMode(SDA, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
palSetLineMode(EI2C_SDA, PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST);
}
static inline void clear_SDA(void) { // Actively drive SDA signal low
palSetLineMode(SDA, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palClearLine(SDA);
palSetLineMode(EI2C_SDA, PAL_MODE_OUTPUT_PUSHPULL | PAL_STM32_OSPEED_HIGHEST);
palClearLine(EI2C_SDA);
}
static inline void arbitration_lost(void) {
TRACE_ERROR("arbitration_lost");
@ -53,7 +51,6 @@ static void i2c_start_cond(void) {
set_SCL();
sysinterval_t t0 = chVTGetSystemTime();
while(read_SCL() == 0 && TIME_I2MS(chVTGetSystemTime()-t0) < 10) { // Clock stretching
// You should add timeout to this loop
}
}
if(read_SDA() == 0)
@ -71,7 +68,6 @@ static void i2c_stop_cond(void) {
// Clock stretching
sysinterval_t t0 = chVTGetSystemTime();
while(read_SCL() == 0 && TIME_I2MS(chVTGetSystemTime()-t0) < 10) { // Clock stretching
// add timeout to this loop.
}
// SCL is high, set SDA from 0 to 1
@ -95,7 +91,6 @@ static void i2c_write_bit(bool bit) {
// Wait for SDA value to be read by slave, minimum of 4us for standard mode
sysinterval_t t0 = chVTGetSystemTime();
while(read_SCL() == 0 && TIME_I2MS(chVTGetSystemTime()-t0) < 10) { // Clock stretching
// You should add timeout to this loop
}
// SCL is high, now data is valid
@ -118,7 +113,6 @@ static bool i2c_read_bit(void) {
sysinterval_t t0 = chVTGetSystemTime();
while(read_SCL() == 0 && TIME_I2MS(chVTGetSystemTime()-t0) < 10) { // Clock stretching
// You should add timeout to this loop
}
// SCL is high, read out bit

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@ -15,6 +15,7 @@
*/
#include "pktconf.h"
#include "portab.h"
/*===========================================================================*/
/* Driver exported variables. */
@ -593,7 +594,7 @@ AFSKDemodDriver *pktCreateAFSKDecoder(packet_svc_t *pktHandler) {
/* Create the AFSK decoder thread. */
extern memory_heap_t *ccm_heap;
myDriver->decoder_thd = chThdCreateFromHeap(ccm_heap,
myDriver->decoder_thd = chThdCreateFromHeap(NULL,
THD_WORKING_AREA_SIZE(PKT_AFSK_DECODER_WA_SIZE),
myDriver->decoder_name,
NORMALPRIO - 10,
@ -931,6 +932,11 @@ THD_FUNCTION(pktAFSKDecoder, arg) {
continue; /* Decoder state switch. */
} /* End case. */
/* If PWM reports a zero valley.
* The PWM side has already posted a PWM_STREAM_CLOSE event.
*/
case PWM_TERM_ICU_ZERO:
/* If CCA ends and the decoder has not validated any frame.
* The PWM side has already posted a PWM_STREAM_CLOSE event.
*/

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@ -53,7 +53,7 @@
#define AFSK_PWM_DATA_CAPTURE_DEBUG 7
#define AFSK_PWM_DATA_REPLAY_DEBUG 8
#define AFSK_DEBUG_TYPE AFSK_NO_DEBUG
#define AFSK_DEBUG_TYPE AFSK_PWM_DATA_CAPTURE_DEBUG
/* Error output type selection. */
#define AFSK_NO_ERROR 0

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@ -665,6 +665,18 @@ void pktRadioICUPeriod(ICUDriver *myICU) {
chSysUnlockFromISR();
return;
}
/*
* Check if either ICU value is zero and thus invalid.
*/
icucnt_t impulse = icuGetWidthX(myICU);
icucnt_t valley = icuGetPeriodX(myICU) - impulse;
if(impulse == 0 || valley == 0) {
pktClosePWMChannelI(myICU, EVT_PWM_STREAM_CLOSE, PWM_TERM_ICU_ZERO);
chSysUnlockFromISR();
return;
}
/* Write ICU data to PWM queue. */
msg_t qs = pktQueuePWMDataI(myICU);

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@ -45,7 +45,7 @@
#define PWM_ACK_DECODE_END 4
#define PWM_TERM_DECODE_STOP 5
#define PWM_TERM_NO_DATA 6
//#define PWM_TERM_QUEUE_LOCK 7
#define PWM_TERM_ICU_ZERO 7
#define PWM_INFO_QUEUE_SWAP 8
#define PWM_ACK_DECODE_ERROR 9

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@ -11,6 +11,7 @@
/*===========================================================================*/
#include "pktconf.h"
#include "dbguart.h"
/**
* @file dbguart.c
@ -22,4 +23,6 @@
binary_semaphore_t debug_out_sem;
BaseSequentialStream* pkt_out = (BaseSequentialStream*)SERIAL_CFG_DEBUG_DRIVER;
/** @} */

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@ -1,42 +1,43 @@
/*
Aerospace Decoder - Copyright (C) 2018 Bob Anderson (VK2GJ)
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
*/
/**
* @file dbguart.h
* @brief Definitions for UART4.
*
* @addtogroup IODevices
* @{
*/
#ifndef DEVICES_DBGUART_H_
#define DEVICES_DBGUART_H_
#include "portab.h"
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#define DBG_ERROR 1
#define DBG_WARN 2
#define DBG_INFO 3
#define DBG_DEBUG 4
#ifdef __cplusplus
extern "C" {
#endif
#ifdef __cplusplus
}
#endif
#endif /* DEVICES_DBGUART_H_ */
/** @} */
/*
Aerospace Decoder - Copyright (C) 2018 Bob Anderson (VK2GJ)
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
*/
/**
* @file dbguart.h
* @brief Definitions for UART4.
*
* @addtogroup IODevices
* @{
*/
#ifndef DEVICES_DBGUART_H_
#define DEVICES_DBGUART_H_
#include "portab.h"
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#define DBG_ERROR 1
#define DBG_WARN 2
#define DBG_INFO 3
#define DBG_DEBUG 4
#ifdef __cplusplus
extern "C" {
#endif
extern BaseSequentialStream* pkt_out;
#ifdef __cplusplus
}
#endif
#endif /* DEVICES_DBGUART_H_ */
/** @} */

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@ -560,7 +560,7 @@ THD_FUNCTION(collectorThread, arg) {
extern uint8_t gps_model;
// Trace data
unixTimestamp2Date(&time, tp->gps_time);
TRACE_INFO( "COLL > GPS status: state=%s model=%s)",
TRACE_INFO( "COLL > GPS status: state=%s model=%s",
get_gps_state_name(tp->gps_state),
gps_get_model_name(gps_model));
TRACE_INFO( "COLL > New data point (ID=%d)\r\n"