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Add FRAM. Various minor changes.

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Peter Hinch 2019-12-17 17:16:50 +00:00
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README.md
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@ -46,14 +46,14 @@ Supported devices. Microchip manufacture each chip in different variants with
letters denoted by "xx" below. The variants cover parameters such as minimum
Vcc value and do not affect the API.
In the table below the Interface column includes page size in bytes.
| Manufacurer | Part | Interface | Bytes | Technology | Docs |
|:-----------:|:--------:|:---------:|:------:|:----------:|:------:|
| Microchip | 25xx1024 | SPI 256 | 128KiB | EEPROM | [SPI.md](./spi/SPI.md) |
| Microchip | 24xx512 | I2C 128 | 64KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx256 | I2C 128 | 32KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx128 | I2C 128 | 16KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx64 | I2C 128 | 8KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
In the table below the Interface column includes page size in bytes.
| Manufacurer | Part | Interface | Bytes | Technology | Docs |
|:-----------:|:--------:|:---------:|:------:|:----------:|:-------------------------:|
| Microchip | 25xx1024 | SPI 256 | 128KiB | EEPROM | [SPI.md](./spi/SPI.md) |
| Microchip | 24xx512 | I2C 128 | 64KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx256 | I2C 128 | 32KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx128 | I2C 128 | 16KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Microchip | 24xx64 | I2C 128 | 8KiB | EEPROM | [I2C.md](./i2c/I2C.md) |
| Adafruit | 1895 | I2C n/a | 32KiB | FRAM | [FRAM.md](./fram/FRAM.md) |
## 1.4 Performance

8
spi/SPI.md
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@ -25,12 +25,12 @@ as below. Pin numbers assume a PDIP package (8 pin plastic dual-in-line).
|:-------:|:---:|:------:|
| 1 CS | Y5 | SS/ |
| 2 SO | Y7 | MISO |
| 3 WP/ | 3V3 | |
| 4 Vss | Gnd | |
| 3 WP/ | 3V3 | 3V3 |
| 4 Vss | Gnd | Gnd |
| 5 SI | Y8 | MOSI |
| 6 SCK | Y6 | SCK |
| 7 HOLD/ | 3V3 | |
| 8 Vcc | 3V3 | |
| 7 HOLD/ | 3V3 | 3V3 |
| 8 Vcc | 3V3 | 3V3 |
For multiple chips a separate CS pin must be assigned to each chip: each one
must be wired to a single chip's CS line. Multiple chips should have 3V3, Gnd,