diff --git a/README.md b/README.md
index 6b26a11..6fe891c 100644
--- a/README.md
+++ b/README.md
@@ -86,6 +86,14 @@ It is likely that other chips with 4096 byte blocks will work but I am unlikely
 to be able to support hardware I don't possess. Users should check datasheets
 for compatibility.
 
+### 1.4.1 Chips tested by users
+
+If you have success with other chips please raise an issue and I will update
+this doc.
+
+CAT24C256LI-G I2C EEPROM 32KiB tested by
+[Julien Phalip](https://github.com/peterhinch/micropython_eeprom/issues/6#issuecomment-825801065).
+
 ## 1.5 Performance
 
 FRAM is truly byte-addressable: its speed is limited only by the speed of the
diff --git a/eeprom/i2c/eeprom_i2c.py b/eeprom/i2c/eeprom_i2c.py
index 6d177f0..a468631 100644
--- a/eeprom/i2c/eeprom_i2c.py
+++ b/eeprom/i2c/eeprom_i2c.py
@@ -21,7 +21,7 @@ class EEPROM(BlockDevice):
     def __init__(self, i2c, chip_size=T24C512, verbose=True, block_size=9):
         self._i2c = i2c
         if chip_size not in (T24C64, T24C128, T24C256, T24C512):
-            raise RuntimeError('Invalid chip size', chip_size)
+            print('Warning: possible unsupported chip. Size:', chip_size)
         nchips = self.scan(verbose, chip_size)  # No. of EEPROM chips
         super().__init__(block_size, nchips, chip_size)
         self._i2c_addr = 0  # I2C address of current chip
diff --git a/eeprom/spi/eeprom_spi.py b/eeprom/spi/eeprom_spi.py
index 6607a56..2675ec3 100644
--- a/eeprom/spi/eeprom_spi.py
+++ b/eeprom/spi/eeprom_spi.py
@@ -30,7 +30,7 @@ class EEPROM(BlockDevice):
     def __init__(self, spi, cspins, size=128, verbose=True, block_size=9):
         # args: virtual block size in bits, no. of chips, bytes in each chip
         if size not in (128, 256):
-            raise ValueError('Valid sizes are 128 or 256')
+            print('Warning: possible unsupported chip. Size:', size)
         super().__init__(block_size, len(cspins), size * 1024)
         self._stm = size == 256
         self._spi = spi