kopia lustrzana https://github.com/micropython/micropython
614 wiersze
16 KiB
C
614 wiersze
16 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Renesas Electronics Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "hal_data.h"
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#include "ra_config.h"
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#include "ra_gpio.h"
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#include "ra_utils.h"
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#include "ra_adc.h"
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static R_ADC0_Type *adc_reg = R_ADC0;
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#if defined(RA4M1) | defined(RA4W1)
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static R_TSN_Type *tsn_reg = (R_TSN_Type *)0x407ec000;
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#endif
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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static R_TSN_CTRL_Type *tsn_ctrl_reg = R_TSN_CTRL;
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static R_TSN_CAL_Type *tsn_cal_reg = R_TSN_CAL;
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#endif
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static uint8_t resolution = RA_ADC_DEF_RESOLUTION;
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typedef struct adc_pin_to_ch {
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uint32_t pin;
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uint8_t ch;
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} adc_pin_to_ch_t;
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static const adc_pin_to_ch_t pin_to_ch[] = {
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#if defined(RA4M1)
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{ P000, AN000 },
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{ P001, AN001 },
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{ P002, AN002 },
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{ P003, AN003 },
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{ P004, AN004 },
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{ P005, AN011 },
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{ P006, AN012 },
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{ P007, AN013 },
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{ P008, AN014 },
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{ P010, AN005 },
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{ P011, AN006 },
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{ P012, AN007 },
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{ P013, AN008 },
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{ P014, AN009 },
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{ P015, AN010 },
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{ P100, AN022 },
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{ P101, AN021 },
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{ P102, AN020 },
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{ P103, AN019 },
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{ P500, AN016 },
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{ P501, AN017 },
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{ P502, AN018 },
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{ P503, AN023 },
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{ P504, AN024 },
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{ P505, AN025 },
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#elif defined(RA4W1)
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{ P004, AN004 },
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{ P010, AN005 },
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{ P011, AN006 },
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{ P014, AN009 },
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{ P015, AN010 },
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{ P102, AN020 },
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{ P103, AN019 },
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{ P501, AN017 },
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#elif defined(RA6M2)
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{ P000, AN000 },
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{ P001, AN001 },
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{ P002, AN002 },
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{ P003, AN007 },
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{ P004, AN100 },
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{ P005, AN101 },
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{ P006, AN102 },
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{ P007, AN107 },
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{ P008, AN003 },
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{ P009, AN004 },
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{ P014, AN005 },
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{ P014, AN105 },
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{ P015, AN006 },
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{ P015, AN106 },
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{ P500, AN016 },
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{ P501, AN116 },
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{ P502, AN017 },
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{ P503, AN117 },
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{ P504, AN018 },
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{ P505, AN118 },
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{ P506, AN019 },
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{ P509, AN020 },
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#elif defined(RA6M3)
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{ P000, AN000 },
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{ P001, AN001 },
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{ P002, AN002 },
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{ P003, AN007 },
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{ P004, AN100 },
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{ P005, AN101 },
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{ P006, AN102 },
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{ P007, AN107 },
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{ P008, AN003 },
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{ P009, AN004 },
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{ P010, AN103 },
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{ P014, AN005 },
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{ P014, AN105 },
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{ P015, AN006 },
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{ P015, AN106 },
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{ P500, AN016 },
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{ P501, AN116 },
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{ P502, AN017 },
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{ P503, AN117 },
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{ P504, AN018 },
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{ P505, AN118 },
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{ P506, AN019 },
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{ P507, AN119 },
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{ P508, AN020 },
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#elif defined(RA6M5)
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{ P000, AN000 },
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{ P001, AN001 },
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{ P002, AN002 },
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{ P003, AN003 },
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{ P004, AN004 },
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{ P005, AN005 },
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{ P006, AN006 },
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{ P007, AN007 },
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{ P008, AN008 },
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{ P009, AN009 },
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{ P010, AN010 },
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{ P014, AN012 },
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{ P015, AN013 },
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{ P000, AN100 },
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{ P001, AN101 },
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{ P002, AN002 },
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{ P500, AN116 },
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{ P501, AN117 },
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{ P502, AN118 },
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{ P503, AN119 },
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{ P504, AN120 },
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{ P505, AN121 },
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{ P506, AN122 },
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{ P507, AN123 },
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{ P508, AN124 },
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{ P800, AN125 },
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{ P801, AN126 },
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{ P802, AN127 },
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{ P803, AN128 },
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#elif defined(RA6M1)
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{ P000, AN000 },
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{ P001, AN001 },
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{ P002, AN002 },
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{ P003, AN007 },
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{ P004, AN100 },
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{ P005, AN101 },
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{ P006, AN102 },
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{ P007, AN107 },
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{ P008, AN003 },
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{ P014, AN005 },
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{ P014, AN105 },
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{ P015, AN006 },
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{ P015, AN106 },
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{ P500, AN016 },
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{ P501, AN116 },
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{ P502, AN017 },
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{ P503, AN117 },
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{ P504, AN018 },
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{ P508, AN020 },
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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};
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#define ADC_PIN_TO_CH_SIZE (sizeof(pin_to_ch) / sizeof(adc_pin_to_ch_t))
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#define ADC_CH_MAX (32)
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#define ADC_UNIT0_SCAN_MAX (28)
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static uint16_t adc_values[ADC_CH_MAX];
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bool ra_adc_pin_to_ch(uint32_t pin, uint8_t *ch) {
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uint32_t i;
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*ch = (uint8_t)ADC_NON;
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for (i = 0; i < ADC_PIN_TO_CH_SIZE; i++) {
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if (pin == pin_to_ch[i].pin) {
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*ch = pin_to_ch[i].ch;
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break;
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}
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}
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if (*ch == (uint8_t)ADC_NON) {
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return false;
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} else {
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return true;
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}
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}
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bool ra_adc_ch_to_pin(uint8_t ch, uint32_t *pin) {
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uint32_t i;
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*pin = (uint32_t)PIN_END;
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for (i = 0; i < ADC_PIN_TO_CH_SIZE; i++) {
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if (ch == pin_to_ch[i].ch) {
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*pin = pin_to_ch[i].pin;
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break;
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}
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}
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if (*pin == (uint32_t)PIN_END) {
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return false;
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} else {
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return true;
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}
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}
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uint8_t ra_adc_get_channel(uint32_t pin) {
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bool flag;
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uint8_t ch;
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flag = ra_adc_pin_to_ch(pin, &ch);
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if (!flag) {
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ch = 0;
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}
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return ch;
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}
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static void ra_adc0_module_start(void) {
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ra_mstpcrd_start(R_MSTP_MSTPCRD_MSTPD16_Msk);
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}
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static void ra_adc0_module_stop(void) {
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ra_mstpcrd_stop(R_MSTP_MSTPCRD_MSTPD16_Msk);
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}
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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static void ra_adc1_module_start(void) {
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ra_mstpcrd_start(R_MSTP_MSTPCRD_MSTPD15_Msk);
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}
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static void ra_adc1_module_stop(void) {
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ra_mstpcrd_stop(R_MSTP_MSTPCRD_MSTPD15_Msk);
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}
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#endif
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// For RA4M1 and RA4W1, there is no TSN configuration
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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static void ra_tsn_module_start(void) {
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ra_mstpcrd_start(R_MSTP_MSTPCRD_MSTPD22_Msk);
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}
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static void ra_tsn_module_stop(void) {
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ra_mstpcrd_stop(R_MSTP_MSTPCRD_MSTPD22_Msk);
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}
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#endif
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void ra_adc_set_pin(uint32_t pin, bool adc_enable) {
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uint32_t port = GPIO_PORT(pin);
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uint32_t bit = GPIO_BIT(pin);
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uint32_t pfs = _PXXPFS(port, bit);
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pwpr_unprotect();
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if (adc_enable) {
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pfs &= ~PMR_MASK; /* GPIO */
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pfs &= ~PDR_MASK; /* input */
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pfs |= ASEL_MASK; /* set adc bit */
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} else {
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pfs |= PMR_MASK; /* GPIO */
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pfs &= ~PDR_MASK; /* input */
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pfs &= ~ASEL_MASK; /* clear adc bit */
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}
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_PXXPFS(port, bit) = pfs;
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pwpr_protect();
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}
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void ra_adc_enable(uint32_t pin) {
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ra_adc_set_pin(pin, true);
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}
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void ra_adc_disable(uint32_t pin) {
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ra_adc_set_pin(pin, false);
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}
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__attribute__((naked)) static void min_delay(__attribute__((unused)) uint32_t loop_cnt) {
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__asm volatile (
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"sw_delay_loop: \n"
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#if defined(__ICCARM__) || defined(__ARMCC_VERSION)
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" subs r0, #1 \n" ///< 1 cycle
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#elif defined(__GNUC__)
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" sub r0, r0, #1 \n" ///< 1 cycle
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#endif
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" cmp r0, #0 \n" ///< 1 cycle
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/* CM0 and CM23 have a different instruction set */
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#if defined(__CORE_CM0PLUS_H_GENERIC) || defined(__CORE_CM23_H_GENERIC)
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" bne sw_delay_loop \n" ///< 2 cycles
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#else
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" bne.n sw_delay_loop \n" ///< 2 cycles
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#endif
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" bx lr \n"); ///< 2 cycles
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}
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static void udelay(uint32_t us) {
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while (us-- > 0) {
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min_delay(PCLK / 1000000 / 4);
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}
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}
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void ra_adc_set_resolution(uint8_t res) {
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uint16_t adcer;
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uint16_t adprc;
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#if defined(RA4M1) | defined(RA4W1)
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if ((res == 14) | (res == 12)) {
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if (res == 14) {
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adprc = 0x0006;
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} else {
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adprc = 0x0000;
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}
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adcer = adc_reg->ADCER;
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adcer &= (uint16_t) ~0x0006;
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adcer |= (uint16_t)adprc;
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adc_reg->ADCER;
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resolution = res;
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}
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#else
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if ((res == 12) | (res == 10) | (res == 8)) {
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if (res == 12) {
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adprc = 0x0000;
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} else if (res == 10) {
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adprc = 0x0002;
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} else {
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adprc = 0x0004;
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}
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adcer = adc_reg->ADCER;
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adcer &= (uint16_t) ~0x0006;
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adcer |= (uint16_t)adprc;
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adc_reg->ADCER;
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resolution = res;
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}
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#endif
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}
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uint8_t ra_adc_get_resolution(void) {
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uint8_t res = 0;
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uint16_t adcer;
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adcer = adc_reg->ADCER;
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adcer &= 0x0006;
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#if defined(RA4M1) | defined(RA4W1)
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if (adcer == 0x0006) {
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res = 14;
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} else if (adcer == 0x0000) {
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res = 12;
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}
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#else
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if (adcer == 0x0000) {
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res = 12;
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} else if (adcer == 0x0002) {
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res = 10;
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} else if (adcer == 0x0004) {
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res = 8;
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}
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#endif
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return res;
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}
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// assumption
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// AVCC0 is used. Neither VREFH0 nor internal reference voltage is not used.
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uint16_t ra_adc_read_ch(uint8_t ch) {
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uint16_t value16 = 0;
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if ((ch == ADC_TEMP) | (ch == ADC_REF)) {
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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if (ch == ADC_TEMP) {
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adc_reg->ADEXICR_b.TSSA = 1;
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tsn_ctrl_reg->TSCR_b.TSEN = 1;
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while (!tsn_ctrl_reg->TSCR_b.TSEN) {
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;
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}
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tsn_ctrl_reg->TSCR_b.TSOE = 1;
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while (!tsn_ctrl_reg->TSCR_b.TSOE) {
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;
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}
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udelay(300);
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} else if (ch == ADC_REF) {
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adc_reg->ADEXICR_b.OCSA = 1;
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udelay(300);
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}
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#endif
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adc_reg->ADANSA[0] = 0;
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adc_reg->ADANSA[1] = 0;
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} else if (ch < 16) {
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adc_reg->ADANSA[0] |= (uint16_t)(1 << ch);
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} else {
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adc_reg->ADANSA[1] |= (uint16_t)(1 << (ch - 16));
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}
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adc_reg->ADCSR_b.ADCS = 0; /* single scan mode */
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adc_reg->ADCSR_b.ADST = 1; /* start a/d conversion */
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while (adc_reg->ADCSR_b.ADST) {
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; /* ADC in progress*/
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}
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if (ch == ADC_TEMP) {
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value16 = (uint16_t)adc_reg->ADTSDR;
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} else if (ch == ADC_REF) {
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value16 = (uint16_t)adc_reg->ADOCDR;
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} else {
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value16 = (uint16_t)adc_reg->ADDR[ch];
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}
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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if (ch == ADC_TEMP) {
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tsn_ctrl_reg->TSCR_b.TSOE = 0;
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while (tsn_ctrl_reg->TSCR_b.TSOE) {
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;
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}
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tsn_ctrl_reg->TSCR_b.TSEN = 0;
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while (tsn_ctrl_reg->TSCR_b.TSEN) {
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;
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}
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} else if (ch == ADC_REF) {
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adc_reg->ADEXICR_b.OCSA = 0;
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}
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#endif
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return value16;
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}
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uint16_t ra_adc_read(uint32_t pin) {
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uint8_t ch = ra_adc_get_channel(pin);
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if (ch == ADC_NON) {
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return 0;
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}
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return ra_adc_read_ch(ch);
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}
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int16_t ra_adc_read_itemp(void) {
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int16_t temp = 0;
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int16_t vmax = (int16_t)(1 << resolution);
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#if defined(RA4M1) | defined(RA4W1)
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uint16_t cal125 = ((uint16_t)tsn_reg->TSCDRH << 8) + (uint16_t)tsn_reg->TSCDRL;
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uint16_t val = ra_adc_read_ch(ADC_TEMP);
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int16_t v125 = (int16_t)(33 * cal125 / vmax / 10);
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int16_t vtemp = (int16_t)(33 * val / vmax / 10);
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temp = (int16_t)(125 + ((vtemp - v125) * 1000000 / (int16_t)BSP_FEATURE_ADC_TSN_SLOPE));
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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uint16_t cal127 = (uint16_t)tsn_cal_reg->TSCDR;
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uint16_t val = ra_adc_read_ch(ADC_TEMP);
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int16_t v127 = (int16_t)(33 * cal127 / vmax / 10);
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int16_t vtemp = (int16_t)(33 * val / vmax / 10);
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temp = (int16_t)(127 + ((vtemp - v127) * 1000000 / (int16_t)BSP_FEATURE_ADC_TSN_SLOPE));
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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return temp;
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}
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float ra_adc_read_ftemp(void) {
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float temp;
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float vmax = (float)(1 << resolution);
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#if defined(RA4M1) | defined(RA4W1)
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uint16_t cal125 = ((uint16_t)tsn_reg->TSCDRH << 8) + (uint16_t)tsn_reg->TSCDRL;
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uint16_t val = ra_adc_read_ch(ADC_TEMP);
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float v125 = (float)(3.3f * (float)cal125 / vmax);
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float vtemp = (float)(3.3f * (float)val / vmax);
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temp = (float)(125.0f + ((vtemp - v125) * 1000000.0f / (float)BSP_FEATURE_ADC_TSN_SLOPE));
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#endif
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#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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uint16_t cal127 = (uint16_t)tsn_cal_reg->TSCDR;
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uint16_t val = ra_adc_read_ch(ADC_TEMP);
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float v127 = (float)(3.3f * (float)cal127 / vmax);
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float vtemp = (float)(3.3f * (float)val / vmax);
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temp = (float)(127.0f + ((vtemp - v127) * 1000000.0f / (float)BSP_FEATURE_ADC_TSN_SLOPE));
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#endif
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return temp;
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}
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float ra_adc_read_fref(void) {
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uint16_t val = ra_adc_read_ch(ADC_REF);
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float vmax = (float)(1 << resolution);
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float vref = (float)(3.3f * (float)val / vmax);
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return vref;
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}
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|
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uint16_t ra_adc_all_read_ch(uint32_t ch) {
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if (ch < ADC_CH_MAX) {
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return adc_values[ch];
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} else {
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return 0;
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}
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}
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|
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void ra_adc_all(__attribute__((unused)) uint32_t resolution, uint32_t mask) {
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uint32_t i;
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uint32_t pin;
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uint32_t bit;
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uint16_t value16 = 0;
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bool badc = ((mask & 0x1fffffff) != 0);
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bool btemp = ((mask & (1 << ADC_TEMP)) != 0);
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bool bref = ((mask & (1 << ADC_REF)) != 0);
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for (i = 0; i < ADC_CH_MAX; i++) {
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adc_values[i] = 0;
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}
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if (badc) {
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bit = 1;
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adc_reg->ADANSA[0] = 0;
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adc_reg->ADANSA[1] = 0;
|
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for (i = 0; i < ADC_UNIT0_SCAN_MAX; i++) {
|
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if (mask & bit) {
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if (ra_adc_ch_to_pin((uint8_t)i, &pin)) {
|
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ra_adc_enable(pin);
|
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if (i < 16) {
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adc_reg->ADANSA[0] |= (uint16_t)(1 << i);
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} else {
|
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adc_reg->ADANSA[1] |= (uint16_t)(1 << (i - 16));
|
|
}
|
|
}
|
|
}
|
|
bit <<= 1;
|
|
}
|
|
adc_reg->ADCSR_b.ADCS = 0; /* single scan mode */
|
|
adc_reg->ADCSR_b.ADST = 1; /* start a/d conversion */
|
|
while (adc_reg->ADCSR_b.ADST) {
|
|
; /* ADC in progress*/
|
|
}
|
|
bit = 1;
|
|
for (i = 0; i < ADC_UNIT0_SCAN_MAX; i++) {
|
|
if (mask & bit) {
|
|
value16 = (uint16_t)adc_reg->ADDR[i];
|
|
adc_values[i] = value16;
|
|
}
|
|
bit <<= 1;
|
|
}
|
|
}
|
|
if (btemp) {
|
|
adc_reg->ADANSA[0] = 0;
|
|
adc_reg->ADANSA[1] = 0;
|
|
adc_reg->ADEXICR_b.TSSA = 1;
|
|
#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
|
|
tsn_ctrl_reg->TSCR_b.TSEN = 1;
|
|
while (!tsn_ctrl_reg->TSCR_b.TSEN) {
|
|
;
|
|
}
|
|
tsn_ctrl_reg->TSCR_b.TSOE = 1;
|
|
while (!tsn_ctrl_reg->TSCR_b.TSOE) {
|
|
;
|
|
}
|
|
udelay(30);
|
|
#endif
|
|
adc_reg->ADCSR_b.ADCS = 0; /* single scan mode */
|
|
adc_reg->ADCSR_b.ADST = 1; /* start a/d conversion */
|
|
while (adc_reg->ADCSR_b.ADST) {
|
|
; /* ADC in progress*/
|
|
}
|
|
value16 = (uint16_t)adc_reg->ADTSDR;
|
|
adc_values[ADC_TEMP] = value16;
|
|
#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
|
|
tsn_ctrl_reg->TSCR_b.TSOE = 0;
|
|
while (tsn_ctrl_reg->TSCR_b.TSOE) {
|
|
;
|
|
}
|
|
tsn_ctrl_reg->TSCR_b.TSEN = 0;
|
|
while (tsn_ctrl_reg->TSCR_b.TSEN) {
|
|
;
|
|
}
|
|
#endif
|
|
}
|
|
if (bref) {
|
|
adc_reg->ADANSA[0] = 0;
|
|
adc_reg->ADANSA[1] = 0;
|
|
adc_reg->ADEXICR_b.OCSA = 1;
|
|
udelay(30);
|
|
adc_reg->ADCSR_b.ADCS = 0; /* single scan mode */
|
|
adc_reg->ADCSR_b.ADST = 1; /* start a/d conversion */
|
|
while (adc_reg->ADCSR_b.ADST) {
|
|
; /* ADC in progress*/
|
|
}
|
|
value16 = (uint16_t)adc_reg->ADOCDR;
|
|
adc_values[ADC_REF] = value16;
|
|
}
|
|
}
|
|
|
|
bool ra_adc_init(void) {
|
|
ra_adc0_module_start();
|
|
#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
|
|
ra_adc1_module_start();
|
|
ra_tsn_module_start();
|
|
#endif
|
|
resolution = RA_ADC_DEF_RESOLUTION;
|
|
ra_adc_set_resolution(resolution);
|
|
return true;
|
|
}
|
|
|
|
bool ra_adc_deinit(void) {
|
|
ra_adc0_module_stop();
|
|
#if defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
|
|
ra_adc1_module_stop();
|
|
ra_tsn_module_stop();
|
|
#endif
|
|
return true;
|
|
}
|
|
|
|
__WEAK void adc_scan_end_isr(void) {
|
|
// dummy
|
|
}
|