kopia lustrzana https://github.com/micropython/micropython
818 wiersze
23 KiB
C
818 wiersze
23 KiB
C
/* Teensyduino Core Library
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* http://www.pjrc.com/teensy/
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* Copyright (c) 2013 PJRC.COM, LLC.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* 1. The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* 2. If the Software is incorporated into a build system that allows
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* selection among a list of target devices, then similar target
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* devices manufactured by PJRC.COM must be included in the list of
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* target devices and selectable in the same manner.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "core_pins.h"
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#include "pins_arduino.h"
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#include "HardwareSerial.h"
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#if 0
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// moved to pins_arduino.h
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struct digital_pin_bitband_and_config_table_struct {
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volatile uint32_t *reg;
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volatile uint32_t *config;
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};
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const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[];
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// compatibility macros
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#define digitalPinToPort(pin) (pin)
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#define digitalPinToBitMask(pin) (1)
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#define portOutputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 0))
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#define portSetRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 32))
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#define portClearRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 64))
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#define portToggleRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 96))
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#define portInputRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 128))
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#define portModeRegister(pin) ((volatile uint8_t *)(digital_pin_to_info_PGM[(pin)].reg + 160))
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#define portConfigRegister(pin) ((volatile uint32_t *)(digital_pin_to_info_PGM[(pin)].config))
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#endif
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//#define digitalPinToTimer(P) ( pgm_read_byte( digital_pin_to_timer_PGM + (P) ) )
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//#define analogInPinToBit(P) (P)
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#define GPIO_BITBAND_ADDR(reg, bit) (((uint32_t)&(reg) - 0x40000000) * 32 + (bit) * 4 + 0x42000000)
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#define GPIO_BITBAND_PTR(reg, bit) ((uint32_t *)GPIO_BITBAND_ADDR((reg), (bit)))
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//#define GPIO_SET_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 1)
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//#define GPIO_CLR_BIT(reg, bit) (*GPIO_BITBAND_PTR((reg), (bit)) = 0)
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const struct digital_pin_bitband_and_config_table_struct digital_pin_to_info_PGM[] = {
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{GPIO_BITBAND_PTR(CORE_PIN0_PORTREG, CORE_PIN0_BIT), &CORE_PIN0_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN1_PORTREG, CORE_PIN1_BIT), &CORE_PIN1_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN2_PORTREG, CORE_PIN2_BIT), &CORE_PIN2_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN3_PORTREG, CORE_PIN3_BIT), &CORE_PIN3_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN4_PORTREG, CORE_PIN4_BIT), &CORE_PIN4_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN5_PORTREG, CORE_PIN5_BIT), &CORE_PIN5_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN6_PORTREG, CORE_PIN6_BIT), &CORE_PIN6_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN7_PORTREG, CORE_PIN7_BIT), &CORE_PIN7_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN8_PORTREG, CORE_PIN8_BIT), &CORE_PIN8_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN9_PORTREG, CORE_PIN9_BIT), &CORE_PIN9_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN10_PORTREG, CORE_PIN10_BIT), &CORE_PIN10_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN11_PORTREG, CORE_PIN11_BIT), &CORE_PIN11_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN12_PORTREG, CORE_PIN12_BIT), &CORE_PIN12_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN13_PORTREG, CORE_PIN13_BIT), &CORE_PIN13_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN14_PORTREG, CORE_PIN14_BIT), &CORE_PIN14_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN15_PORTREG, CORE_PIN15_BIT), &CORE_PIN15_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN16_PORTREG, CORE_PIN16_BIT), &CORE_PIN16_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN17_PORTREG, CORE_PIN17_BIT), &CORE_PIN17_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN18_PORTREG, CORE_PIN18_BIT), &CORE_PIN18_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN19_PORTREG, CORE_PIN19_BIT), &CORE_PIN19_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN20_PORTREG, CORE_PIN20_BIT), &CORE_PIN20_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN21_PORTREG, CORE_PIN21_BIT), &CORE_PIN21_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN22_PORTREG, CORE_PIN22_BIT), &CORE_PIN22_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN23_PORTREG, CORE_PIN23_BIT), &CORE_PIN23_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN24_PORTREG, CORE_PIN24_BIT), &CORE_PIN24_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN25_PORTREG, CORE_PIN25_BIT), &CORE_PIN25_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN26_PORTREG, CORE_PIN26_BIT), &CORE_PIN26_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN27_PORTREG, CORE_PIN27_BIT), &CORE_PIN27_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN28_PORTREG, CORE_PIN28_BIT), &CORE_PIN28_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN29_PORTREG, CORE_PIN29_BIT), &CORE_PIN29_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN30_PORTREG, CORE_PIN30_BIT), &CORE_PIN30_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN31_PORTREG, CORE_PIN31_BIT), &CORE_PIN31_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN32_PORTREG, CORE_PIN32_BIT), &CORE_PIN32_CONFIG},
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{GPIO_BITBAND_PTR(CORE_PIN33_PORTREG, CORE_PIN33_BIT), &CORE_PIN33_CONFIG}
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};
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typedef void (*voidFuncPtr)(void);
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volatile static voidFuncPtr intFunc[CORE_NUM_DIGITAL];
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void init_pin_interrupts(void)
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{
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//SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO
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NVIC_ENABLE_IRQ(IRQ_PORTA);
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NVIC_ENABLE_IRQ(IRQ_PORTB);
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NVIC_ENABLE_IRQ(IRQ_PORTC);
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NVIC_ENABLE_IRQ(IRQ_PORTD);
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NVIC_ENABLE_IRQ(IRQ_PORTE);
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// TODO: maybe these should be set to a lower priority
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// so if the user puts lots of slow code on attachInterrupt
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// fast interrupts will still be serviced quickly?
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}
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void attachInterrupt(uint8_t pin, void (*function)(void), int mode)
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{
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volatile uint32_t *config;
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uint32_t cfg, mask;
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if (pin >= CORE_NUM_DIGITAL) return;
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switch (mode) {
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case CHANGE: mask = 0x0B; break;
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case RISING: mask = 0x09; break;
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case FALLING: mask = 0x0A; break;
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case LOW: mask = 0x08; break;
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case HIGH: mask = 0x0C; break;
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default: return;
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}
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mask = (mask << 16) | 0x01000000;
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config = portConfigRegister(pin);
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__disable_irq();
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cfg = *config;
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cfg &= ~0x000F0000; // disable any previous interrupt
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*config = cfg;
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intFunc[pin] = function; // set the function pointer
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cfg |= mask;
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*config = cfg; // enable the new interrupt
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__enable_irq();
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}
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void detachInterrupt(uint8_t pin)
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{
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volatile uint32_t *config;
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config = portConfigRegister(pin);
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__disable_irq();
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*config = ((*config & ~0x000F0000) | 0x01000000);
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intFunc[pin] = NULL;
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__enable_irq();
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}
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void porta_isr(void)
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{
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uint32_t isfr = PORTA_ISFR;
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PORTA_ISFR = isfr;
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if ((isfr & CORE_PIN3_BITMASK) && intFunc[3]) intFunc[3]();
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if ((isfr & CORE_PIN4_BITMASK) && intFunc[4]) intFunc[4]();
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if ((isfr & CORE_PIN24_BITMASK) && intFunc[24]) intFunc[24]();
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if ((isfr & CORE_PIN33_BITMASK) && intFunc[33]) intFunc[33]();
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}
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void portb_isr(void)
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{
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uint32_t isfr = PORTB_ISFR;
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PORTB_ISFR = isfr;
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if ((isfr & CORE_PIN0_BITMASK) && intFunc[0]) intFunc[0]();
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if ((isfr & CORE_PIN1_BITMASK) && intFunc[1]) intFunc[1]();
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if ((isfr & CORE_PIN16_BITMASK) && intFunc[16]) intFunc[16]();
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if ((isfr & CORE_PIN17_BITMASK) && intFunc[17]) intFunc[17]();
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if ((isfr & CORE_PIN18_BITMASK) && intFunc[18]) intFunc[18]();
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if ((isfr & CORE_PIN19_BITMASK) && intFunc[19]) intFunc[19]();
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if ((isfr & CORE_PIN25_BITMASK) && intFunc[25]) intFunc[25]();
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if ((isfr & CORE_PIN32_BITMASK) && intFunc[32]) intFunc[32]();
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}
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void portc_isr(void)
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{
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// TODO: these are inefficient. Use CLZ somehow....
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uint32_t isfr = PORTC_ISFR;
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PORTC_ISFR = isfr;
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if ((isfr & CORE_PIN9_BITMASK) && intFunc[9]) intFunc[9]();
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if ((isfr & CORE_PIN10_BITMASK) && intFunc[10]) intFunc[10]();
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if ((isfr & CORE_PIN11_BITMASK) && intFunc[11]) intFunc[11]();
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if ((isfr & CORE_PIN12_BITMASK) && intFunc[12]) intFunc[12]();
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if ((isfr & CORE_PIN13_BITMASK) && intFunc[13]) intFunc[13]();
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if ((isfr & CORE_PIN15_BITMASK) && intFunc[15]) intFunc[15]();
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if ((isfr & CORE_PIN22_BITMASK) && intFunc[22]) intFunc[22]();
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if ((isfr & CORE_PIN23_BITMASK) && intFunc[23]) intFunc[23]();
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if ((isfr & CORE_PIN27_BITMASK) && intFunc[27]) intFunc[27]();
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if ((isfr & CORE_PIN28_BITMASK) && intFunc[28]) intFunc[28]();
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if ((isfr & CORE_PIN29_BITMASK) && intFunc[29]) intFunc[29]();
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if ((isfr & CORE_PIN30_BITMASK) && intFunc[30]) intFunc[30]();
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}
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void portd_isr(void)
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{
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uint32_t isfr = PORTD_ISFR;
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PORTD_ISFR = isfr;
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if ((isfr & CORE_PIN2_BITMASK) && intFunc[2]) intFunc[2]();
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if ((isfr & CORE_PIN5_BITMASK) && intFunc[5]) intFunc[5]();
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if ((isfr & CORE_PIN6_BITMASK) && intFunc[6]) intFunc[6]();
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if ((isfr & CORE_PIN7_BITMASK) && intFunc[7]) intFunc[7]();
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if ((isfr & CORE_PIN8_BITMASK) && intFunc[8]) intFunc[8]();
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if ((isfr & CORE_PIN14_BITMASK) && intFunc[14]) intFunc[14]();
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if ((isfr & CORE_PIN20_BITMASK) && intFunc[20]) intFunc[20]();
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if ((isfr & CORE_PIN21_BITMASK) && intFunc[21]) intFunc[21]();
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}
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void porte_isr(void)
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{
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uint32_t isfr = PORTE_ISFR;
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PORTE_ISFR = isfr;
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if ((isfr & CORE_PIN26_BITMASK) && intFunc[26]) intFunc[26]();
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if ((isfr & CORE_PIN31_BITMASK) && intFunc[31]) intFunc[31]();
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}
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unsigned long rtc_get(void)
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{
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return RTC_TSR;
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}
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void rtc_set(unsigned long t)
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{
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RTC_SR = 0;
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RTC_TPR = 0;
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RTC_TSR = t;
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RTC_SR = RTC_SR_TCE;
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}
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// adjust is the amount of crystal error to compensate, 1 = 0.1192 ppm
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// For example, adjust = -100 is slows the clock by 11.92 ppm
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//
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void rtc_compensate(int adjust)
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{
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uint32_t comp, interval, tcr;
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// This simple approach tries to maximize the interval.
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// Perhaps minimizing TCR would be better, so the
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// compensation is distributed more evenly across
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// many seconds, rather than saving it all up and then
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// altering one second up to +/- 0.38%
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if (adjust >= 0) {
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comp = adjust;
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interval = 256;
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while (1) {
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tcr = comp * interval;
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if (tcr < 128*256) break;
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if (--interval == 1) break;
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}
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tcr = tcr >> 8;
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} else {
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comp = -adjust;
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interval = 256;
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while (1) {
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tcr = comp * interval;
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if (tcr < 129*256) break;
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if (--interval == 1) break;
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}
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tcr = tcr >> 8;
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tcr = 256 - tcr;
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}
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RTC_TCR = ((interval - 1) << 8) | tcr;
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}
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#if 0
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// TODO: build system should define this
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// so RTC is automatically initialized to approx correct time
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// at least when the program begins running right after upload
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#ifndef TIME_T
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#define TIME_T 1350160272
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#endif
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void init_rtc(void)
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{
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serial_print("init_rtc\n");
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//SIM_SCGC6 |= SIM_SCGC6_RTC;
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// enable the RTC crystal oscillator, for approx 12pf crystal
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if (!(RTC_CR & RTC_CR_OSCE)) {
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serial_print("start RTC oscillator\n");
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RTC_SR = 0;
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RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
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}
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// should wait for crystal to stabilize.....
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serial_print("SR=");
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serial_phex32(RTC_SR);
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serial_print("\n");
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serial_print("CR=");
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serial_phex32(RTC_CR);
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serial_print("\n");
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serial_print("TSR=");
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serial_phex32(RTC_TSR);
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serial_print("\n");
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serial_print("TCR=");
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serial_phex32(RTC_TCR);
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serial_print("\n");
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if (RTC_SR & RTC_SR_TIF) {
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// enable the RTC
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RTC_SR = 0;
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RTC_TPR = 0;
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RTC_TSR = TIME_T;
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RTC_SR = RTC_SR_TCE;
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}
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}
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#endif
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extern void usb_init(void);
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// create a default PWM at the same 488.28 Hz as Arduino Uno
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#if F_BUS == 60000000
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#define DEFAULT_FTM_MOD (61440 - 1)
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#define DEFAULT_FTM_PRESCALE 1
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#elif F_BUS == 56000000
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#define DEFAULT_FTM_MOD (57344 - 1)
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#define DEFAULT_FTM_PRESCALE 1
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#elif F_BUS == 48000000
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#define DEFAULT_FTM_MOD (49152 - 1)
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#define DEFAULT_FTM_PRESCALE 1
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#elif F_BUS == 40000000
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#define DEFAULT_FTM_MOD (40960 - 1)
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#define DEFAULT_FTM_PRESCALE 1
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#elif F_BUS == 36000000
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#define DEFAULT_FTM_MOD (36864 - 1)
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#define DEFAULT_FTM_PRESCALE 1
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#elif F_BUS == 24000000
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#define DEFAULT_FTM_MOD (49152 - 1)
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#define DEFAULT_FTM_PRESCALE 0
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#elif F_BUS == 16000000
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#define DEFAULT_FTM_MOD (32768 - 1)
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#define DEFAULT_FTM_PRESCALE 0
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#elif F_BUS == 8000000
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#define DEFAULT_FTM_MOD (16384 - 1)
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#define DEFAULT_FTM_PRESCALE 0
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#elif F_BUS == 4000000
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#define DEFAULT_FTM_MOD (8192 - 1)
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#define DEFAULT_FTM_PRESCALE 0
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#elif F_BUS == 2000000
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#define DEFAULT_FTM_MOD (4096 - 1)
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#define DEFAULT_FTM_PRESCALE 0
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#endif
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//void init_pins(void)
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void _init_Teensyduino_internal_(void)
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{
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init_pin_interrupts();
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//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write
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//SIM_SCGC6 |= SIM_SCGC6_FTM1;
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FTM0_CNT = 0;
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FTM0_MOD = DEFAULT_FTM_MOD;
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FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10
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FTM0_C1SC = 0x28;
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FTM0_C2SC = 0x28;
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FTM0_C3SC = 0x28;
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FTM0_C4SC = 0x28;
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FTM0_C5SC = 0x28;
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FTM0_C6SC = 0x28;
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FTM0_C7SC = 0x28;
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FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
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FTM1_CNT = 0;
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FTM1_MOD = DEFAULT_FTM_MOD;
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FTM1_C0SC = 0x28;
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FTM1_C1SC = 0x28;
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FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
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#if defined(__MK20DX256__)
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FTM2_CNT = 0;
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FTM2_MOD = DEFAULT_FTM_MOD;
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FTM2_C0SC = 0x28;
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FTM2_C1SC = 0x28;
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FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
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#endif
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analog_init();
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//delay(100); // TODO: this is not necessary, right?
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delay(4);
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usb_init();
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}
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static uint8_t analog_write_res = 8;
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// SOPT4 is SIM select clocks?
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// FTM is clocked by the bus clock, either 24 or 48 MHz
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// input capture can be FTM1_CH0, CMP0 or CMP1 or USB start of frame
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// 24 MHz with reload 49152 to match Arduino's speed = 488.28125 Hz
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void analogWrite(uint8_t pin, int val)
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|
{
|
|
uint32_t cval, max;
|
|
|
|
#if defined(__MK20DX256__)
|
|
if (pin == A14) {
|
|
uint8_t res = analog_write_res;
|
|
if (res < 12) {
|
|
val <<= 12 - res;
|
|
} else if (res > 12) {
|
|
val >>= res - 12;
|
|
}
|
|
analogWriteDAC0(val);
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
max = 1 << analog_write_res;
|
|
if (val <= 0) {
|
|
digitalWrite(pin, LOW);
|
|
pinMode(pin, OUTPUT); // TODO: implement OUTPUT_LOW
|
|
return;
|
|
} else if (val >= max) {
|
|
digitalWrite(pin, HIGH);
|
|
pinMode(pin, OUTPUT); // TODO: implement OUTPUT_HIGH
|
|
return;
|
|
}
|
|
|
|
//serial_print("analogWrite\n");
|
|
//serial_print("val = ");
|
|
//serial_phex32(val);
|
|
//serial_print("\n");
|
|
//serial_print("analog_write_res = ");
|
|
//serial_phex(analog_write_res);
|
|
//serial_print("\n");
|
|
if (pin == 3 || pin == 4) {
|
|
cval = ((uint32_t)val * (uint32_t)(FTM1_MOD + 1)) >> analog_write_res;
|
|
#if defined(__MK20DX256__)
|
|
} else if (pin == 25 || pin == 32) {
|
|
cval = ((uint32_t)val * (uint32_t)(FTM2_MOD + 1)) >> analog_write_res;
|
|
#endif
|
|
} else {
|
|
cval = ((uint32_t)val * (uint32_t)(FTM0_MOD + 1)) >> analog_write_res;
|
|
}
|
|
//serial_print("cval = ");
|
|
//serial_phex32(cval);
|
|
//serial_print("\n");
|
|
switch (pin) {
|
|
case 3: // PTA12, FTM1_CH0
|
|
FTM1_C0V = cval;
|
|
CORE_PIN3_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 4: // PTA13, FTM1_CH1
|
|
FTM1_C1V = cval;
|
|
CORE_PIN4_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 5: // PTD7, FTM0_CH7
|
|
FTM0_C7V = cval;
|
|
CORE_PIN5_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 6: // PTD4, FTM0_CH4
|
|
FTM0_C4V = cval;
|
|
CORE_PIN6_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 9: // PTC3, FTM0_CH2
|
|
FTM0_C2V = cval;
|
|
CORE_PIN9_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 10: // PTC4, FTM0_CH3
|
|
FTM0_C3V = cval;
|
|
CORE_PIN10_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 20: // PTD5, FTM0_CH5
|
|
FTM0_C5V = cval;
|
|
CORE_PIN20_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 21: // PTD6, FTM0_CH6
|
|
FTM0_C6V = cval;
|
|
CORE_PIN21_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 22: // PTC1, FTM0_CH0
|
|
FTM0_C0V = cval;
|
|
CORE_PIN22_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 23: // PTC2, FTM0_CH1
|
|
FTM0_C1V = cval;
|
|
CORE_PIN23_CONFIG = PORT_PCR_MUX(4) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
#if defined(__MK20DX256__)
|
|
case 32: // PTB18, FTM2_CH0
|
|
FTM2_C0V = cval;
|
|
CORE_PIN32_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
case 25: // PTB19, FTM1_CH1
|
|
FTM2_C1V = cval;
|
|
CORE_PIN25_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_DSE | PORT_PCR_SRE;
|
|
break;
|
|
#endif
|
|
default:
|
|
digitalWrite(pin, (val > 127) ? HIGH : LOW);
|
|
pinMode(pin, OUTPUT);
|
|
}
|
|
}
|
|
|
|
void analogWriteRes(uint32_t bits)
|
|
{
|
|
if (bits < 1) {
|
|
bits = 1;
|
|
} else if (bits > 16) {
|
|
bits = 16;
|
|
}
|
|
analog_write_res = bits;
|
|
}
|
|
|
|
void analogWriteFrequency(uint8_t pin, uint32_t frequency)
|
|
{
|
|
uint32_t minfreq, prescale, mod;
|
|
|
|
//serial_print("analogWriteFrequency: pin = ");
|
|
//serial_phex(pin);
|
|
//serial_print(", freq = ");
|
|
//serial_phex32(frequency);
|
|
//serial_print("\n");
|
|
for (prescale = 0; prescale < 7; prescale++) {
|
|
minfreq = (F_BUS >> 16) >> prescale;
|
|
if (frequency > minfreq) break;
|
|
}
|
|
//serial_print("F_BUS = ");
|
|
//serial_phex32(F_BUS >> prescale);
|
|
//serial_print("\n");
|
|
//serial_print("prescale = ");
|
|
//serial_phex(prescale);
|
|
//serial_print("\n");
|
|
//mod = ((F_BUS >> prescale) / frequency) - 1;
|
|
mod = (((F_BUS >> prescale) + (frequency >> 1)) / frequency) - 1;
|
|
if (mod > 65535) mod = 65535;
|
|
//serial_print("mod = ");
|
|
//serial_phex32(mod);
|
|
//serial_print("\n");
|
|
if (pin == 3 || pin == 4) {
|
|
FTM1_SC = 0;
|
|
FTM1_CNT = 0;
|
|
FTM1_MOD = mod;
|
|
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
|
|
} else if (pin == 5 || pin == 6 || pin == 9 || pin == 10 ||
|
|
(pin >= 20 && pin <= 23)) {
|
|
FTM0_SC = 0;
|
|
FTM0_CNT = 0;
|
|
FTM0_MOD = mod;
|
|
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(prescale);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
|
|
// TODO: startup code needs to initialize all pins to GPIO mode, input by default
|
|
|
|
void digitalWrite(uint8_t pin, uint8_t val)
|
|
{
|
|
if (pin >= CORE_NUM_DIGITAL) return;
|
|
if (*portModeRegister(pin)) {
|
|
if (val) {
|
|
*portSetRegister(pin) = 1;
|
|
} else {
|
|
*portClearRegister(pin) = 1;
|
|
}
|
|
} else {
|
|
volatile uint32_t *config = portConfigRegister(pin);
|
|
if (val) {
|
|
// TODO use bitband for atomic read-mod-write
|
|
*config |= (PORT_PCR_PE | PORT_PCR_PS);
|
|
//*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS;
|
|
} else {
|
|
// TODO use bitband for atomic read-mod-write
|
|
*config &= ~(PORT_PCR_PE);
|
|
//*config = PORT_PCR_MUX(1);
|
|
}
|
|
}
|
|
|
|
}
|
|
|
|
uint8_t digitalRead(uint8_t pin)
|
|
{
|
|
if (pin >= CORE_NUM_DIGITAL) return 0;
|
|
return *portInputRegister(pin);
|
|
}
|
|
|
|
|
|
|
|
void pinMode(uint8_t pin, uint8_t mode)
|
|
{
|
|
volatile uint32_t *config;
|
|
|
|
if (pin >= CORE_NUM_DIGITAL) return;
|
|
config = portConfigRegister(pin);
|
|
|
|
if (mode == OUTPUT) {
|
|
*portModeRegister(pin) = 1;
|
|
*config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
|
|
} else {
|
|
*portModeRegister(pin) = 0;
|
|
if (mode == INPUT) {
|
|
*config = PORT_PCR_MUX(1);
|
|
} else {
|
|
*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
void _shiftOut(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder, uint8_t value)
|
|
{
|
|
if (bitOrder == LSBFIRST) {
|
|
shiftOut_lsbFirst(dataPin, clockPin, value);
|
|
} else {
|
|
shiftOut_msbFirst(dataPin, clockPin, value);
|
|
}
|
|
}
|
|
|
|
void shiftOut_lsbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
|
|
{
|
|
uint8_t mask;
|
|
for (mask=0x01; mask; mask <<= 1) {
|
|
digitalWrite(dataPin, value & mask);
|
|
digitalWrite(clockPin, HIGH);
|
|
digitalWrite(clockPin, LOW);
|
|
}
|
|
}
|
|
|
|
void shiftOut_msbFirst(uint8_t dataPin, uint8_t clockPin, uint8_t value)
|
|
{
|
|
uint8_t mask;
|
|
for (mask=0x80; mask; mask >>= 1) {
|
|
digitalWrite(dataPin, value & mask);
|
|
digitalWrite(clockPin, HIGH);
|
|
digitalWrite(clockPin, LOW);
|
|
}
|
|
}
|
|
|
|
uint8_t _shiftIn(uint8_t dataPin, uint8_t clockPin, uint8_t bitOrder)
|
|
{
|
|
if (bitOrder == LSBFIRST) {
|
|
return shiftIn_lsbFirst(dataPin, clockPin);
|
|
} else {
|
|
return shiftIn_msbFirst(dataPin, clockPin);
|
|
}
|
|
}
|
|
|
|
uint8_t shiftIn_lsbFirst(uint8_t dataPin, uint8_t clockPin)
|
|
{
|
|
uint8_t mask, value=0;
|
|
for (mask=0x01; mask; mask <<= 1) {
|
|
digitalWrite(clockPin, HIGH);
|
|
if (digitalRead(dataPin)) value |= mask;
|
|
digitalWrite(clockPin, LOW);
|
|
}
|
|
return value;
|
|
}
|
|
|
|
uint8_t shiftIn_msbFirst(uint8_t dataPin, uint8_t clockPin)
|
|
{
|
|
uint8_t mask, value=0;
|
|
for (mask=0x80; mask; mask >>= 1) {
|
|
digitalWrite(clockPin, HIGH);
|
|
if (digitalRead(dataPin)) value |= mask;
|
|
digitalWrite(clockPin, LOW);
|
|
}
|
|
return value;
|
|
}
|
|
|
|
|
|
|
|
// the systick interrupt is supposed to increment this at 1 kHz rate
|
|
volatile uint32_t systick_millis_count = 0;
|
|
|
|
//uint32_t systick_current, systick_count, systick_istatus; // testing only
|
|
|
|
uint32_t micros(void)
|
|
{
|
|
uint32_t count, current, istatus;
|
|
|
|
__disable_irq();
|
|
current = SYST_CVR;
|
|
count = systick_millis_count;
|
|
istatus = SCB_ICSR; // bit 26 indicates if systick exception pending
|
|
__enable_irq();
|
|
//systick_current = current;
|
|
//systick_count = count;
|
|
//systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0;
|
|
if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++;
|
|
current = ((F_CPU / 1000) - 1) - current;
|
|
return count * 1000 + current / (F_CPU / 1000000);
|
|
}
|
|
|
|
void delay(uint32_t ms)
|
|
{
|
|
uint32_t start = micros();
|
|
|
|
if (ms > 0) {
|
|
while (1) {
|
|
if ((micros() - start) >= 1000) {
|
|
ms--;
|
|
if (ms == 0) return;
|
|
start += 1000;
|
|
}
|
|
yield();
|
|
}
|
|
}
|
|
}
|
|
|
|
// TODO: verify these result in correct timeouts...
|
|
#if F_CPU == 168000000
|
|
#define PULSEIN_LOOPS_PER_USEC 25
|
|
#elif F_CPU == 144000000
|
|
#define PULSEIN_LOOPS_PER_USEC 21
|
|
#elif F_CPU == 120000000
|
|
#define PULSEIN_LOOPS_PER_USEC 18
|
|
#elif F_CPU == 96000000
|
|
#define PULSEIN_LOOPS_PER_USEC 14
|
|
#elif F_CPU == 72000000
|
|
#define PULSEIN_LOOPS_PER_USEC 10
|
|
#elif F_CPU == 48000000
|
|
#define PULSEIN_LOOPS_PER_USEC 7
|
|
#elif F_CPU == 24000000
|
|
#define PULSEIN_LOOPS_PER_USEC 4
|
|
#elif F_CPU == 16000000
|
|
#define PULSEIN_LOOPS_PER_USEC 1
|
|
#elif F_CPU == 8000000
|
|
#define PULSEIN_LOOPS_PER_USEC 1
|
|
#elif F_CPU == 4000000
|
|
#define PULSEIN_LOOPS_PER_USEC 1
|
|
#elif F_CPU == 2000000
|
|
#define PULSEIN_LOOPS_PER_USEC 1
|
|
#endif
|
|
|
|
|
|
uint32_t pulseIn_high(volatile uint8_t *reg, uint32_t timeout)
|
|
{
|
|
uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
|
|
uint32_t usec_start, usec_stop;
|
|
|
|
// wait for any previous pulse to end
|
|
while (*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
// wait for the pulse to start
|
|
while (!*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
usec_start = micros();
|
|
// wait for the pulse to stop
|
|
while (*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
usec_stop = micros();
|
|
return usec_stop - usec_start;
|
|
}
|
|
|
|
uint32_t pulseIn_low(volatile uint8_t *reg, uint32_t timeout)
|
|
{
|
|
uint32_t timeout_count = timeout * PULSEIN_LOOPS_PER_USEC;
|
|
uint32_t usec_start, usec_stop;
|
|
|
|
// wait for any previous pulse to end
|
|
while (!*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
// wait for the pulse to start
|
|
while (*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
usec_start = micros();
|
|
// wait for the pulse to stop
|
|
while (!*reg) {
|
|
if (--timeout_count == 0) return 0;
|
|
}
|
|
usec_stop = micros();
|
|
return usec_stop - usec_start;
|
|
}
|
|
|
|
// TODO: an inline version should handle the common case where state is const
|
|
uint32_t pulseIn(uint8_t pin, uint8_t state, uint32_t timeout)
|
|
{
|
|
if (pin >= CORE_NUM_DIGITAL) return 0;
|
|
if (state) return pulseIn_high(portInputRegister(pin), timeout);
|
|
return pulseIn_low(portInputRegister(pin), timeout);;
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|