kopia lustrzana https://github.com/micropython/micropython
186 wiersze
6.0 KiB
C
186 wiersze
6.0 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2022 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <string.h>
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#include "py/mpconfig.h"
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#include "sam.h"
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#include "tc_manager.h"
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#if MICROPY_HW_TC_MANAGER
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// List of channel flags: true: channel used, false: channel available
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// Two Tc instances are used by the usec counter and cannot be assigned.
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#if defined(MCU_SAMD21)
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static bool instance_flag[TC_INST_NUM] = {false, true, true};
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#elif defined(MCU_SAMD51)
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static bool instance_flag[TC_INST_NUM] = {true, true};
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#endif
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Tc *tc_instance_list[TC_INST_NUM] = TC_INSTS;
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extern const uint16_t prescaler_table[];
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// allocate_tc_instance(): retrieve an available instance. Return the pointer or NULL
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int allocate_tc_instance(void) {
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for (int i = 0; i < MP_ARRAY_SIZE(instance_flag); i++) {
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if (instance_flag[i] == false) { // available
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instance_flag[i] = true;
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return i;
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}
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}
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mp_raise_ValueError(MP_ERROR_TEXT("no Timer available"));
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}
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// free_tc_instance(n): Declare instance as free
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void free_tc_instance(int tc_index) {
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if (tc_index >= 0 && tc_index < MP_ARRAY_SIZE(instance_flag)) {
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instance_flag[tc_index] = false;
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}
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}
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int configure_tc(int tc_index, int freq, int event) {
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uint32_t clock = DFLL48M_FREQ; // Use the fixed 48M clock
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Tc *tc;
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if (tc_index < MP_ARRAY_SIZE(instance_flag)) {
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tc = tc_instance_list[tc_index];
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} else {
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return -1;
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}
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// Check for the right prescaler
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uint8_t index;
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uint32_t period;
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for (index = 0; index < 8; index++) {
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period = clock / prescaler_table[index] / freq;
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if (period < (1 << 16)) {
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break;
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}
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}
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#if defined(MCU_SAMD21)
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// Set up the clocks
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if (tc == TC3) {
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PM->APBCMASK.bit.TC3_ = 1; // Enable TC3 clock
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK5 | GCLK_CLKCTRL_ID_TCC2_TC3;
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#if TC_INST_NUM > 3
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} else {
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if (tc == TC6) {
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PM->APBCMASK.bit.TC6_ = 1; // Enable TC6 clock
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} else if (tc == TC7) {
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PM->APBCMASK.bit.TC7_ = 1; // Enable TC7 clock
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}
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// Select multiplexer generic clock source and enable.
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK5 | GCLK_CLKCTRL_ID_TC6_TC7;
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#endif // TC_INST_NUM > 3
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}
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// Wait while it updates synchronously.
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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// Configure the timer.
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tc->COUNT16.CTRLA.reg = TC_CTRLA_SWRST;
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while (tc->COUNT16.CTRLA.bit.SWRST || tc->COUNT16.STATUS.bit.SYNCBUSY) {
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}
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tc->COUNT16.CTRLA.reg = TC_CTRLA_PRESCALER(index) |
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TC_CTRLA_MODE_COUNT16 | TC_CTRLA_RUNSTDBY |
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TC_CTRLA_WAVEGEN_MFRQ;
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tc->COUNT16.CC[0].reg = period;
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if (event) {
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tc->COUNT16.EVCTRL.reg = event;
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}
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tc->COUNT16.CTRLA.bit.ENABLE = 1;
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while (tc->COUNT16.STATUS.bit.SYNCBUSY) {
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}
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#elif defined(MCU_SAMD51)
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int gclk_id = TC2_GCLK_ID;
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// Enable MCLK
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switch (tc_index) {
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case 2:
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MCLK->APBBMASK.bit.TC2_ = 1; // Enable TC2 clock
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gclk_id = TC2_GCLK_ID;
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break;
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case 3:
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MCLK->APBBMASK.bit.TC3_ = 1; // Enable TC3 clock
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gclk_id = TC3_GCLK_ID;
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break;
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#if TC_INST_NUM > 4
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case 4:
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MCLK->APBCMASK.bit.TC4_ = 1; // Enable TC4 clock
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gclk_id = TC4_GCLK_ID;
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break;
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case 5:
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MCLK->APBCMASK.bit.TC5_ = 1; // Enable TC5 clock
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gclk_id = TC5_GCLK_ID;
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break;
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#if TC_INST_NUM > 6
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case 6:
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MCLK->APBDMASK.bit.TC6_ = 1; // Enable TC6 clock
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gclk_id = TC6_GCLK_ID;
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break;
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case 7:
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MCLK->APBDMASK.bit.TC7_ = 1; // Enable TC7 clock
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gclk_id = TC7_GCLK_ID;
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break;
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#endif // TC_INST_NUM > 6
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#endif // TC_INST_NUM > 4
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}
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// Enable the 48Mhz clock.
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GCLK->PCHCTRL[gclk_id].reg = GCLK_PCHCTRL_GEN_GCLK5 | GCLK_PCHCTRL_CHEN;
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while (GCLK->PCHCTRL[gclk_id].bit.CHEN == 0) {
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}
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// Configure the timer.
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tc->COUNT16.CTRLA.reg = TC_CTRLA_SWRST;
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while (tc->COUNT16.SYNCBUSY.bit.SWRST) {
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}
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tc->COUNT16.CTRLA.reg = TC_CTRLA_PRESCALER(index) |
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TC_CTRLA_MODE_COUNT16 | TC_CTRLA_RUNSTDBY | TC_CTRLA_PRESCSYNC_PRESC;
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tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MFRQ;
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tc->COUNT16.CC[0].reg = period;
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tc->COUNT16.CTRLA.bit.ENABLE = 1;
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while (tc->COUNT16.SYNCBUSY.bit.ENABLE) {
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}
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#endif // SAMD21 or SAMD51
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return 0;
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}
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void tc_deinit(void) {
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memset((uint8_t *)instance_flag, 0, sizeof(instance_flag));
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// The tc instances used by the us counter have to be locked.
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// That's TC4 and TC5 for SAMD21 with the list starting at TC3
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// and TC0 and TC1 for SAMD51, with the list starting at TC0
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#if defined(MCU_SAMD21)
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instance_flag[1] = instance_flag[2] = true;
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#elif defined(MCU_SAMD51)
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instance_flag[0] = instance_flag[1] = true;
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#endif
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}
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#endif
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