kopia lustrzana https://github.com/micropython/micropython
72 wiersze
5.3 KiB
C
72 wiersze
5.3 KiB
C
/* generated vector source file - do not edit */
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#include "bsp_api.h"
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/* Do not build these data structures if no interrupts are currently allocated because IAR will have build errors. */
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#if VECTOR_DATA_IRQ_COUNT > 0
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BSP_DONT_REMOVE const fsp_vector_t g_vector_table[BSP_ICU_VECTOR_MAX_ENTRIES] BSP_PLACE_IN_SECTION(BSP_SECTION_APPLICATION_VECTORS) =
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{
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[0] = sci_uart_rxi_isr, /* SCI9 RXI (Received data full) */
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[1] = sci_uart_txi_isr, /* SCI9 TXI (Transmit data empty) */
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[2] = sci_uart_tei_isr, /* SCI9 TEI (Transmit end) */
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[3] = sci_uart_eri_isr, /* SCI9 ERI (Receive error) */
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[4] = rtc_alarm_periodic_isr, /* RTC ALARM (Alarm interrupt) */
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[5] = rtc_alarm_periodic_isr, /* RTC PERIOD (Periodic interrupt) */
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[6] = rtc_carry_isr, /* RTC CARRY (Carry interrupt) */
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[7] = r_icu_isr, /* ICU IRQ0 (External pin interrupt 0) */
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[8] = usbfs_interrupt_handler, /* USBFS INT (USBFS interrupt) */
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[9] = usbfs_resume_handler, /* USBFS RESUME (USBFS resume interrupt) */
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[10] = usbfs_d0fifo_handler, /* USBFS FIFO 0 (DMA transfer request 0) */
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[11] = usbfs_d1fifo_handler, /* USBFS FIFO 1 (DMA transfer request 1) */
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[12] = usbhs_interrupt_handler, /* USBHS USB INT RESUME (USBHS interrupt) */
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[13] = usbhs_d0fifo_handler, /* USBHS FIFO 0 (DMA transfer request 0) */
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[14] = usbhs_d1fifo_handler, /* USBHS FIFO 1 (DMA transfer request 1) */
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[15] = iic_master_rxi_isr, /* IIC0 RXI (Receive data full) */
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[16] = iic_master_txi_isr, /* IIC0 TXI (Transmit data empty) */
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[17] = iic_master_tei_isr, /* IIC0 TEI (Transmit end) */
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[18] = iic_master_eri_isr, /* IIC0 ERI (Transfer error) */
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[19] = agt_int_isr, /* AGT0 INT (AGT interrupt) */
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[20] = agt_int_isr, /* AGT1 INT (AGT interrupt) */
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[21] = sci_uart_rxi_isr, /* SCI8 RXI (Received data full) */
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[22] = sci_uart_txi_isr, /* SCI8 TXI (Transmit data empty) */
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[23] = sci_uart_tei_isr, /* SCI8 TEI (Transmit end) */
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[24] = sci_uart_eri_isr, /* SCI8 ERI (Receive error) */
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[25] = spi_rxi_isr, /* SPI1 RXI (Receive buffer full) */
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[26] = spi_txi_isr, /* SPI1 TXI (Transmit buffer empty) */
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[27] = spi_tei_isr, /* SPI1 TEI (Transmission complete event) */
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[28] = spi_eri_isr, /* SPI1 ERI (Error) */
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[29] = r_icu_isr, /* ICU IRQ2 (External pin interrupt 2) */
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};
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const bsp_interrupt_event_t g_interrupt_event_link_select[BSP_ICU_VECTOR_MAX_ENTRIES] =
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{
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[0] = BSP_PRV_IELS_ENUM(EVENT_SCI9_RXI), /* SCI9 RXI (Received data full) */
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[1] = BSP_PRV_IELS_ENUM(EVENT_SCI9_TXI), /* SCI9 TXI (Transmit data empty) */
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[2] = BSP_PRV_IELS_ENUM(EVENT_SCI9_TEI), /* SCI9 TEI (Transmit end) */
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[3] = BSP_PRV_IELS_ENUM(EVENT_SCI9_ERI), /* SCI9 ERI (Receive error) */
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[4] = BSP_PRV_IELS_ENUM(EVENT_RTC_ALARM), /* RTC ALARM (Alarm interrupt) */
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[5] = BSP_PRV_IELS_ENUM(EVENT_RTC_PERIOD), /* RTC PERIOD (Periodic interrupt) */
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[6] = BSP_PRV_IELS_ENUM(EVENT_RTC_CARRY), /* RTC CARRY (Carry interrupt) */
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[7] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ0), /* ICU IRQ0 (External pin interrupt 0) */
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[8] = BSP_PRV_IELS_ENUM(EVENT_USBFS_INT), /* USBFS INT (USBFS interrupt) */
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[9] = BSP_PRV_IELS_ENUM(EVENT_USBFS_RESUME), /* USBFS RESUME (USBFS resume interrupt) */
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[10] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_0), /* USBFS FIFO 0 (DMA transfer request 0) */
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[11] = BSP_PRV_IELS_ENUM(EVENT_USBFS_FIFO_1), /* USBFS FIFO 1 (DMA transfer request 1) */
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[12] = BSP_PRV_IELS_ENUM(EVENT_USBHS_USB_INT_RESUME), /* USBHS USB INT RESUME (USBHS interrupt) */
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[13] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_0), /* USBHS FIFO 0 (DMA transfer request 0) */
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[14] = BSP_PRV_IELS_ENUM(EVENT_USBHS_FIFO_1), /* USBHS FIFO 1 (DMA transfer request 1) */
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[15] = BSP_PRV_IELS_ENUM(EVENT_IIC0_RXI), /* IIC0 RXI (Receive data full) */
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[16] = BSP_PRV_IELS_ENUM(EVENT_IIC0_TXI), /* IIC0 TXI (Transmit data empty) */
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[17] = BSP_PRV_IELS_ENUM(EVENT_IIC0_TEI), /* IIC0 TEI (Transmit end) */
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[18] = BSP_PRV_IELS_ENUM(EVENT_IIC0_ERI), /* IIC0 ERI (Transfer error) */
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[19] = BSP_PRV_IELS_ENUM(EVENT_AGT0_INT), /* AGT0 INT (AGT interrupt) */
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[20] = BSP_PRV_IELS_ENUM(EVENT_AGT1_INT), /* AGT1 INT (AGT interrupt) */
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[21] = BSP_PRV_IELS_ENUM(EVENT_SCI8_RXI), /* SCI8 RXI (Received data full) */
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[22] = BSP_PRV_IELS_ENUM(EVENT_SCI8_TXI), /* SCI8 TXI (Transmit data empty) */
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[23] = BSP_PRV_IELS_ENUM(EVENT_SCI8_TEI), /* SCI8 TEI (Transmit end) */
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[24] = BSP_PRV_IELS_ENUM(EVENT_SCI8_ERI), /* SCI8 ERI (Receive error) */
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[25] = BSP_PRV_IELS_ENUM(EVENT_SPI1_RXI), /* SPI1 RXI (Receive buffer full) */
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[26] = BSP_PRV_IELS_ENUM(EVENT_SPI1_TXI), /* SPI1 TXI (Transmit buffer empty) */
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[27] = BSP_PRV_IELS_ENUM(EVENT_SPI1_TEI), /* SPI1 TEI (Transmission complete event) */
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[28] = BSP_PRV_IELS_ENUM(EVENT_SPI1_ERI), /* SPI1 ERI (Error) */
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[29] = BSP_PRV_IELS_ENUM(EVENT_ICU_IRQ2), /* ICU IRQ2 (External pin interrupt 2) */
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};
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#endif
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