micropython/ports/renesas-ra/fsp_cfg/r_dac_cfg.h

14 wiersze
263 B
C

/* generated configuration header file - do not edit */
#ifndef R_DAC_CFG_H_
#define R_DAC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define DAC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_DAC_CFG_H_ */