kopia lustrzana https://github.com/micropython/micropython
121 wiersze
3.3 KiB
C
121 wiersze
3.3 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019, Michael Neuling, IBM Corporation.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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/*
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* This is the LPC serial UART used by POWER9 boxes. This is modelled
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* in the qemu POWER9 machine.
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*/
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#include <unistd.h>
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#include <stdbool.h>
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#include "py/mpconfig.h"
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#define PROC_FREQ 50000000
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#define UART_FREQ 115200
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#define UART_BASE 0xc0002000
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#define LPC_UART_BASE 0x60300d00103f8
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/* Taken from skiboot */
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#define REG_RBR 0
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#define REG_THR 0
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#define REG_DLL 0
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#define REG_IER 1
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#define REG_DLM 1
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#define REG_FCR 2
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#define REG_IIR 2
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#define REG_LCR 3
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#define REG_MCR 4
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#define REG_LSR 5
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#define REG_MSR 6
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#define REG_SCR 7
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#define LSR_DR 0x01 /* Data ready */
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#define LSR_OE 0x02 /* Overrun */
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#define LSR_PE 0x04 /* Parity error */
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#define LSR_FE 0x08 /* Framing error */
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#define LSR_BI 0x10 /* Break */
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#define LSR_THRE 0x20 /* Xmit holding register empty */
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#define LSR_TEMT 0x40 /* Xmitter empty */
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#define LSR_ERR 0x80 /* Error */
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#define LCR_DLAB 0x80 /* DLL access */
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#define IER_RX 0x01
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#define IER_THRE 0x02
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#define IER_ALL 0x0f
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static uint64_t lpc_uart_base;
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static void lpc_uart_reg_write(uint64_t offset, uint8_t val) {
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uint64_t addr;
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addr = lpc_uart_base + offset;
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*(volatile uint8_t *)addr = val;
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}
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static uint8_t lpc_uart_reg_read(uint64_t offset) {
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uint64_t addr;
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uint8_t val;
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addr = lpc_uart_base + offset;
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val = *(volatile uint8_t *)addr;
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return val;
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}
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static int lpc_uart_tx_full(void) {
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return !(lpc_uart_reg_read(REG_LSR) & LSR_THRE);
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}
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static int lpc_uart_rx_empty(void) {
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return !(lpc_uart_reg_read(REG_LSR) & LSR_DR);
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}
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void uart_init_ppc(void) {
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lpc_uart_base = LPC_UART_BASE;
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}
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int mp_hal_stdin_rx_chr(void) {
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while (lpc_uart_rx_empty()) {
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;
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}
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return lpc_uart_reg_read(REG_THR);
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}
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mp_uint_t mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
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int i;
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for (i = 0; i < len; i++) {
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while (lpc_uart_tx_full()) {
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;
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}
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lpc_uart_reg_write(REG_RBR, str[i]);
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}
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return len;
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}
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