kopia lustrzana https://github.com/micropython/micropython
22 wiersze
1021 B
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22 wiersze
1021 B
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Store register to memory
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Document conventions
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--------------------
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Notation: ``Rt, Rn`` denote ARM registers R0-R7 except where stated. ``immN`` represents an immediate
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value having a width of N bits hence ``imm5`` is constrained to the range 0-31. ``[Rn + imm5]`` is the
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contents of the memory address obtained by adding Rn and the offset ``imm5``. Offsets are measured in
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bytes. These instructions do not affect the condition flags.
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Register Store
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--------------
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* str(Rt, [Rn, imm7]) ``[Rn + imm7] = Rt`` Store a 32 bit word
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* strb(Rt, [Rn, imm5]) ``[Rn + imm5] = Rt`` Store a byte (b0-b7)
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* strh(Rt, [Rn, imm6]) ``[Rn + imm6] = Rt`` Store a 16 bit half word (b0-b15)
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The specified immediate offsets are measured in bytes. Hence in the case of ``str`` the 7 bit value
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enables 32 bit word aligned values to be accessed with a maximum offset of 31 words. In the case of ``strh`` the
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6 bit value enables 16 bit half-word aligned values to be accessed with a maximum offset of 31 half-words.
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