stm32/boards/LEGO_HUB_NO6: Add support for mboot to access SPI flash.

The following changes are made:
- Use software SPI for external SPI flash access when building mboot.
- Enable the mboot filesystem-loading feature, with FAT FS support.
- Increase the frequency of the CPU when in mboot to 96MHz, to increase the
  speed of SPI flash accesses and programming.

Signed-off-by: Damien George <damien@micropython.org>
pull/8714/head
Damien George 2022-06-02 13:29:30 +10:00
rodzic 36211baf0e
commit fae9205594
2 zmienionych plików z 48 dodań i 1 usunięć

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@ -3,7 +3,7 @@
*
* The MIT License (MIT)
*
* Copyright (c) 2021 Damien P. George
* Copyright (c) 2021-2022 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@ -28,6 +28,30 @@
#include "storage.h"
#include "spi.h"
#if BUILDING_MBOOT
// Mboot doesn't support hardware SPI, so use software SPI instead.
STATIC const mp_soft_spi_obj_t soft_spi_bus = {
.delay_half = MICROPY_HW_SOFTSPI_MIN_DELAY,
.polarity = 0,
.phase = 0,
.sck = MICROPY_HW_SPIFLASH_SCK,
.mosi = MICROPY_HW_SPIFLASH_MOSI,
.miso = MICROPY_HW_SPIFLASH_MISO,
};
const mp_spiflash_config_t board_mboot_spiflash_config = {
.bus_kind = MP_SPIFLASH_BUS_SPI,
.bus.u_spi.cs = MICROPY_HW_SPIFLASH_CS,
.bus.u_spi.data = (void *)&soft_spi_bus,
.bus.u_spi.proto = &mp_soft_spi_proto,
};
mp_spiflash_t board_mboot_spiflash;
#else
STATIC const spi_proto_cfg_t spi_bus = {
.spi = &spi_obj[1], // SPI2 hardware peripheral
.baudrate = 25000000,
@ -48,3 +72,5 @@ const mp_spiflash_config_t spiflash_config = {
};
spi_bdev_t spi_bdev;
#endif

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@ -123,8 +123,27 @@
/******************************************************************************/
// Bootloader configuration
// Configure CPU frequency to 96MHz, to make updates from SPI flash faster
#define MBOOT_CLK_PLLM (MICROPY_HW_CLK_VALUE / 1000000)
#define MBOOT_CLK_PLLN (192)
#define MBOOT_CLK_PLLP (RCC_PLLP_DIV2)
#define MBOOT_CLK_PLLQ (4)
#define MBOOT_CLK_AHB_DIV (RCC_SYSCLK_DIV1)
#define MBOOT_CLK_APB1_DIV (RCC_HCLK_DIV4)
#define MBOOT_CLK_APB2_DIV (RCC_HCLK_DIV2)
#define MBOOT_FLASH_LATENCY FLASH_LATENCY_3
#define MBOOT_FSLOAD (1)
#define MBOOT_VFS_FAT (1)
#define MBOOT_LEAVE_BOOTLOADER_VIA_RESET (0)
#define MBOOT_SPIFLASH_ADDR (0x80000000)
#define MBOOT_SPIFLASH_BYTE_SIZE (32 * 1024 * 1024)
#define MBOOT_SPIFLASH_LAYOUT "/0x80000000/8192*4Kg"
#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (1)
#define MBOOT_SPIFLASH_SPIFLASH (&board_mboot_spiflash)
#define MBOOT_SPIFLASH_CONFIG (&board_mboot_spiflash_config)
#define MBOOT_LED1 0
#define MBOOT_BOARD_LED_INIT board_mboot_led_init
#define MBOOT_BOARD_LED_STATE board_mboot_led_state
@ -138,6 +157,8 @@
extern const struct _mp_spiflash_config_t spiflash_config;
extern struct _spi_bdev_t spi_bdev;
extern const struct _mp_spiflash_config_t board_mboot_spiflash_config;
extern struct _mp_spiflash_t board_mboot_spiflash;
void board_init(void);
void board_mboot_cleanup(int reset_mode);