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py/nlrthumb: Check __thumb2__ instead of __ARM_ARCH_6M__. 

This fixes compiling for older architectures (e.g. armv5tej).

According to [1], the limit of R0-R7 for the STR and LDR instructions is
tied to the Thumb instruction set and not any specific processor
architectures.

[1]: http://www.keil.com/support/man/docs/armasm/armasm_dom1361289906890.htm
pull/4892/head
David Lechner 2019-06-27 16:43:05 -05:00 zatwierdzone przez Damien George
rodzic 62b00dd5d8
commit f3a5b313e5
1 zmienionych plików z 3 dodań i 3 usunięć
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py/nlrthumb.c
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@ -44,7 +44,7 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
"str r6, [r0, #20] \n" // store r6 into nlr_buf
"str r7, [r0, #24] \n" // store r7 into nlr_buf
#if defined(__ARM_ARCH_6M__)
#if !defined(__thumb2__)
"mov r1, r8 \n"
"str r1, [r0, #28] \n" // store r8 into nlr_buf
"mov r1, r9 \n"
@ -71,7 +71,7 @@ __attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
"str lr, [r0, #8] \n" // store lr into nlr_buf
#endif
#if defined(__ARM_ARCH_6M__)
#if !defined(__thumb2__)
"ldr r1, nlr_push_tail_var \n"
"bx r1 \n" // do the rest in C
".align 2 \n"
@ -102,7 +102,7 @@ NORETURN void nlr_jump(void *val) {
"ldr r6, [r0, #20] \n" // load r6 from nlr_buf
"ldr r7, [r0, #24] \n" // load r7 from nlr_buf
#if defined(__ARM_ARCH_6M__)
#if !defined(__thumb2__)
"ldr r1, [r0, #28] \n" // load r8 from nlr_buf
"mov r8, r1 \n"
"ldr r1, [r0, #32] \n" // load r9 from nlr_buf