kopia lustrzana https://github.com/micropython/micropython
rp2/machine_uart: Use read/write mutex to prevent char duplication.
Duplication of characters is caused by re-entrant calls from separate cores of uart_fill_tx_fifo(). This patch uses a mutex to ensure that a re-entrant execution of the function returns without affecting the UART FIFO. Fixes issues #8344 and #8360.pull/8499/head
Peter Hinch
Damien George
rodzic
9d7c168bf5
commit
d242a9b7f7
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@ -34,6 +34,7 @@
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#include "hardware/irq.h"
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#include "hardware/uart.h"
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#include "hardware/regs/uart.h"
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#include "pico/mutex.h"
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#define DEFAULT_UART_BAUDRATE (115200)
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#define DEFAULT_UART_BITS (8)
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@ -72,6 +73,16 @@
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#define UART_HWCONTROL_CTS (1)
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#define UART_HWCONTROL_RTS (2)
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STATIC mutex_t write_mutex_0;
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STATIC mutex_t write_mutex_1;
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STATIC mutex_t read_mutex_0;
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STATIC mutex_t read_mutex_1;
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auto_init_mutex(write_mutex_0);
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auto_init_mutex(write_mutex_1);
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auto_init_mutex(read_mutex_0);
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auto_init_mutex(read_mutex_1);
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typedef struct _machine_uart_obj_t {
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mp_obj_base_t base;
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uart_inst_t *const uart;
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@ -89,18 +100,18 @@ typedef struct _machine_uart_obj_t {
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uint8_t invert;
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uint8_t flow;
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ringbuf_t read_buffer;
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bool read_lock;
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mutex_t *read_mutex;
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ringbuf_t write_buffer;
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bool write_lock;
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mutex_t *write_mutex;
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} machine_uart_obj_t;
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STATIC machine_uart_obj_t machine_uart_obj[] = {
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{{&machine_uart_type}, uart0, 0, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
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MICROPY_HW_UART0_TX, MICROPY_HW_UART0_RX, MICROPY_HW_UART0_CTS, MICROPY_HW_UART0_RTS,
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0, 0, 0, 0, {NULL, 1, 0, 0}, 0, {NULL, 1, 0, 0}, 0},
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0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_0, {NULL, 1, 0, 0}, &write_mutex_0},
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{{&machine_uart_type}, uart1, 1, 0, DEFAULT_UART_BITS, UART_PARITY_NONE, DEFAULT_UART_STOP,
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MICROPY_HW_UART1_TX, MICROPY_HW_UART1_RX, MICROPY_HW_UART1_CTS, MICROPY_HW_UART1_RTS,
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0, 0, 0, 0, {NULL, 1, 0, 0}, 0, {NULL, 1, 0, 0}, 0},
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0, 0, 0, 0, {NULL, 1, 0, 0}, &read_mutex_1, {NULL, 1, 0, 0}, &write_mutex_1},
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};
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STATIC const char *_parity_name[] = {"None", "0", "1"};
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@ -109,19 +120,42 @@ STATIC const char *_invert_name[] = {"None", "INV_TX", "INV_RX", "INV_TX|INV_RX"
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/******************************************************************************/
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// IRQ and buffer handling
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static inline bool write_mutex_try_lock(machine_uart_obj_t *u) {
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return mutex_enter_timeout_ms(u->write_mutex, 0);
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}
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static inline void write_mutex_unlock(machine_uart_obj_t *u) {
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mutex_exit(u->write_mutex);
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}
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static inline bool read_mutex_try_lock(machine_uart_obj_t *u) {
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return mutex_enter_timeout_ms(u->read_mutex, 0);
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}
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static inline void read_mutex_unlock(machine_uart_obj_t *u) {
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mutex_exit(u->read_mutex);
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}
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// take all bytes from the fifo and store them in the buffer
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STATIC void uart_drain_rx_fifo(machine_uart_obj_t *self) {
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while (uart_is_readable(self->uart) && ringbuf_free(&self->read_buffer) > 0) {
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// get a byte from uart and put into the buffer
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ringbuf_put(&(self->read_buffer), uart_get_hw(self->uart)->dr);
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if (read_mutex_try_lock(self)) {
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while (uart_is_readable(self->uart) && ringbuf_free(&self->read_buffer) > 0) {
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// get a byte from uart and put into the buffer
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ringbuf_put(&(self->read_buffer), uart_get_hw(self->uart)->dr);
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}
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read_mutex_unlock(self);
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}
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}
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// take bytes from the buffer and put them into the UART FIFO
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// Re-entrancy: quit if an instance already running
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STATIC void uart_fill_tx_fifo(machine_uart_obj_t *self) {
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while (uart_is_writable(self->uart) && ringbuf_avail(&self->write_buffer) > 0) {
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// get a byte from the buffer and put it into the uart
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uart_get_hw(self->uart)->dr = ringbuf_get(&(self->write_buffer));
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if (write_mutex_try_lock(self)) {
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while (uart_is_writable(self->uart) && ringbuf_avail(&self->write_buffer) > 0) {
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// get a byte from the buffer and put it into the uart
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uart_get_hw(self->uart)->dr = ringbuf_get(&(self->write_buffer));
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}
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write_mutex_unlock(self);
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}
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}
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@ -129,16 +163,12 @@ STATIC inline void uart_service_interrupt(machine_uart_obj_t *self) {
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if (uart_get_hw(self->uart)->mis & (UART_UARTMIS_RXMIS_BITS | UART_UARTMIS_RTMIS_BITS)) { // rx interrupt?
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// clear all interrupt bits but tx
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uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & (~UART_UARTICR_TXIC_BITS);
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if (!self->read_lock) {
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uart_drain_rx_fifo(self);
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}
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uart_drain_rx_fifo(self);
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}
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if (uart_get_hw(self->uart)->mis & UART_UARTMIS_TXMIS_BITS) { // tx interrupt?
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// clear all interrupt bits but rx
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uart_get_hw(self->uart)->icr = UART_UARTICR_BITS & (~UART_UARTICR_RXIC_BITS);
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if (!self->write_lock) {
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uart_fill_tx_fifo(self);
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}
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uart_fill_tx_fifo(self);
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}
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}
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@ -270,8 +300,6 @@ STATIC void machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, co
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self->flow = args[ARG_flow].u_int;
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}
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self->read_lock = false;
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// Set the RX buffer size if configured.
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size_t rxbuf_len = DEFAULT_BUFFER_SIZE;
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if (args[ARG_rxbuf].u_int > 0) {
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@ -393,9 +421,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_deinit_obj, machine_uart_deinit);
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STATIC mp_obj_t machine_uart_any(mp_obj_t self_in) {
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machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in);
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// get all bytes from the fifo first
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self->read_lock = true;
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uart_drain_rx_fifo(self);
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self->read_lock = false;
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return MP_OBJ_NEW_SMALL_INT(ringbuf_avail(&self->read_buffer));
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_any_obj, machine_uart_any);
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@ -441,9 +467,7 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz
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while (ringbuf_avail(&self->read_buffer) == 0) {
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if (uart_is_readable(self->uart)) {
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// Force a few incoming bytes to the buffer
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self->read_lock = true;
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uart_drain_rx_fifo(self);
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self->read_lock = false;
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break;
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}
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if (time_us_64() > t) { // timed out
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@ -476,9 +500,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
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}
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// Kickstart the UART transmit.
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self->write_lock = true;
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uart_fill_tx_fifo(self);
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self->write_lock = false;
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// Send the next characters while busy waiting.
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while (i < size) {
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@ -497,9 +519,7 @@ STATIC mp_uint_t machine_uart_write(mp_obj_t self_in, const void *buf_in, mp_uin
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ringbuf_put(&(self->write_buffer), *src++);
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++i;
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t = time_us_64() + timeout_char_us;
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self->write_lock = true;
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uart_fill_tx_fifo(self);
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self->write_lock = false;
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}
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// Just in case the fifo was drained during refill of the ringbuf.
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