From c859978da31bde0a43848490a4da339cdea22c2f Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Mon, 20 Nov 2023 10:03:22 +0100 Subject: [PATCH] stm32/boards/ARDUINO_GIGA: Enable OpenAMP. Signed-off-by: iabdalkader --- ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk | 2 ++ ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld | 12 ++++++++---- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk index b927388c55..46fe40c2a6 100644 --- a/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk +++ b/ports/stm32/boards/ARDUINO_GIGA/mpconfigboard.mk @@ -23,6 +23,8 @@ MICROPY_PY_LWIP = 1 MICROPY_PY_NETWORK_CYW43 = 1 MICROPY_PY_SSL = 1 MICROPY_SSL_MBEDTLS = 1 +MICROPY_PY_OPENAMP = 1 +MICROPY_PY_OPENAMP_REMOTEPROC = 1 FROZEN_MANIFEST = $(BOARD_DIR)/manifest.py MBEDTLS_CONFIG_FILE = '"$(BOARD_DIR)/mbedtls_config_board.h"' diff --git a/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld b/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld index d5bd9598f9..793a76b970 100644 --- a/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld +++ b/ports/stm32/boards/ARDUINO_GIGA/stm32h747.ld @@ -14,10 +14,10 @@ MEMORY SRAM4 (xrw) : ORIGIN = 0x38000000, LENGTH = 64K /* SRAM4 D3 */ FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* Total available flash */ FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 16384K /* 16MBs external QSPI flash */ - FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* sector 1 -> Flash storage */ - FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1792K /* Sector 0 -> Arduino Bootloader - Sector 1 -> Reserved for CM4/FS - Sectors 2 -> 15 firmware */ + FLASH_BL (rx) : ORIGIN = 0x08000000, LENGTH = 128K /* Arduino bootloader */ + FLASH_FS (r) : ORIGIN = 0x08020000, LENGTH = 128K /* filesystem */ + FLASH_TEXT (rx) : ORIGIN = 0x08040000, LENGTH = 1280K /* CM7 firmware */ + FLASH_CM4 (rx) : ORIGIN = 0x08180000, LENGTH = 512K /* CM4 firmware */ } /* produce a link error if there is not this amount of RAM for these sections */ @@ -44,4 +44,8 @@ _micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM); _micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); _micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); +/* OpenAMP shared memory region */ +_openamp_shm_region_start = ORIGIN(SRAM4); +_openamp_shm_region_end = ORIGIN(SRAM4) + LENGTH(SRAM4); + INCLUDE common_blifs.ld