diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI/board_init.c b/ports/stm32/boards/NUCLEO_H7A3ZI/board_init.c new file mode 100644 index 0000000000..fcc6088312 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI/board_init.c @@ -0,0 +1,8 @@ +#include "py/mphal.h" + +void NUCLEO_H7A3_board_early_init(void) { + // Turn off the USB switch + #define USB_PowerSwitchOn pin_G6 + mp_hal_pin_output(USB_PowerSwitchOn); + mp_hal_pin_low(USB_PowerSwitchOn); +} diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.h b/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.h new file mode 100644 index 0000000000..3a875112e9 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.h @@ -0,0 +1,92 @@ +#define MICROPY_HW_BOARD_NAME "NUCLEO-H7A3ZI-Q" +#define MICROPY_HW_MCU_NAME "STM32H7A3ZI" + +#define MICROPY_HW_ENABLE_RTC (1) +#define MICROPY_HW_ENABLE_RNG (1) +#define MICROPY_HW_ENABLE_ADC (1) +#define MICROPY_HW_ENABLE_DAC (1) +#define MICROPY_HW_ENABLE_USB (1) +#define MICROPY_HW_ENABLE_SDCARD (0) +#define MICROPY_HW_HAS_SWITCH (1) +#define MICROPY_HW_HAS_FLASH (1) + +#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1) + +// The board has a 8MHz HSE, the following gives 280MHz CPU speed +#define MICROPY_HW_CLK_PLLM (1) +#define MICROPY_HW_CLK_PLLN (70) +#define MICROPY_HW_CLK_PLLP (2) +#define MICROPY_HW_CLK_PLLQ (14) +#define MICROPY_HW_CLK_PLLR (14) +#define MICROPY_HW_CLK_PLLVCI (RCC_PLL1VCIRANGE_1) +#define MICROPY_HW_CLK_PLLVCO (RCC_PLL1VCOWIDE) +#define MICROPY_HW_CLK_PLLFRAC (0) + +// The USB clock is set using PLL3 (48Mhz usb clock) +#define MICROPY_HW_CLK_PLL3M (1) +#define MICROPY_HW_CLK_PLL3N (30) +#define MICROPY_HW_CLK_PLL3P (2) +#define MICROPY_HW_CLK_PLL3Q (5) +#define MICROPY_HW_CLK_PLL3R (2) +#define MICROPY_HW_CLK_PLL3VCI (RCC_PLL3VCIRANGE_1) +#define MICROPY_HW_CLK_PLL3VCO (RCC_PLL3VCOWIDE) +#define MICROPY_HW_CLK_PLL3FRAC (0) + +// 6 wait states when running at 280MHz (VOS0 range) +#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_6 + +// SMPS configuration +#define MICROPY_HW_PWR_SMPS_CONFIG (PWR_DIRECT_SMPS_SUPPLY) + +// UART config +#define MICROPY_HW_UART2_TX (pin_D5) +#define MICROPY_HW_UART2_RX (pin_D6) +#define MICROPY_HW_UART2_RTS (pin_D4) +#define MICROPY_HW_UART2_CTS (pin_D3) +#define MICROPY_HW_UART3_TX (pin_D8) +#define MICROPY_HW_UART3_RX (pin_D9) +#define MICROPY_HW_UART5_TX (pin_B6) +#define MICROPY_HW_UART5_RX (pin_B12) +#define MICROPY_HW_UART6_TX (pin_C6) +#define MICROPY_HW_UART6_RX (pin_C7) +#define MICROPY_HW_UART7_TX (pin_F7) +#define MICROPY_HW_UART7_RX (pin_F6) +#define MICROPY_HW_UART8_TX (pin_E1) +#define MICROPY_HW_UART8_RX (pin_E0) + +#define MICROPY_HW_UART_REPL PYB_UART_3 +#define MICROPY_HW_UART_REPL_BAUD 115200 + + +// USRSW is pulled low. Pressing the button makes the input go high. +#define MICROPY_HW_USRSW_PIN (pin_C13) +#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL) +#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING) +#define MICROPY_HW_USRSW_PRESSED (1) + +// LEDs +#define MICROPY_HW_LED1 (pin_B0) // green +#define MICROPY_HW_LED2 (pin_E1) // orange +#define MICROPY_HW_LED3 (pin_B14) // red - not working? +#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin)) +#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin)) + +// USB config +#define MICROPY_HW_USB_FS (0) +#define MICROPY_HW_USB_HS (1) +#define MICROPY_HW_USB_HS_IN_FS (1) +#define MICROPY_HW_USB_MAIN_DEV (USB_PHY_HS_ID) +#define MICROPY_HW_USB_CDC_NUM (2) +#define MICROPY_HW_USB_MSC (0) + +// SD card detect switch +#define MICROPY_HW_SDCARD_DETECT_PIN (pin_I8) +#define MICROPY_HW_SDCARD_DETECT_PULL (GPIO_PULLUP) +#define MICROPY_HW_SDCARD_DETECT_PRESENT (GPIO_PIN_RESET) + +#define MICROPY_HW_SDMMC_D0 (pin_C8) +#define MICROPY_HW_SDMMC_D1 (pin_C9) +#define MICROPY_HW_SDMMC_D2 (pin_C10) +#define MICROPY_HW_SDMMC_D3 (pin_C11) +#define MICROPY_HW_SDMMC_CK (pin_C12) +#define MICROPY_HW_SDMMC_CMD (pin_D2) diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.mk b/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.mk new file mode 100644 index 0000000000..fb36dc3cb6 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI/mpconfigboard.mk @@ -0,0 +1,18 @@ +USE_MBOOT ?= 0 + +# MCU settings +MCU_SERIES = h7 +CMSIS_MCU = STM32H7A3xxQ +MICROPY_FLOAT_IMPL = double +AF_FILE = boards/stm32h7a3_af.csv + +ifeq ($(USE_MBOOT),1) +# When using Mboot all the text goes together after the filesystem +LD_FILES = boards/stm32h7a3.ld boards/common_blifs.ld +TEXT0_ADDR = 0x08040000 +else +# When not using Mboot the ISR text goes first, then the rest after the filesystem +LD_FILES = boards/stm32h7a3.ld boards/common_ifs.ld +TEXT0_ADDR = 0x08000000 +TEXT1_ADDR = 0x08040000 +endif diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI/pins.csv b/ports/stm32/boards/NUCLEO_H7A3ZI/pins.csv new file mode 100644 index 0000000000..9ade034b81 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI/pins.csv @@ -0,0 +1,130 @@ +A0,PA3 +A1,PC0 +A2,PC3 +A3,PB1 +A4,PC2 +A5,PF11 +A6,PC1 +A7,PC5 +A8,PA2 +D0,PB7 +D1,PB6 +D2,PG14 +D3,PE13 +D4,PE14 +D5,PE11 +D6,PA8 +D7,PG12 +D8,PG9 +D9,PD15 +D10,PD14 +D11,PA7 +D12,PA6 +D13,PA7 +D14,PB9 +D15,PB8 +D16,PC6 +D17,PB15 +D18,PB13 +D19,PB12 +D20,PA15 +D21,PC7 +D22,PB5 +D23,PB3 +D24,PA4 +D25,PB4 +D26,PG6 +D27,PB2 +D28,PD13 +D29,PD12 +D30,PD11 +D31,PE2 +D32,PA0 +D33,PB0 +D34,PE0 +D35,PB11 +D36,PB10 +D37,PE15 +D38,PE6 +D39,PE12 +D40,PE10 +D41,PE7 +D42,PE8 +D43,PC8 +D44,PC9 +D45,PC10 +D46,PC11 +D47,PC12 +D48,PD2 +D49,PG10 +D50,PG8 +D51,PD7 +D52,PD6 +D53,PD5 +D54,PD4 +D55,PD3 +D56,PE2 +D57,PE4 +D58,PE5 +D59,PE6 +D60,PE3 +D61,PF8 +D62,PF7 +D63,PF9 +D64,PD10 +D65,PB14 +D66,PD1 +D67,PD0 +D68,PF15 +D69,PF14 +D70,PB5 +D71,PE9 +D72,PB2 +DAC1,PA4 +DAC2,PA5 +LED1,PB0 +LED2,PE1 +LED3,PB14 +SW,PC13 +I2C1_SDA,PB9 +I2C1_SCL,PB8 +I2C2_SDA,PF0 +I2C2_SCL,PF1 +I2C4_SCL,PF14 +I2C4_SDA,PF15 +SD_D0,PC8 +SD_D1,PC9 +SD_D2,PC10 +SD_D3,PC11 +SD_CMD,PD2 +SD_CK,PC12 +SD_SW,PG2 +OTG_FS_POWER,PD10 +OTG_FS_OVER_CURRENT,PG7 +USB_VBUS,PA9 +USB_ID,PA10 +USB_DM,PA11 +USB_DP,PA12 +UART2_TX,PD5 +UART2_RX,PD6 +UART2_RTS,PD4 +UART2_CTS,PD3 +UART3_TX,PD8 +UART3_RX,PD9 +UART5_TX,PB6 +UART5_RX,PB12 +UART6_TX,PC6 +UART6_RX,PC7 +UART7_TX,PF7 +UART7_RX,PF6 +UART8_TX,PE1 +UART8_RX,PE0 +ETH_MDC,PC1 +ETH_MDIO,PA2 +ETH_RMII_REF_CLK,PA1 +ETH_RMII_CRS_DV,PA7 +ETH_RMII_RXD0,PC4 +ETH_RMII_RXD1,PC5 +ETH_RMII_TX_EN,PG11 +ETH_RMII_TXD0,PG13 +ETH_RMII_TXD1,PB13 diff --git a/ports/stm32/boards/NUCLEO_H7A3ZI/stm32h7xx_hal_conf.h b/ports/stm32/boards/NUCLEO_H7A3ZI/stm32h7xx_hal_conf.h new file mode 100644 index 0000000000..45400cdcd7 --- /dev/null +++ b/ports/stm32/boards/NUCLEO_H7A3ZI/stm32h7xx_hal_conf.h @@ -0,0 +1,19 @@ +/* This file is part of the MicroPython project, http://micropython.org/ + * The MIT License (MIT) + * Copyright (c) 2019 Damien P. George + */ +#ifndef MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H +#define MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H + +#include "boards/stm32h7xx_hal_conf_base.h" + +// Oscillator values in Hz +#define HSE_VALUE (8000000) +#define LSE_VALUE (32768) +#define EXTERNAL_CLOCK_VALUE (12288000) + +// Oscillator timeouts in ms +#define HSE_STARTUP_TIMEOUT (5000) +#define LSE_STARTUP_TIMEOUT (5000) + +#endif // MICROPY_INCLUDED_STM32H7XX_HAL_CONF_H diff --git a/ports/stm32/boards/stm32h7a3.ld b/ports/stm32/boards/stm32h7a3.ld new file mode 100644 index 0000000000..bfe82316c3 --- /dev/null +++ b/ports/stm32/boards/stm32h7a3.ld @@ -0,0 +1,41 @@ +/* + GNU linker script for STM32H7A3 +*/ + +/* Specify the memory areas */ + + +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K /* 8K sector size */ + FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 96K /* bootloader */ + FLASH_FS (r) : ORIGIN = 0x08018000, LENGTH = 96K /* minimal file system */ + FLASH_TEXT (rx) : ORIGIN = 0x08030000, LENGTH = 1856K /* code */ + DTCM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K /* Used for storage cache */ + RAM (xrw) : ORIGIN = 0x24000000, LENGTH = 1024K /* AXI SRAM */ + RAM_D2 (xrw) : ORIGIN = 0x30000000, LENGTH = 288K +} + +/* produce a link error if there is not this amount of RAM for these sections */ +_minimum_stack_size = 2K; +_minimum_heap_size = 16K; + +/* Define the stack. The stack is full descending so begins just above last byte + of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */ +_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve; +_sstack = _estack - 16K; /* tunable */ + +/* RAM extents for the garbage collector */ +_ram_start = ORIGIN(RAM); +_ram_end = ORIGIN(RAM) + LENGTH(RAM); +_heap_start = _ebss; /* heap starts just after statically allocated memory */ +_heap_end = _sstack; + +/* Location of filesystem RAM cache */ +_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM); +_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM); + +/* Location of filesystem flash storage */ +_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS); +_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS); + diff --git a/ports/stm32/boards/stm32h7a3_af.csv b/ports/stm32/boards/stm32h7a3_af.csv new file mode 100644 index 0000000000..0e1747161f --- /dev/null +++ b/ports/stm32/boards/stm32h7a3_af.csv @@ -0,0 +1,175 @@ +Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15, +,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,ADC +PortA,PA0,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,I2S6_WS/SPI6_NSS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,,,,,EVENTOUT/EVENTOUT,ADC1_INP16, +PortA,PA0_C,,TIM2_CH1/TIM2_ETR,TIM5_CH1,TIM8_ETR,TIM15_BKIN,I2S6_WS/SPI6_NSS,,USART2_CTS/USART2_NSS,UART4_TX,SDMMC2_CMD,SAI2_SD_B,,,,,EVENTOUT/EVENTOUT,ADC1_INP16, +PortA,PA1,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_DE/USART2_RTS,UART4_RX,OCTOSPIM_P1_IO3,SAI2_MCLK_B,OCTOSPIM_P1_DQS,,,LTDC_R2,EVENTOUT/EVENTOUT,ADC1_INN16/ADC1_INP17, +PortA,PA10,,TIM1_CH3,,LPUART1_RX,,,,USART1_RX,,,USB_OTG_HS_ID,MDIOS_MDIO,LTDC_B4,DCMI_D1/PSSI_D1,LTDC_B1,EVENTOUT/EVENTOUT,, +PortA,PA11,,TIM1_CH4,,LPUART1_CTS,,I2S2_WS/SPI2_NSS,UART4_RX,USART1_CTS/USART1_NSS,,FDCAN1_RX,,,,,LTDC_R4,EVENTOUT/EVENTOUT,, +PortA,PA12,,TIM1_ETR,,LPUART1_DE/LPUART1_RTS,,I2S2_CK/SPI2_SCK,UART4_TX,USART1_DE/USART1_RTS,SAI2_FS_B,FDCAN1_TX,,,,,LTDC_R5,EVENTOUT/EVENTOUT,, +PortA,PA13,DEBUG_JTMS/SWDIO,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortA,PA14,DEBUG_JTCK/SWCLK,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortA,PA15,DEBUG_JTDI,TIM2_CH1/TIM2_ETR,,,CEC,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,I2S6_WS/SPI6_NSS,UART4_DE/UART4_RTS,LTDC_R3,,UART7_TX,,,LTDC_B6,EVENTOUT/EVENTOUT,, +PortA,PA1_C,,TIM2_CH2,TIM5_CH2,LPTIM3_OUT,TIM15_CH1N,,,USART2_DE/USART2_RTS,UART4_RX,OCTOSPIM_P1_IO3,SAI2_MCLK_B,OCTOSPIM_P1_DQS,,,LTDC_R2,EVENTOUT/EVENTOUT,ADC1_INN16/ADC1_INP17, +PortA,PA2,,TIM2_CH3,TIM5_CH3,,TIM15_CH1,,DFSDM2_CKIN1,USART2_TX,SAI2_SCK_B,,,,MDIOS_MDIO,,LTDC_R1,EVENTOUT/EVENTOUT,ADC1_INP14, +PortA,PA3,,TIM2_CH4,TIM5_CH4,OCTOSPIM_P1_CLK,TIM15_CH2,I2S6_MCK,,USART2_RX,,LTDC_B2,USB_OTG_HS_ULPI_D0,,,,LTDC_B5,EVENTOUT/EVENTOUT,ADC1_INP15, +PortA,PA4,,,TIM5_ETR,,,I2S1_WS/SPI1_NSS,I2S3_WS/SPI3_NSS,USART2_CK,I2S6_WS/SPI6_NSS,,,,,DCMI_HSYNC/PSSI_DE,LTDC_VSYNC,EVENTOUT/EVENTOUT,ADC1_INP18, +PortA,PA5,PWR_NDSTOP2,TIM2_CH1/TIM2_ETR,,TIM8_CH1N,,I2S1_CK/SPI1_SCK,,,I2S6_CK/SPI6_SCK,,USB_OTG_HS_ULPI_CK,,,PSSI_D14,LTDC_R4,EVENTOUT/EVENTOUT,ADC1_INN18/ADC1_INP19, +PortA,PA6,,TIM1_BKIN,TIM3_CH1,TIM8_BKIN,,I2S1_SDI/SPI1_MISO,OCTOSPIM_P1_IO3,,I2S6_SDI/SPI6_MISO,TIM13_CH1,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,MDIOS_MDC,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,DCMI_PIXCLK/PSSI_PDCK,LTDC_G2,EVENTOUT/EVENTOUT,ADC1_INP3/ADC2_INP3, +PortA,PA7,,TIM1_CH1N,TIM3_CH2,TIM8_CH1N,DFSDM2_DATIN1,I2S1_SDO/SPI1_MOSI,,,I2S6_SDO/SPI6_MOSI,TIM14_CH1,OCTOSPIM_P1_IO2,,FMC_SDNWE,,LTDC_VSYNC,EVENTOUT/EVENTOUT,ADC1_INN3/ADC1_INP7/ADC2_INN3/ADC2_INP7, +PortA,PA8,RCC_MCO_1,TIM1_CH1,,TIM8_BKIN2,I2C3_SCL,,,USART1_CK,,,USB_OTG_HS_SOF,UART7_RX,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,LTDC_B3,LTDC_R6,EVENTOUT/EVENTOUT,, +PortA,PA9,,TIM1_CH2,,LPUART1_TX,I2C3_SMBA,I2S2_CK/SPI2_SCK,,USART1_TX,,,,,,DCMI_D0/PSSI_D0,LTDC_R5,EVENTOUT/EVENTOUT,, +PortB,PB0,,TIM1_CH2N,TIM3_CH3,TIM8_CH2N,DFSDM2_CKOUT,,DFSDM1_CKOUT,,UART4_CTS,LTDC_R3,USB_OTG_HS_ULPI_D1,OCTOSPIM_P1_IO1,,,LTDC_G1,EVENTOUT/EVENTOUT,ADC1_INN5/ADC1_INP9/ADC2_INN5/ADC2_INP9, +PortB,PB1,,TIM1_CH3N,TIM3_CH4,TIM8_CH3N,,,DFSDM1_DATIN1,,,LTDC_R6,USB_OTG_HS_ULPI_D2,OCTOSPIM_P1_IO0,,,LTDC_G0,EVENTOUT/EVENTOUT,ADC1_INP5/ADC2_INP5, +PortB,PB10,,TIM2_CH3,,LPTIM2_IN1,I2C2_SCL,I2S2_CK/SPI2_SCK,DFSDM1_DATIN7,USART3_TX,,OCTOSPIM_P1_NCS,USB_OTG_HS_ULPI_D3,,,,LTDC_G4,EVENTOUT/EVENTOUT,, +PortB,PB11,,TIM2_CH4,,LPTIM2_ETR,I2C2_SDA,,DFSDM1_CKIN7,USART3_RX,,,USB_OTG_HS_ULPI_D4,,,,LTDC_G5,EVENTOUT/EVENTOUT,, +PortB,PB12,,TIM1_BKIN,,OCTOSPIM_P1_NCLK,I2C2_SMBA,I2S2_WS/SPI2_NSS,DFSDM1_DATIN1,USART3_CK,,FDCAN2_RX,USB_OTG_HS_ULPI_D5,DFSDM2_DATIN1,,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,UART5_RX,EVENTOUT/EVENTOUT,, +PortB,PB13,,TIM1_CH1N,,LPTIM2_OUT,DFSDM2_CKIN1,I2S2_CK/SPI2_SCK,DFSDM1_CKIN1,USART3_CTS/USART3_NSS,,FDCAN2_TX,USB_OTG_HS_ULPI_D6,,SDMMC1_D0,DCMI_D2/PSSI_D2,UART5_TX,EVENTOUT/EVENTOUT,, +PortB,PB14,,TIM1_CH2N,TIM12_CH1,TIM8_CH2N,USART1_TX,I2S2_SDI/SPI2_MISO,DFSDM1_DATIN2,USART3_DE/USART3_RTS,UART4_DE/UART4_RTS,SDMMC2_D0,,,,,LTDC_CLK,EVENTOUT/EVENTOUT,, +PortB,PB15,RTC_REFIN,TIM1_CH3N,TIM12_CH2,TIM8_CH3N,USART1_RX,I2S2_SDO/SPI2_MOSI,DFSDM1_CKIN2,,UART4_CTS,SDMMC2_D1,,,,,LTDC_G7,EVENTOUT/EVENTOUT,, +PortB,PB2,RTC_OUT_ALARM,,SAI1_D1,,DFSDM1_CKIN1,,SAI1_SD_A,I2S3_SDO/SPI3_MOSI,,OCTOSPIM_P1_CLK,OCTOSPIM_P1_DQS,,,,,EVENTOUT/EVENTOUT,, +PortB,PB3,DEBUG_JTDO/SWO,TIM2_CH2,,,,I2S1_CK/SPI1_SCK,I2S3_CK/SPI3_SCK,,I2S6_CK/SPI6_SCK,SDMMC2_D2,CRS_SYNC,UART7_RX,,,,EVENTOUT/EVENTOUT,, +PortB,PB4,,TIM16_BKIN,TIM3_CH1,,,I2S1_SDI/SPI1_MISO,I2S3_SDI/SPI3_MISO,I2S2_WS/SPI2_NSS,I2S6_SDI/SPI6_MISO,SDMMC2_D3,,UART7_TX,,,,EVENTOUT/EVENTOUT,, +PortB,PB5,,TIM17_BKIN,TIM3_CH2,,I2C1_SMBA,I2S1_SDO/SPI1_MOSI,I2C4_SMBA,I2S3_SDO/SPI3_MOSI,I2S6_SDO/SPI6_MOSI,FDCAN2_RX,USB_OTG_HS_ULPI_D7,LTDC_B5,FMC_SDCKE1,DCMI_D10/PSSI_D10,UART5_RX,EVENTOUT/EVENTOUT,, +PortB,PB6,,TIM16_CH1N,TIM4_CH1,,I2C1_SCL,CEC,I2C4_SCL,USART1_TX,LPUART1_TX,FDCAN2_TX,OCTOSPIM_P1_NCS,DFSDM1_DATIN5,FMC_SDNE1,DCMI_D5/PSSI_D5,UART5_TX,EVENTOUT/EVENTOUT,, +PortB,PB7,,TIM17_CH1N,TIM4_CH2,,I2C1_SDA,,I2C4_SDA,USART1_RX,LPUART1_RX,,,DFSDM1_CKIN5,FMC_NL,DCMI_VSYNC/PSSI_RDY,,EVENTOUT/EVENTOUT,, +PortB,PB8,,TIM16_CH1,TIM4_CH3,DFSDM1_CKIN7,I2C1_SCL,,I2C4_SCL,SDMMC1_CKIN,UART4_RX,FDCAN1_RX,SDMMC2_D4,,SDMMC1_D4,DCMI_D6/PSSI_D6,LTDC_B6,EVENTOUT/EVENTOUT,, +PortB,PB9,,TIM17_CH1,TIM4_CH4,DFSDM1_DATIN7,I2C1_SDA,I2S2_WS/SPI2_NSS,I2C4_SDA,SDMMC1_CDIR,UART4_TX,FDCAN1_TX,SDMMC2_D5,I2C4_SMBA,SDMMC1_D5,DCMI_D7/PSSI_D7,LTDC_B7,EVENTOUT/EVENTOUT,, +PortC,PC0,,,,DFSDM1_CKIN0,,,DFSDM1_DATIN4,,SAI2_FS_B,FMC_A25,USB_OTG_HS_ULPI_STP,LTDC_G2,FMC_SDNWE,,LTDC_R5,EVENTOUT/EVENTOUT,ADC1_INP10/ADC2_INP10, +PortC,PC1,DEBUG_TRACED0,,SAI1_D1,DFSDM1_DATIN0,DFSDM1_CKIN4,I2S2_SDO/SPI2_MOSI,SAI1_SD_A,,,SDMMC2_CK,OCTOSPIM_P1_IO4,,MDIOS_MDC,,LTDC_G5,EVENTOUT/EVENTOUT,ADC1_INN10/ADC1_INP11/ADC2_INN10/ADC2_INP11, +PortC,PC10,,,,DFSDM1_CKIN5,DFSDM2_CKIN0,,I2S3_CK/SPI3_SCK,USART3_TX,UART4_TX,OCTOSPIM_P1_IO1,LTDC_B1,SWPMI1_RX,SDMMC1_D2,DCMI_D8/PSSI_D8,LTDC_R2,EVENTOUT/EVENTOUT,, +PortC,PC11,,,,DFSDM1_DATIN5,DFSDM2_DATIN0,,I2S3_SDI/SPI3_MISO,USART3_RX,UART4_RX,OCTOSPIM_P1_NCS,,,SDMMC1_D3,DCMI_D4/PSSI_D4,LTDC_B4,EVENTOUT/EVENTOUT,, +PortC,PC12,DEBUG_TRACED3,,TIM15_CH1,,DFSDM2_CKOUT,I2S6_CK/SPI6_SCK,I2S3_SDO/SPI3_MOSI,USART3_CK,UART5_TX,,,,SDMMC1_CK,DCMI_D9/PSSI_D9,LTDC_R6,EVENTOUT/EVENTOUT,, +PortC,PC13,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortC,PC14-OSC32_IN,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortC,PC15-OSC32_OUT,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortC,PC2,PWR_CSTOP,,,DFSDM1_CKIN1,,I2S2_SDI/SPI2_MISO,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,USB_OTG_HS_ULPI_DIR,OCTOSPIM_P1_IO5,FMC_SDNE0,,,EVENTOUT/EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12, +PortC,PC2_C,PWR_CSTOP,,,DFSDM1_CKIN1,,I2S2_SDI/SPI2_MISO,DFSDM1_CKOUT,,,OCTOSPIM_P1_IO2,USB_OTG_HS_ULPI_DIR,OCTOSPIM_P1_IO5,FMC_SDNE0,,,EVENTOUT/EVENTOUT,ADC1_INN11/ADC1_INP12/ADC2_INN11/ADC2_INP12, +PortC,PC3,PWR_CSLEEP,,,DFSDM1_DATIN1,,I2S2_SDO/SPI2_MOSI,,,,OCTOSPIM_P1_IO0,USB_OTG_HS_ULPI_NXT,OCTOSPIM_P1_IO6,FMC_SDCKE0,,,EVENTOUT/EVENTOUT,ADC2_INP1, +PortC,PC3_C,PWR_CSLEEP,,,DFSDM1_DATIN1,,I2S2_SDO/SPI2_MOSI,,,,OCTOSPIM_P1_IO0,USB_OTG_HS_ULPI_NXT,OCTOSPIM_P1_IO6,FMC_SDCKE0,,,EVENTOUT/EVENTOUT,ADC2_INP1, +PortC,PC4,,,,DFSDM1_CKIN2,,I2S1_MCK,,,,SPDIFRX_IN3,,,FMC_SDNE0,,LTDC_R7,EVENTOUT/EVENTOUT,ADC1_INP4/ADC2_INP4, +PortC,PC5,,,SAI1_D3,DFSDM1_DATIN2,PSSI_D15,,,,,SPDIFRX_IN4,OCTOSPIM_P1_DQS,,FMC_SDCKE0,COMP1_OUT,LTDC_DE,EVENTOUT/EVENTOUT,ADC1_INN4/ADC1_INP8/ADC2_INN4/ADC2_INP8, +PortC,PC6,,,TIM3_CH1,TIM8_CH1,DFSDM1_CKIN3,I2S2_MCK,,USART6_TX,SDMMC1_D0DIR,FMC_NWAIT,SDMMC2_D6,,SDMMC1_D6,DCMI_D0/PSSI_D0,LTDC_HSYNC,EVENTOUT/EVENTOUT,, +PortC,PC7,DEBUG_TRGIO,,TIM3_CH2,TIM8_CH2,DFSDM1_DATIN3,,I2S3_MCK,USART6_RX,SDMMC1_D123DIR,FMC_NE1,SDMMC2_D7,SWPMI1_TX,SDMMC1_D7,DCMI_D1/PSSI_D1,LTDC_G6,EVENTOUT/EVENTOUT,, +PortC,PC8,DEBUG_TRACED1,,TIM3_CH3,TIM8_CH3,,,,USART6_CK,UART5_DE/UART5_RTS,FMC_NCE/FMC_NE2,FMC_INT,SWPMI1_RX,SDMMC1_D0,DCMI_D2/PSSI_D2,,EVENTOUT/EVENTOUT,, +PortC,PC9,RCC_MCO_2,,TIM3_CH4,TIM8_CH4,I2C3_SDA,I2S_CKIN,,,UART5_CTS,OCTOSPIM_P1_IO0,LTDC_G3,SWPMI1_SUSPEND,SDMMC1_D1,DCMI_D3/PSSI_D3,LTDC_B2,EVENTOUT/EVENTOUT,, +PortD,PD0,,,,DFSDM1_CKIN6,,,,,UART4_RX,FDCAN1_RX,,UART9_CTS,FMC_D2/FMC_DA2,,LTDC_B1,EVENTOUT/EVENTOUT,, +PortD,PD1,,,,DFSDM1_DATIN6,,,,,UART4_TX,FDCAN1_TX,,,FMC_D3/FMC_DA3,,,EVENTOUT/EVENTOUT,, +PortD,PD10,,,,DFSDM1_CKOUT,DFSDM2_CKOUT,,,USART3_CK,,,,,FMC_D15/FMC_DA15,,LTDC_B3,EVENTOUT/EVENTOUT,, +PortD,PD11,,,,LPTIM2_IN2,I2C4_SMBA,,,USART3_CTS/USART3_NSS,,OCTOSPIM_P1_IO0,SAI2_SD_A,,FMC_A16/FMC_CLE,,,EVENTOUT/EVENTOUT,, +PortD,PD12,,LPTIM1_IN1,TIM4_CH1,LPTIM2_IN1,I2C4_SCL,,,USART3_DE/USART3_RTS,,OCTOSPIM_P1_IO1,SAI2_FS_A,,FMC_A17/FMC_ALE,DCMI_D12/PSSI_D12,,EVENTOUT/EVENTOUT,, +PortD,PD13,,LPTIM1_OUT,TIM4_CH2,,I2C4_SDA,,,,,OCTOSPIM_P1_IO3,SAI2_SCK_A,UART9_DE/UART9_RTS,FMC_A18,DCMI_D13/PSSI_D13,,EVENTOUT/EVENTOUT,, +PortD,PD14,,,TIM4_CH3,,,,,,UART8_CTS,,,UART9_RX,FMC_D0/FMC_DA0,,,EVENTOUT/EVENTOUT,, +PortD,PD15,,,TIM4_CH4,,,,,,UART8_DE/UART8_RTS,,,UART9_TX,FMC_D1/FMC_DA1,,,EVENTOUT/EVENTOUT,, +PortD,PD2,DEBUG_TRACED2,,TIM3_ETR,,TIM15_BKIN,,,,UART5_RX,LTDC_B7,,,SDMMC1_CMD,DCMI_D11/PSSI_D11,LTDC_B2,EVENTOUT/EVENTOUT,, +PortD,PD3,,,,DFSDM1_CKOUT,,I2S2_CK/SPI2_SCK,,USART2_CTS/USART2_NSS,,,,,FMC_CLK,DCMI_D5/PSSI_D5,LTDC_G7,EVENTOUT/EVENTOUT,, +PortD,PD4,,,,,,,,USART2_DE/USART2_RTS,,,OCTOSPIM_P1_IO4,,FMC_NOE,,,EVENTOUT/EVENTOUT,, +PortD,PD5,,,,,,,,USART2_TX,,,OCTOSPIM_P1_IO5,,FMC_NWE,,,EVENTOUT/EVENTOUT,, +PortD,PD6,,,SAI1_D1,DFSDM1_CKIN4,DFSDM1_DATIN1,I2S3_SDO/SPI3_MOSI,SAI1_SD_A,USART2_RX,,,OCTOSPIM_P1_IO6,SDMMC2_CK,FMC_NWAIT,DCMI_D10/PSSI_D10,LTDC_B2,EVENTOUT/EVENTOUT,, +PortD,PD7,,,,DFSDM1_DATIN4,,I2S1_SDO/SPI1_MOSI,DFSDM1_CKIN1,USART2_CK,,SPDIFRX_IN1,OCTOSPIM_P1_IO7,SDMMC2_CMD,FMC_NE1,,,EVENTOUT/EVENTOUT,, +PortD,PD8,,,,DFSDM1_CKIN3,,,,USART3_TX,,SPDIFRX_IN2,,,FMC_D13/FMC_DA13,,,EVENTOUT/EVENTOUT,, +PortD,PD9,,,,DFSDM1_DATIN3,,,,USART3_RX,,,,,FMC_D14/FMC_DA14,,,EVENTOUT/EVENTOUT,, +PortD,PDR_ON,,,,,,,,,,,,,,,,EVENTOUT,, +PortE,PE0,,LPTIM1_ETR,TIM4_ETR,,LPTIM2_ETR,,,,UART8_RX,,SAI2_MCLK_A,,FMC_NBL0,DCMI_D2/PSSI_D2,LTDC_R0,EVENTOUT/EVENTOUT,, +PortE,PE1,,LPTIM1_IN2,,,,,,,UART8_TX,,,,FMC_NBL1,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,, +PortE,PE10,,TIM1_CH2N,,DFSDM1_DATIN4,,,,UART7_CTS,,,OCTOSPIM_P1_IO7,,FMC_D7/FMC_DA7,,,EVENTOUT/EVENTOUT,, +PortE,PE11,,TIM1_CH2,,DFSDM1_CKIN4,,SPI4_NSS,,,,,SAI2_SD_B,OCTOSPIM_P1_NCS,FMC_D8/FMC_DA8,,LTDC_G3,EVENTOUT/EVENTOUT,, +PortE,PE12,,TIM1_CH3N,,DFSDM1_DATIN5,,SPI4_SCK,,,,,SAI2_SCK_B,,FMC_D9/FMC_DA9,COMP1_OUT,LTDC_B4,EVENTOUT/EVENTOUT,, +PortE,PE13,,TIM1_CH3,,DFSDM1_CKIN5,,SPI4_MISO,,,,,SAI2_FS_B,,FMC_D10/FMC_DA10,COMP2_OUT,LTDC_DE,EVENTOUT/EVENTOUT,, +PortE,PE14,,TIM1_CH4,,,,SPI4_MOSI,,,,,SAI2_MCLK_B,,FMC_D11/FMC_DA11,,LTDC_CLK,EVENTOUT/EVENTOUT,, +PortE,PE15,,TIM1_BKIN,,,,,,,,,,USART10_CK,FMC_D12/FMC_DA12,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,LTDC_R7,EVENTOUT/EVENTOUT,, +PortE,PE2,DEBUG_TRACECLK,,SAI1_CK1,,,SPI4_SCK,SAI1_MCLK_A,,,OCTOSPIM_P1_IO2,,USART10_RX,FMC_A23,,,EVENTOUT/EVENTOUT,, +PortE,PE3,DEBUG_TRACED0,,,,TIM15_BKIN,,SAI1_SD_B,,,,,USART10_TX,FMC_A19,,,EVENTOUT/EVENTOUT,, +PortE,PE4,DEBUG_TRACED1,,SAI1_D2,DFSDM1_DATIN3,TIM15_CH1N,SPI4_NSS,SAI1_FS_A,,,,,,FMC_A20,DCMI_D4/PSSI_D4,LTDC_B0,EVENTOUT/EVENTOUT,, +PortE,PE5,DEBUG_TRACED2,,SAI1_CK2,DFSDM1_CKIN3,TIM15_CH1,SPI4_MISO,SAI1_SCK_A,,,,,,FMC_A21,DCMI_D6/PSSI_D6,LTDC_G0,EVENTOUT/EVENTOUT,, +PortE,PE6,DEBUG_TRACED3,TIM1_BKIN2,SAI1_D1,,TIM15_CH2,SPI4_MOSI,SAI1_SD_A,,,,SAI2_MCLK_B,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2,FMC_A22,DCMI_D7/PSSI_D7,LTDC_G1,EVENTOUT/EVENTOUT,, +PortE,PE7,,TIM1_ETR,,DFSDM1_DATIN2,,,,UART7_RX,,,OCTOSPIM_P1_IO4,,FMC_D4/FMC_DA4,,,EVENTOUT/EVENTOUT,, +PortE,PE8,,TIM1_CH1N,,DFSDM1_CKIN2,,,,UART7_TX,,,OCTOSPIM_P1_IO5,,FMC_D5/FMC_DA5,COMP2_OUT,,EVENTOUT/EVENTOUT,, +PortE,PE9,,TIM1_CH1,,DFSDM1_CKOUT,,,,UART7_DE/UART7_RTS,,,OCTOSPIM_P1_IO6,,FMC_D6/FMC_DA6,,,EVENTOUT/EVENTOUT,, +PortF,PF0,,,,,I2C2_SDA,,,,,OCTOSPIM_P2_IO0,,,FMC_A0,,,EVENTOUT/EVENTOUT,, +PortF,PF1,,,,,I2C2_SCL,,,,,OCTOSPIM_P2_IO1,,,FMC_A1,,,EVENTOUT/EVENTOUT,, +PortF,PF10,,TIM16_BKIN,SAI1_D3,,PSSI_D15,,,,,OCTOSPIM_P1_CLK,,,,DCMI_D11/PSSI_D11,LTDC_DE,EVENTOUT/EVENTOUT,, +PortF,PF11,,,,,,SPI5_MOSI,,,,OCTOSPIM_P1_NCLK,SAI2_SD_B,,FMC_SDNRAS,DCMI_D12/PSSI_D12,,EVENTOUT/EVENTOUT,ADC1_INP2, +PortF,PF12,,,,,,,,,,OCTOSPIM_P2_DQS,,,FMC_A6,,,EVENTOUT/EVENTOUT,ADC1_INN2/ADC1_INP6, +PortF,PF13,,,,DFSDM1_DATIN6,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT/EVENTOUT,ADC2_INP2, +PortF,PF14,,,,DFSDM1_CKIN6,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT/EVENTOUT,ADC2_INN2/ADC2_INP6, +PortF,PF15,,,,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT/EVENTOUT,, +PortF,PF2,,,,,I2C2_SMBA,,,,,OCTOSPIM_P2_IO2,,,FMC_A2,,,EVENTOUT/EVENTOUT,, +PortF,PF3,,,,,,,,,,OCTOSPIM_P2_IO3,,,FMC_A3,,,EVENTOUT/EVENTOUT,, +PortF,PF4,,,,,,,,,,OCTOSPIM_P2_CLK,,,FMC_A4,,,EVENTOUT/EVENTOUT,, +PortF,PF5,,,,,,,,,,OCTOSPIM_P2_NCLK,,,FMC_A5,,,EVENTOUT/EVENTOUT,, +PortF,PF6,,TIM16_CH1,,,,SPI5_NSS,SAI1_SD_B,UART7_RX,,,OCTOSPIM_P1_IO3,,,,,EVENTOUT/EVENTOUT,, +PortF,PF7,,TIM17_CH1,,,,SPI5_SCK,SAI1_MCLK_B,UART7_TX,,,OCTOSPIM_P1_IO2,,,,,EVENTOUT/EVENTOUT,, +PortF,PF8,,TIM16_CH1N,,,,SPI5_MISO,SAI1_SCK_B,UART7_DE/UART7_RTS,,TIM13_CH1,OCTOSPIM_P1_IO0,,,,,EVENTOUT/EVENTOUT,, +PortF,PF9,,TIM17_CH1N,,,,SPI5_MOSI,SAI1_FS_B,UART7_CTS,,TIM14_CH1,OCTOSPIM_P1_IO1,,,,,EVENTOUT/EVENTOUT,, +PortG,PG0,,,,,,,,,,OCTOSPIM_P2_IO4,,UART9_RX,FMC_A10,,,EVENTOUT/EVENTOUT,, +PortG,PG1,,,,,,,,,,OCTOSPIM_P2_IO5,,UART9_TX,FMC_A11,,,EVENTOUT/EVENTOUT,, +PortG,PG10,,,,OCTOSPIM_P2_IO6,,I2S1_WS/SPI1_NSS,,,,LTDC_G3,SAI2_SD_B,SDMMC2_D1,FMC_NE3,DCMI_D2/PSSI_D2,LTDC_B2,EVENTOUT/EVENTOUT,, +PortG,PG11,,LPTIM1_IN2,,,,I2S1_CK/SPI1_SCK,,,SPDIFRX_IN1,OCTOSPIM_P2_IO7,SDMMC2_D2,USART10_RX,,DCMI_D3/PSSI_D3,LTDC_B3,EVENTOUT/EVENTOUT,, +PortG,PG12,,LPTIM1_IN1,,OCTOSPIM_P2_NCS,,I2S6_SDI/SPI6_MISO,,USART6_DE/USART6_RTS,SPDIFRX_IN2,LTDC_B4,SDMMC2_D3,USART10_TX,FMC_NE4,,LTDC_B1,EVENTOUT/EVENTOUT,, +PortG,PG13,DEBUG_TRACED0,LPTIM1_OUT,,,,I2S6_CK/SPI6_SCK,,USART6_CTS/USART6_NSS,,,SDMMC2_D6,USART10_CTS/USART10_NSS,FMC_A24,,LTDC_R0,EVENTOUT/EVENTOUT,, +PortG,PG14,DEBUG_TRACED1,LPTIM1_ETR,,,,I2S6_SDO/SPI6_MOSI,,USART6_TX,,OCTOSPIM_P1_IO7,SDMMC2_D7,USART10_DE/USART10_RTS,FMC_A25,,LTDC_B0,EVENTOUT/EVENTOUT,, +PortG,PG15,,,,,,,,USART6_CTS/USART6_NSS,,OCTOSPIM_P2_DQS,,USART10_CK,FMC_SDNCAS,DCMI_D13/PSSI_D13,,EVENTOUT/EVENTOUT,, +PortG,PG2,,,,TIM8_BKIN,,,,,,,,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,FMC_A12,,,EVENTOUT/EVENTOUT,, +PortG,PG3,,,,TIM8_BKIN2,,,,,,,,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,FMC_A13,,,EVENTOUT/EVENTOUT,, +PortG,PG4,,TIM1_BKIN2,,,,,,,,,,TIM1_BKIN2_COMP1/TIM1_BKIN2_COMP2,FMC_A14/FMC_BA0,,,EVENTOUT/EVENTOUT,, +PortG,PG5,,TIM1_ETR,,,,,,,,,,,FMC_A15/FMC_BA1,,,EVENTOUT/EVENTOUT,, +PortG,PG6,,TIM17_BKIN,,,,,,,,,OCTOSPIM_P1_NCS,,FMC_NE3,DCMI_D12/PSSI_D12,LTDC_R7,EVENTOUT/EVENTOUT,, +PortG,PG7,,,,,,,SAI1_MCLK_A,USART6_CK,,OCTOSPIM_P2_DQS,,,FMC_INT,DCMI_D13/PSSI_D13,LTDC_CLK,EVENTOUT/EVENTOUT,, +PortG,PG8,,,,TIM8_ETR,,I2S6_WS/SPI6_NSS,,USART6_DE/USART6_RTS,SPDIFRX_IN3,,,,FMC_SDCLK,,LTDC_G7,EVENTOUT/EVENTOUT,, +PortG,PG9,,,,,,I2S1_SDI/SPI1_MISO,,USART6_RX,SPDIFRX_IN4,OCTOSPIM_P1_IO6,SAI2_FS_B,SDMMC2_D0,FMC_NCE/FMC_NE2,DCMI_VSYNC/PSSI_RDY,,EVENTOUT/EVENTOUT,, +PortH,PH0-OSC_IN,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortH,PH1-OSC_OUT,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortH,PH10,,,TIM5_CH1,,I2C4_SMBA,,,,,,,,FMC_D18,DCMI_D1/PSSI_D1,LTDC_R4,EVENTOUT/EVENTOUT,, +PortH,PH11,,,TIM5_CH2,,I2C4_SCL,,,,,,,,FMC_D19,DCMI_D2/PSSI_D2,LTDC_R5,EVENTOUT/EVENTOUT,, +PortH,PH12,,,TIM5_CH3,,I2C4_SDA,,,,,,,,FMC_D20,DCMI_D3/PSSI_D3,LTDC_R6,EVENTOUT/EVENTOUT,, +PortH,PH13,,,,TIM8_CH1N,,,,,UART4_TX,FDCAN1_TX,,,FMC_D21,,LTDC_G2,EVENTOUT/EVENTOUT,, +PortH,PH14,,,,TIM8_CH2N,,,,,UART4_RX,FDCAN1_RX,,,FMC_D22,DCMI_D4/PSSI_D4,LTDC_G3,EVENTOUT/EVENTOUT,, +PortH,PH15,,,,TIM8_CH3N,,,,,,,,,FMC_D23,DCMI_D11/PSSI_D11,LTDC_G4,EVENTOUT/EVENTOUT,, +PortH,PH2,,LPTIM1_IN2,,,,,,,,OCTOSPIM_P1_IO4,SAI2_SCK_B,,FMC_SDCKE0,,LTDC_R0,EVENTOUT/EVENTOUT,, +PortH,PH3,,,,,,,,,,OCTOSPIM_P1_IO5,SAI2_MCLK_B,,FMC_SDNE0,,LTDC_R1,EVENTOUT/EVENTOUT,, +PortH,PH4,,,,,I2C2_SCL,,,,,LTDC_G5,USB_OTG_HS_ULPI_NXT,,,PSSI_D14,LTDC_G4,EVENTOUT/EVENTOUT,, +PortH,PH5,,,,,I2C2_SDA,SPI5_NSS,,,,,,,FMC_SDNWE,,,EVENTOUT/EVENTOUT,, +PortH,PH6,,,TIM12_CH1,,I2C2_SMBA,SPI5_SCK,,,,,,,FMC_SDNE1,DCMI_D8/PSSI_D8,,EVENTOUT/EVENTOUT,, +PortH,PH7,,,,,I2C3_SCL,SPI5_MISO,,,,,,,FMC_SDCKE1,DCMI_D9/PSSI_D9,,EVENTOUT/EVENTOUT,, +PortH,PH8,,,TIM5_ETR,,I2C3_SDA,,,,,,,,FMC_D16,DCMI_HSYNC/PSSI_DE,LTDC_R2,EVENTOUT/EVENTOUT,, +PortH,PH9,,,TIM12_CH2,,I2C3_SMBA,,,,,,,,FMC_D17,DCMI_D0/PSSI_D0,LTDC_R3,EVENTOUT/EVENTOUT,, +PortI,PI0,,,TIM5_CH4,,,I2S2_WS/SPI2_NSS,,,,,,,FMC_D24,DCMI_D13/PSSI_D13,LTDC_G5,EVENTOUT/EVENTOUT,, +PortI,PI1,,,,TIM8_BKIN2,,I2S2_CK/SPI2_SCK,,,,,,TIM8_BKIN2_COMP1/TIM8_BKIN2_COMP2,FMC_D25,DCMI_D8/PSSI_D8,LTDC_G6,EVENTOUT/EVENTOUT,, +PortI,PI10,,,,OCTOSPIM_P2_IO1,,,,,,,,,FMC_D31,PSSI_D14,LTDC_HSYNC,EVENTOUT/EVENTOUT,, +PortI,PI11,,,,OCTOSPIM_P2_IO2,,,,,,LTDC_G6,USB_OTG_HS_ULPI_DIR,,,PSSI_D15,,EVENTOUT/EVENTOUT,, +PortI,PI12,,,,OCTOSPIM_P2_IO3,,,,,,,,,,,LTDC_HSYNC,EVENTOUT/EVENTOUT,, +PortI,PI13,,,,OCTOSPIM_P2_CLK,,,,,,,,,,,LTDC_VSYNC,EVENTOUT/EVENTOUT,, +PortI,PI14,,,,OCTOSPIM_P2_NCLK,,,,,,,,,,,LTDC_CLK,EVENTOUT/EVENTOUT,, +PortI,PI15,,,,,,,,,,LTDC_G2,,,,,LTDC_R0,EVENTOUT/EVENTOUT,, +PortI,PI2,,,,TIM8_CH4,,I2S2_SDI/SPI2_MISO,,,,,,,FMC_D26,DCMI_D9/PSSI_D9,LTDC_G7,EVENTOUT/EVENTOUT,, +PortI,PI3,,,,TIM8_ETR,,I2S2_SDO/SPI2_MOSI,,,,,,,FMC_D27,DCMI_D10/PSSI_D10,,EVENTOUT/EVENTOUT,, +PortI,PI4,,,,TIM8_BKIN,,,,,,,SAI2_MCLK_A,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,FMC_NBL2,DCMI_D5/PSSI_D5,LTDC_B4,EVENTOUT/EVENTOUT,, +PortI,PI5,,,,TIM8_CH1,,,,,,,SAI2_SCK_A,,FMC_NBL3,DCMI_VSYNC/PSSI_RDY,LTDC_B5,EVENTOUT/EVENTOUT,, +PortI,PI6,,,,TIM8_CH2,,,,,,,SAI2_SD_A,,FMC_D28,DCMI_D6/PSSI_D6,LTDC_B6,EVENTOUT/EVENTOUT,, +PortI,PI7,,,,TIM8_CH3,,,,,,,SAI2_FS_A,,FMC_D29,DCMI_D7/PSSI_D7,LTDC_B7,EVENTOUT/EVENTOUT,, +PortI,PI8,,,,,,,,,,,,,,,,EVENTOUT/EVENTOUT,, +PortI,PI9,,,,OCTOSPIM_P2_IO0,,,,,UART4_RX,FDCAN1_RX,,,FMC_D30,,LTDC_VSYNC,EVENTOUT/EVENTOUT,, +PortJ,PJ0,,,,,,,,,,LTDC_R7,,,,,LTDC_R1,EVENTOUT/EVENTOUT,, +PortJ,PJ1,,,,OCTOSPIM_P2_IO4,,,,,,,,,,,LTDC_R2,EVENTOUT/EVENTOUT,, +PortJ,PJ10,,TIM1_CH2N,,TIM8_CH2,,SPI5_MOSI,,,,,,,,,LTDC_G3,EVENTOUT/EVENTOUT,, +PortJ,PJ11,,TIM1_CH2,,TIM8_CH2N,,SPI5_MISO,,,,,,,,,LTDC_G4,EVENTOUT/EVENTOUT,, +PortJ,PJ12,DEBUG_TRGOUT,,,,,,,,,LTDC_G3,,,,,LTDC_B0,EVENTOUT/EVENTOUT,, +PortJ,PJ13,,,,,,,,,,LTDC_B4,,,,,LTDC_B1,EVENTOUT/EVENTOUT,, +PortJ,PJ14,,,,,,,,,,,,,,,LTDC_B2,EVENTOUT/EVENTOUT,, +PortJ,PJ15,,,,,,,,,,,,,,,LTDC_B3,EVENTOUT/EVENTOUT,, +PortJ,PJ2,,,,OCTOSPIM_P2_IO5,,,,,,,,,,,LTDC_R3,EVENTOUT/EVENTOUT,, +PortJ,PJ3,,,,,,,,,,,,UART9_DE/UART9_RTS,,,LTDC_R4,EVENTOUT/EVENTOUT,, +PortJ,PJ4,,,,,,,,,,,,UART9_CTS,,,LTDC_R5,EVENTOUT/EVENTOUT,, +PortJ,PJ5,,,,,,,,,,,,,,,LTDC_R6,EVENTOUT/EVENTOUT,, +PortJ,PJ6,,,,TIM8_CH2,,,,,,,,,,,LTDC_R7,EVENTOUT/EVENTOUT,, +PortJ,PJ7,DEBUG_TRGIN,,,TIM8_CH2N,,,,,,,,,,,LTDC_G0,EVENTOUT/EVENTOUT,, +PortJ,PJ8,,TIM1_CH3N,,TIM8_CH1,,,,,UART8_TX,,,,,,LTDC_G1,EVENTOUT/EVENTOUT,, +PortJ,PJ9,,TIM1_CH3,,TIM8_CH1N,,,,,UART8_RX,,,,,,LTDC_G2,EVENTOUT/EVENTOUT,, +PortK,PK0,,TIM1_CH1N,,TIM8_CH3,,SPI5_SCK,,,,,,,,,LTDC_G5,EVENTOUT/EVENTOUT,, +PortK,PK1,,TIM1_CH1,,TIM8_CH3N,,SPI5_NSS,,,,,,,,,LTDC_G6,EVENTOUT/EVENTOUT,, +PortK,PK2,,TIM1_BKIN,,TIM8_BKIN,,,,,,,TIM8_BKIN_COMP1/TIM8_BKIN_COMP2,TIM1_BKIN_COMP1/TIM1_BKIN_COMP2,,,LTDC_G7,EVENTOUT/EVENTOUT,, +PortK,PK3,,,,OCTOSPIM_P2_IO6,,,,,,,,,,,LTDC_B4,EVENTOUT/EVENTOUT,, +PortK,PK4,,,,OCTOSPIM_P2_IO7,,,,,,,,,,,LTDC_B5,EVENTOUT/EVENTOUT,, +PortK,PK5,,,,OCTOSPIM_P2_NCS,,,,,,,,,,,LTDC_B6,EVENTOUT/EVENTOUT,, +PortK,PK6,,,,OCTOSPIM_P2_DQS,,,,,,,,,,,LTDC_B7,EVENTOUT/EVENTOUT,, +PortK,PK7,,,,,,,,,,,,,,,LTDC_DE,EVENTOUT/EVENTOUT,,