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renesas-ra: Consolidate all fsp_cfg header files to one location. 

The config header files with the same name have the same contents, so they
don't need to be repeated for each board in the board's source directory.

Signed-off-by: Damien George <damien@micropython.org>
pull/11846/head
Damien George 2023-06-22 23:22:43 +10:00
rodzic 23fe170da4
commit c2ea8b2f98
21 zmienionych plików z 1 dodań i 205 usunięć
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1
ports/renesas-ra/Makefile
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@ -91,6 +91,7 @@ CROSS_COMPILE ?= arm-none-eabi-
INC += -imacros boards/compiler_barrier.h
INC += -I.
INC += -Ifsp_cfg
INC += -I$(TOP)
INC += -I$(BUILD)
INC += -I$(TOP)/$(CMSIS_DIR)

13
ports/renesas-ra/boards/EK_RA4W1/ra_cfg/fsp_cfg/r_adc_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_ADC_CFG_H_
#define R_ADC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ADC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_ADC_CFG_H_ */

15
ports/renesas-ra/boards/EK_RA4W1/ra_cfg/fsp_cfg/r_flash_lp_cfg.h
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@ -1,15 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_FLASH_LP_CFG_H_
#define R_FLASH_LP_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define FLASH_LP_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define FLASH_LP_CFG_CODE_FLASH_PROGRAMMING_ENABLE (1)
#define FLASH_LP_CFG_DATA_FLASH_PROGRAMMING_ENABLE (0)
#ifdef __cplusplus
}
#endif
#endif /* R_FLASH_LP_CFG_H_ */

13
ports/renesas-ra/boards/EK_RA4W1/ra_cfg/fsp_cfg/r_ioport_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_IOPORT_CFG_H_
#define R_IOPORT_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_IOPORT_CFG_H_ */

14
ports/renesas-ra/boards/EK_RA4W1/ra_cfg/fsp_cfg/r_lpm_cfg.h
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@ -1,14 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_LPM_CFG_H_
#define R_LPM_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define LPM_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define LPM_CFG_STANDBY_LIMIT (0)
#ifdef __cplusplus
}
#endif
#endif /* R_LPM_CFG_H_ */

13
ports/renesas-ra/boards/EK_RA6M1/ra_cfg/fsp_cfg/r_adc_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_ADC_CFG_H_
#define R_ADC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ADC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_ADC_CFG_H_ */

13
ports/renesas-ra/boards/EK_RA6M1/ra_cfg/fsp_cfg/r_ioport_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_IOPORT_CFG_H_
#define R_IOPORT_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_IOPORT_CFG_H_ */

14
ports/renesas-ra/boards/EK_RA6M1/ra_cfg/fsp_cfg/r_lpm_cfg.h
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@ -1,14 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_LPM_CFG_H_
#define R_LPM_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define LPM_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define LPM_CFG_STANDBY_LIMIT (0)
#ifdef __cplusplus
}
#endif
#endif /* R_LPM_CFG_H_ */

13
ports/renesas-ra/boards/EK_RA6M2/ra_cfg/fsp_cfg/r_adc_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_ADC_CFG_H_
#define R_ADC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ADC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_ADC_CFG_H_ */

15
ports/renesas-ra/boards/EK_RA6M2/ra_cfg/fsp_cfg/r_flash_hp_cfg.h
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@ -1,15 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_FLASH_HP_CFG_H_
#define R_FLASH_HP_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define FLASH_HP_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define FLASH_HP_CFG_CODE_FLASH_PROGRAMMING_ENABLE (1)
#define FLASH_HP_CFG_DATA_FLASH_PROGRAMMING_ENABLE (0)
#ifdef __cplusplus
}
#endif
#endif /* R_FLASH_HP_CFG_H_ */

13
ports/renesas-ra/boards/EK_RA6M2/ra_cfg/fsp_cfg/r_ioport_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_IOPORT_CFG_H_
#define R_IOPORT_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_IOPORT_CFG_H_ */

14
ports/renesas-ra/boards/EK_RA6M2/ra_cfg/fsp_cfg/r_lpm_cfg.h
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@ -1,14 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_LPM_CFG_H_
#define R_LPM_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define LPM_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define LPM_CFG_STANDBY_LIMIT (0)
#ifdef __cplusplus
}
#endif
#endif /* R_LPM_CFG_H_ */

13
ports/renesas-ra/boards/RA4M1_CLICKER/ra_cfg/fsp_cfg/r_adc_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_ADC_CFG_H_
#define R_ADC_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define ADC_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_ADC_CFG_H_ */

15
ports/renesas-ra/boards/RA4M1_CLICKER/ra_cfg/fsp_cfg/r_flash_lp_cfg.h
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@ -1,15 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_FLASH_LP_CFG_H_
#define R_FLASH_LP_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define FLASH_LP_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define FLASH_LP_CFG_CODE_FLASH_PROGRAMMING_ENABLE (1)
#define FLASH_LP_CFG_DATA_FLASH_PROGRAMMING_ENABLE (0)
#ifdef __cplusplus
}
#endif
#endif /* R_FLASH_LP_CFG_H_ */

13
ports/renesas-ra/boards/RA4M1_CLICKER/ra_cfg/fsp_cfg/r_ioport_cfg.h
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@ -1,13 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_IOPORT_CFG_H_
#define R_IOPORT_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define IOPORT_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#ifdef __cplusplus
}
#endif
#endif /* R_IOPORT_CFG_H_ */

14
ports/renesas-ra/boards/RA4M1_CLICKER/ra_cfg/fsp_cfg/r_lpm_cfg.h
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@ -1,14 +0,0 @@
/* generated configuration header file - do not edit */
#ifndef R_LPM_CFG_H_
#define R_LPM_CFG_H_
#ifdef __cplusplus
extern "C" {
#endif
#define LPM_CFG_PARAM_CHECKING_ENABLE (BSP_CFG_PARAM_CHECKING_ENABLE)
#define LPM_CFG_STANDBY_LIMIT (0)
#ifdef __cplusplus
}
#endif
#endif /* R_LPM_CFG_H_ */

0
ports/renesas-ra/boards/EK_RA4M1/ra_cfg/fsp_cfg/r_adc_cfg.h → ports/renesas-ra/fsp_cfg/r_adc_cfg.h
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0
ports/renesas-ra/boards/EK_RA6M1/ra_cfg/fsp_cfg/r_flash_hp_cfg.h → ports/renesas-ra/fsp_cfg/r_flash_hp_cfg.h
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0
ports/renesas-ra/boards/EK_RA4M1/ra_cfg/fsp_cfg/r_flash_lp_cfg.h → ports/renesas-ra/fsp_cfg/r_flash_lp_cfg.h
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0
ports/renesas-ra/boards/EK_RA4M1/ra_cfg/fsp_cfg/r_ioport_cfg.h → ports/renesas-ra/fsp_cfg/r_ioport_cfg.h
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0
ports/renesas-ra/boards/EK_RA4M1/ra_cfg/fsp_cfg/r_lpm_cfg.h → ports/renesas-ra/fsp_cfg/r_lpm_cfg.h
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