mimxrt/boards/make-pins.py: Update to use tools/boardgen.py.

Minor change to remove support for using numeric IDs for machine.Pin.  This
was previously based on the index of the pin in the board csv, but this is
different (and incompatible) with other ports.

This work was funded through GitHub Sponsors.

Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
pull/12211/head
Jim Mussared 2023-08-16 16:45:09 +10:00 zatwierdzone przez Damien George
rodzic 4d568a5bd7
commit c0b64a3f23
22 zmienionych plików z 256 dodań i 406 usunięć

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@ -61,7 +61,6 @@ AF_FILE = boards/$(MCU_SERIES)_af.csv
BOARD_PINS = $(BOARD_DIR)/pins.csv
PREFIX_FILE = boards/mimxrt_prefix.c
GEN_FLEXRAM_CONFIG_SRC = $(BUILD)/flexram_config.s
GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
GEN_PINS_SRC = $(BUILD)/pins_gen.c

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@ -170,10 +170,6 @@
#define ENET_PHY_ADDRESS (2)
#define ENET_PHY_OPS phyksz8081_ops
// Etherner PIN definitions
#define ENET_RESET_PIN &pin_GPIO_AD_B0_04
#define ENET_INT_PIN &pin_GPIO_AD_B1_06
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 1, 0xB0E9u }, \
{ IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0, 0xB0E9u }, \

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@ -38,3 +38,12 @@ SD_RX,GPIO_AD_B1_05
SCK_TX,GPIO_AD_B1_01
WS_TX,GPIO_AD_B1_02
SD_TX,GPIO_AD_B1_03
-ENET_RESET,-GPIO_AD_B0_04
-ENET_INT,-GPIO_AD_B1_06
-SD_CMD,-GPIO_SD_B0_02
-SD_CLK,-GPIO_SD_B0_03
-SD_CD,-GPIO_SD_B0_06
-SD_DATA0,-GPIO_SD_B0_04
-SD_DATA1,-GPIO_SD_B0_05
-SD_DATA2,-GPIO_SD_B0_00
-SD_DATA3,-GPIO_SD_B0_01

1 D0 GPIO_AD_B1_09
38 SCK_TX GPIO_AD_B1_01
39 WS_TX GPIO_AD_B1_02
40 SD_TX GPIO_AD_B1_03
41 -ENET_RESET -GPIO_AD_B0_04
42 -ENET_INT -GPIO_AD_B1_06
43 -SD_CMD -GPIO_SD_B0_02
44 -SD_CLK -GPIO_SD_B0_03
45 -SD_CD -GPIO_SD_B0_06
46 -SD_DATA0 -GPIO_SD_B0_04
47 -SD_DATA1 -GPIO_SD_B0_05
48 -SD_DATA2 -GPIO_SD_B0_00
49 -SD_DATA3 -GPIO_SD_B0_01

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@ -160,10 +160,6 @@
#define ENET_PHY_ADDRESS (2)
#define ENET_PHY_OPS phyksz8081_ops
// Etherner PIN definitions
#define ENET_RESET_PIN &pin_GPIO_AD_B0_09
#define ENET_INT_PIN &pin_GPIO_AD_B0_10
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
{ IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

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@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
SCK_TX,GPIO_AD_B1_14
WS_TX,GPIO_AD_B1_15
SD_TX,GPIO_AD_B1_13
-ENET_RESET,-GPIO_AD_B0_09
-ENET_INT,-GPIO_AD_B0_10
-SD_CMD,-GPIO_SD_B0_00
-SD_CLK,-GPIO_SD_B0_01
-SD_CD_B,-GPIO_B1_12
-SD_DATA0,-GPIO_SD_B0_02
-SD_DATA1,-GPIO_SD_B0_03
-SD_DATA2,-GPIO_SD_B0_04
-SD_DATA3,-GPIO_SD_B0_05

1 D0 GPIO_AD_B1_07
36 SCK_TX GPIO_AD_B1_14
37 WS_TX GPIO_AD_B1_15
38 SD_TX GPIO_AD_B1_13
39 -ENET_RESET -GPIO_AD_B0_09
40 -ENET_INT -GPIO_AD_B0_10
41 -SD_CMD -GPIO_SD_B0_00
42 -SD_CLK -GPIO_SD_B0_01
43 -SD_CD_B -GPIO_B1_12
44 -SD_DATA0 -GPIO_SD_B0_02
45 -SD_DATA1 -GPIO_SD_B0_03
46 -SD_DATA2 -GPIO_SD_B0_04
47 -SD_DATA3 -GPIO_SD_B0_05
48

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@ -158,10 +158,6 @@
#define ENET_PHY_ADDRESS (2)
#define ENET_PHY_OPS phyksz8081_ops
// Etherner PIN definitions
#define ENET_RESET_PIN &pin_GPIO_AD_B0_09
#define ENET_INT_PIN &pin_GPIO_AD_B0_10
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
{ IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

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@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
SCK_TX,GPIO_AD_B1_14
WS_TX,GPIO_AD_B1_15
SD_TX,GPIO_AD_B1_13
-ENET_RESET,-GPIO_AD_B0_09
-ENET_INT,-GPIO_AD_B0_10
-SD_CMD,-GPIO_SD_B0_00
-SD_CLK,-GPIO_SD_B0_01
-SD_CD_B,-GPIO_B1_12
-SD_DATA0,-GPIO_SD_B0_02
-SD_DATA1,-GPIO_SD_B0_03
-SD_DATA2,-GPIO_SD_B0_04
-SD_DATA3,-GPIO_SD_B0_05

1 D0 GPIO_AD_B1_07
36 SCK_TX GPIO_AD_B1_14
37 WS_TX GPIO_AD_B1_15
38 SD_TX GPIO_AD_B1_13
39 -ENET_RESET -GPIO_AD_B0_09
40 -ENET_INT -GPIO_AD_B0_10
41 -SD_CMD -GPIO_SD_B0_00
42 -SD_CLK -GPIO_SD_B0_01
43 -SD_CD_B -GPIO_B1_12
44 -SD_DATA0 -GPIO_SD_B0_02
45 -SD_DATA1 -GPIO_SD_B0_03
46 -SD_DATA2 -GPIO_SD_B0_04
47 -SD_DATA3 -GPIO_SD_B0_05
48

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@ -158,10 +158,6 @@
#define ENET_PHY_ADDRESS (2)
#define ENET_PHY_OPS phyksz8081_ops
// Etherner PIN definitions
#define ENET_RESET_PIN &pin_GPIO_AD_B0_09
#define ENET_INT_PIN &pin_GPIO_AD_B0_10
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
{ IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

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@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
SCK_TX,GPIO_AD_B1_14
WS_TX,GPIO_AD_B1_15
SD_TX,GPIO_AD_B1_13
-ENET_RESET,-GPIO_AD_B0_09
-ENET_INT,-GPIO_AD_B0_10
-SD_CMD,-GPIO_SD_B0_00
-SD_CLK,-GPIO_SD_B0_01
-SD_CD_B,-GPIO_B1_12
-SD_DATA0,-GPIO_SD_B0_02
-SD_DATA1,-GPIO_SD_B0_03
-SD_DATA2,-GPIO_SD_B0_04
-SD_DATA3,-GPIO_SD_B0_05

1 D0 GPIO_AD_B1_07
36 SCK_TX GPIO_AD_B1_14
37 WS_TX GPIO_AD_B1_15
38 SD_TX GPIO_AD_B1_13
39 -ENET_RESET -GPIO_AD_B0_09
40 -ENET_INT -GPIO_AD_B0_10
41 -SD_CMD -GPIO_SD_B0_00
42 -SD_CLK -GPIO_SD_B0_01
43 -SD_CD_B -GPIO_B1_12
44 -SD_DATA0 -GPIO_SD_B0_02
45 -SD_DATA1 -GPIO_SD_B0_03
46 -SD_DATA2 -GPIO_SD_B0_04
47 -SD_DATA3 -GPIO_SD_B0_05
48

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@ -155,10 +155,6 @@
#define ENET_PHY KSZ8081
#define ENET_PHY_OPS phyksz8081_ops
// 10/100 Ethernet PIN definitions
#define ENET_RESET_PIN &pin_GPIO_LPSR_12
#define ENET_INT_PIN &pin_GPIO_AD_12
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_DISP_B2_06_ENET_RX_DATA00, 0, 0x06u }, \
{ IOMUXC_GPIO_DISP_B2_07_ENET_RX_DATA01, 0, 0x06u }, \

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@ -57,3 +57,13 @@ SD_RX,GPIO_AD_20
SCK_TX,GPIO_AD_22
WS_TX,GPIO_AD_23
SD_TX,GPIO_AD_21
-ENET_RESET,-GPIO_LPSR_12
-ENET_INT,-GPIO_AD_12
-ENET_1_RESET,-GPIO_DISP_B2_13
-SD_CMD,-GPIO_SD_B1_00
-SD_CLK,-GPIO_SD_B1_01
-SD_DATA0,-GPIO_SD_B1_02
-SD_DATA1,-GPIO_SD_B1_03
-SD_DATA2,-GPIO_SD_B1_04
-SD_DATA3,-GPIO_SD_B1_05

1 D0 GPIO_DISP_B2_11
57 SCK_TX GPIO_AD_22
58 WS_TX GPIO_AD_23
59 SD_TX GPIO_AD_21
60 -ENET_RESET -GPIO_LPSR_12
61 -ENET_INT -GPIO_AD_12
62 -ENET_1_RESET -GPIO_DISP_B2_13
63 -SD_CMD -GPIO_SD_B1_00
64 -SD_CLK -GPIO_SD_B1_01
65 -SD_DATA0 -GPIO_SD_B1_02
66 -SD_DATA1 -GPIO_SD_B1_03
67 -SD_DATA2 -GPIO_SD_B1_04
68 -SD_DATA3 -GPIO_SD_B1_05
69

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@ -127,11 +127,6 @@
#define ENET_PHY_OPS phylan8720_ops
#define ENET_TX_CLK_OUTPUT false
// Etherner PIN definitions
// No reset and interrupt pin by intention
#define ENET_RESET_PIN NULL
#define ENET_INT_PIN NULL
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
{ IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

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@ -9,7 +9,7 @@ J3_11,GPIO_B1_07
J3_12,GPIO_B1_09
J3_13,GPIO_B1_10
J3_14,GPIO_AD_B0_14
J3_15,GPO_AD_B0_15
J3_15,GPIO_AD_B0_15
J3_16,GPIO_AD_B1_00
J3_17,GPIO_AD_B1_01
J3_19,GPIO_AD_B0_13
@ -67,3 +67,13 @@ SD_RX,GPIO_AD_B1_12
SCK_TX,GPIO_AD_B1_14
WS_TX,GPIO_AD_B1_15
SD_TX,GPIO_AD_B1_13
# No ethernet reset and interrupt pin by intention
-SD_CMD,-GPIO_SD_B0_00
-SD_CLK,-GPIO_SD_B0_01
-SD_CD_B,-GPIO_B1_12
-SD_DATA0,-GPIO_SD_B0_02
-SD_DATA1,-GPIO_SD_B0_03
-SD_DATA2,-GPIO_SD_B0_04
-SD_DATA3,-GPIO_SD_B0_05

Nie można renderować tego pliku, ponieważ ma nieprawidłową liczbę pól w wierszu 71.

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@ -125,10 +125,6 @@
#define ENET_PHY_ADDRESS (0)
#define ENET_PHY_OPS phydp83825_ops
// Ethernet PIN definitions
#define ENET_RESET_PIN &pin_GPIO_B0_14
#define ENET_INT_PIN &pin_GPIO_B0_15
#define IOMUX_TABLE_ENET \
{ IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
{ IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

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@ -88,3 +88,12 @@ SD_RX,GPIO_B1_00
SCK_TX,GPIO_EMC_06
WS_TX,GPIO_EMC_05
SD_TX,GPIO_EMC_04
-ENET_RESET,-GPIO_B0_14
-ENET_INT,-GPIO_B0_15
-SD_CMD,-GPIO_SD_B0_00
-SD_CLK,-GPIO_SD_B0_01
-SD_DATA0,-GPIO_SD_B0_02
-SD_DATA1,-GPIO_SD_B0_03
-SD_DATA2,-GPIO_SD_B0_04
-SD_DATA3,-GPIO_SD_B0_05

1 D0 GPIO_AD_B0_03
88 SCK_TX GPIO_EMC_06
89 WS_TX GPIO_EMC_05
90 SD_TX GPIO_EMC_04
91 -ENET_RESET -GPIO_B0_14
92 -ENET_INT -GPIO_B0_15
93 -SD_CMD -GPIO_SD_B0_00
94 -SD_CLK -GPIO_SD_B0_01
95 -SD_DATA0 -GPIO_SD_B0_02
96 -SD_DATA1 -GPIO_SD_B0_03
97 -SD_DATA2 -GPIO_SD_B0_04
98 -SD_DATA3 -GPIO_SD_B0_05
99

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@ -1,19 +1,15 @@
#!/usr/bin/env python
"""Creates the pin file for the MIMXRT10xx."""
from __future__ import print_function
import argparse
import sys
import csv
from collections import defaultdict
import os
import re
import sys
SUPPORTED_AFS = {"GPIO", "USDHC", "FLEXPWM", "TMR"}
MAX_AF = 10 # AF0 .. AF9
ADC_COL = 11
sys.path.insert(0, os.path.join(os.path.dirname(__file__), "../../../tools"))
import boardgen
regexes = [
IOMUX_REGEXS = [
r"IOMUXC_(?P<pin>GPIO_SD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
r"IOMUXC_(?P<pin>GPIO_AD_B\d_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
r"IOMUXC_(?P<pin>GPIO_EMC_\d\d)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
@ -30,387 +26,197 @@ regexes = [
r"IOMUXC_(?P<pin>GPIO_SNVS_\d\d_DIG)_(?P<function>\w+) (?P<muxRegister>\w+), (?P<muxMode>\w+), (?P<inputRegister>\w+), (?P<inputDaisy>\w+), (?P<configRegister>\w+)",
]
def parse_pad(pad_str):
"""Parses a string and returns a (port, gpio_bit) tuple."""
if len(pad_str) < 4:
raise ValueError("Expecting pad name to be at least 4 characters")
if pad_str[:4] != "GPIO":
raise ValueError("Expecting pad name to start with GPIO")
return pad_str
SUPPORTED_AF_FNS = {"GPIO", "USDHC", "FLEXPWM", "TMR"}
def af_supported(af_str):
for supported_af in SUPPORTED_AFS:
if af_str.startswith(supported_af):
return True
else:
return False
class MimxrtPin(boardgen.Pin):
def __init__(self, cpu_pin_name):
super().__init__(cpu_pin_name)
self._afs = []
self._adc_fns = []
class Pin(object):
"""Holds the information associated with a pin."""
# Called for each AF defined in the csv file for this pin.
def add_af(self, af_idx, af_name, af):
# mimxrt-specific: Any pin in the af.csv is implicitly part of the board
# pins.csv and will therefore be in the Pin.cpu dict. This is
# equivalent to adding `,CPUNAME` to the board.csv for every pin in the
# af.csv.
self._available = True
def __init__(self, pad, gpio, pin, idx=0):
self.idx = idx
self.name = pad
self.pad = pad
self.gpio = gpio
self.pin = pin
self.alt_fn = []
self.adc_fns = []
self.board_pin = False
if af_name == "ALT5":
m = re.match("GPIO([0-9]+)_IO([0-9]+)", af)
self._port = int(m.group(1))
self._pin = int(m.group(2))
def set_is_board_pin(self):
self.board_pin = True
if af_name.startswith("ALT"):
instance = af.split("_")[0]
fn = re.match("^([A-Z][A-Z0-9]+[A-Z])[0-9]*$", instance).group(1)
if fn not in SUPPORTED_AF_FNS:
return
iomux_config = self._generator._iomux_pin_config[self.name()]
input_reg = iomux_config[af_idx]["inputRegister"].strip("U")
input_daisy = int(iomux_config[af_idx]["inputDaisy"].strip("U"), 16)
self._afs.append((af_idx, input_reg, input_daisy, instance, fn, af))
def is_board_pin(self):
return self.board_pin
elif af_name == "ADC":
adc_regex = r"ADC(?P<instance>\d*)_IN(?P<channel>\d*)"
lpadc_regex = r"ADC(?P<instance>\d*)_CH(?P<channel>\d*)" # LPADC for MIMXRT11xx chips
def parse_adc(self, adc_str):
adc_regex = r"ADC(?P<instance>\d*)_IN(?P<channel>\d*)"
lpadc_regex = r"ADC(?P<instance>\d*)_CH(?P<channel>\d*)" # LPADC for MIMXRT11xx chips
matches = re.finditer(adc_regex, adc_str, re.MULTILINE)
for match in matches:
self.adc_fns.append(
AdcFunction(instance=match.group("instance"), channel=match.group("channel"))
)
matches = re.finditer(lpadc_regex, adc_str, re.MULTILINE)
for match in matches:
self.adc_fns.append(
AdcFunction(
peripheral="LPADC",
instance=match.group("instance"),
channel=match.group("channel"),
matches = re.finditer(adc_regex, af, re.MULTILINE)
for match in matches:
self._adc_fns.append(
(int(match.group("instance")), int(match.group("channel")), "ADC")
)
)
def parse_af(self, af_idx, af_strs_in):
pass
matches = re.finditer(lpadc_regex, af, re.MULTILINE)
for match in matches:
self._adc_fns.append(
(int(match.group("instance")), int(match.group("channel")), "LPADC")
)
def add_af(self, af):
self.alt_fn.append(af)
def print_pin_af(self, out_source):
if self.alt_fn:
print(
"static const machine_pin_af_obj_t pin_{0}_af[{1}] = {{".format(
self.name, len(self.alt_fn)
),
file=out_source,
)
for af in self.alt_fn:
af.print(out_source)
print("};", file=out_source)
# Use the PIN() macro defined in samd_prefix.c for defining the pin
# objects.
def definition(self):
if "_LPSR_" in self.name():
macro = "PIN_LPSR"
elif (
"_SNVS_" in self.name()
or self.name().startswith("PMIC_")
or self.name().startswith("WAKEUP")
):
macro = "PIN_SNVS"
else:
raise ValueError("Pin '{}' has no alternative functions".format(self.name))
macro = "PIN"
def print_pin_adc(self, out_source):
if self.adc_fns:
print(
"static const machine_pin_adc_obj_t pin_{0}_adc[{1}] = {{".format(
self.name, len(self.adc_fns)
),
file=out_source,
)
for adc_fn in self.adc_fns:
adc_fn.print(out_source)
print("};", file=out_source)
def print(self, out_source):
if self.alt_fn:
self.print_pin_af(out_source)
self.print_pin_adc(out_source)
options = {
"GPIO_LPSR_00": "PIN_LPSR",
"GPIO_LPSR_01": "PIN_LPSR",
"GPIO_LPSR_02": "PIN_LPSR",
"GPIO_LPSR_03": "PIN_LPSR",
"GPIO_LPSR_04": "PIN_LPSR",
"GPIO_LPSR_05": "PIN_LPSR",
"GPIO_LPSR_06": "PIN_LPSR",
"GPIO_LPSR_07": "PIN_LPSR",
"GPIO_LPSR_08": "PIN_LPSR",
"GPIO_LPSR_09": "PIN_LPSR",
"GPIO_LPSR_10": "PIN_LPSR",
"GPIO_LPSR_11": "PIN_LPSR",
"GPIO_LPSR_12": "PIN_LPSR",
"GPIO_LPSR_13": "PIN_LPSR",
"GPIO_LPSR_14": "PIN_LPSR",
"GPIO_LPSR_15": "PIN_LPSR",
"GPIO_SNVS_00_DIG": "PIN_SNVS",
"GPIO_SNVS_01_DIG": "PIN_SNVS",
"GPIO_SNVS_02_DIG": "PIN_SNVS",
"GPIO_SNVS_03_DIG": "PIN_SNVS",
"GPIO_SNVS_04_DIG": "PIN_SNVS",
"GPIO_SNVS_05_DIG": "PIN_SNVS",
"GPIO_SNVS_06_DIG": "PIN_SNVS",
"GPIO_SNVS_07_DIG": "PIN_SNVS",
"GPIO_SNVS_08_DIG": "PIN_SNVS",
"GPIO_SNVS_09_DIG": "PIN_SNVS",
"WAKEUP": "PIN_SNVS",
"WAKEUP_DIG": "PIN_SNVS",
"PMIC_ON_REQ": "PIN_SNVS",
"PMIC_ON_REQ_DIG": "PIN_SNVS",
"PMIC_STBY_REQ": "PIN_SNVS",
"PMIC_STBY_REQ_DIG": "PIN_SNVS",
}
print(
"const machine_pin_obj_t pin_{0} = {1}({0}, {2}, {3}, pin_{0}_af, {4}, {5});\n".format(
self.name,
options.get(self.name, "PIN"),
self.gpio,
int(self.pin),
len(self.adc_fns),
"pin_{}_adc".format(self.name) if self.adc_fns else "NULL",
),
file=out_source,
)
else:
raise ValueError("Pin '{}' has no alternative functions".format(self.name))
def print_header(self, out_header):
pass
class AdcFunction(object):
"""Holds the information associated with a pins ADC function."""
def __init__(self, instance, channel, peripheral="ADC"):
self.peripheral = peripheral
self.instance = instance
self.channel = channel
def print(self, out_source):
"""Prints the C representation of this AF."""
print(f" PIN_ADC({self.peripheral}{self.instance}, {self.channel}),", file=out_source)
class AlternateFunction(object):
"""Holds the information associated with a pins alternate function."""
def __init__(self, idx, input_reg, input_daisy, af_str):
self.idx = idx
self.af_str = af_str
self.input_reg = input_reg
self.input_daisy = input_daisy
self.instance = self.af_str.split("_")[0]
def print(self, out_source):
"""Prints the C representation of this AF."""
print(
" PIN_AF({0}, PIN_AF_MODE_ALT{1}, {2}, {3}, {4}, {5}),".format(
self.af_str, self.idx, self.input_daisy, self.instance, self.input_reg, "0x10B0U"
),
file=out_source,
# PIN(_name, _gpio, _pin, _af_list, _adc_list_len, _adc_list)
return "{:s}({:s}, GPIO{:d}, {:d}, pin_{:s}_af, {:d}, {:s})".format(
macro,
self.name(),
self._port,
self._pin,
self.name(),
len(self._adc_fns),
"pin_{:s}_adc".format(self.name()) if self._adc_fns else "NULL",
)
# This will be called at the start of the output (after the prefix) for
# each pin. Use it to emit the af and adc objects.
def print_source(self, out_source):
print(
"static const machine_pin_af_obj_t pin_{:s}_af[] = {{".format(self.name()),
file=out_source,
)
for af_idx, input_reg, input_daisy, instance, _fn, af in self._afs:
print(
" PIN_AF({:s}, PIN_AF_MODE_ALT{:d}, {:d}, {:s}, {:s}, {:s}),".format(
af, af_idx, input_daisy, instance, input_reg, "0x10B0U"
),
file=out_source,
)
print("};", file=out_source)
print(file=out_source)
class NamedPin(object):
def __init__(self, name, pad, idx):
self.name = name
self.pad = pad
self.idx = idx
if self._adc_fns:
print(
"static const machine_pin_adc_obj_t pin_{:s}_adc[] = {{".format(self.name()),
file=out_source,
)
for instance, channel, peripheral in self._adc_fns:
print(
" PIN_ADC({:s}{:d}, {:d}),".format(peripheral, instance, channel),
file=out_source,
)
print("};", file=out_source)
# mimxrt cpu names must be "GPIO_<funcs>_<num>", with zero-prefixed two-digit <num>.
@staticmethod
def validate_cpu_pin_name(cpu_pin_name):
boardgen.Pin.validate_cpu_pin_name(cpu_pin_name)
if not re.match(
"^((GPIO_((SNVS|EMC|LPSR|DISP)_)?([AS]D_)?(B[012]_)?[0-9][0-9])|WAKEUP|PMIC_(ON|STBY)_REQ)(_DIG)?$",
cpu_pin_name,
):
raise boardgen.PinGeneratorError("Invalid cpu pin name '{}'".format(cpu_pin_name))
class Pins(object):
class MimxrtPinGenerator(boardgen.PinGenerator):
def __init__(self):
self.cpu_pins = []
self.board_pins = []
# Use custom pin type above, and also enable the --af-csv argument so
# that add_af gets called on each pin.
super().__init__(
pin_type=MimxrtPin,
enable_af=True,
)
self._iomux_pin_config = {}
def find_pin_by_num(self, pin_num):
for pin in self.cpu_pins:
if pin.pin_num == pin_num:
return pin
def find_pin_by_name(self, pad):
for pin in self.cpu_pins:
if pin.pad == pad:
return pin
def parse_board_file(self, filename):
with open(filename, "r") as csvfile:
rows = csv.reader(csvfile)
for row in rows:
if len(row) == 0 or row[0].startswith("#"):
# Skip empty lines, and lines starting with "#"
continue
if len(row) != 2:
raise ValueError("Expecting two entries in a row")
pin = self.find_pin_by_name(row[1])
if pin and row[0]: # Only add board pins that have a name
self.board_pins.append(NamedPin(row[0], pin.pad, pin.idx))
def parse_af_file(self, filename, iomux_filename):
iomux_pin_config = dict()
# Load the iomux configuration from fsl_iomuxc.h.
def load_iomux_header(self, iomux_filename):
with open(iomux_filename, "r") as ipt:
input_str = ipt.read()
for regex in regexes:
for regex in IOMUX_REGEXS:
matches = re.finditer(regex, input_str, re.MULTILINE)
for match in matches:
if match.group("pin") not in iomux_pin_config:
iomux_pin_config[match.group("pin")] = {
if match.group("pin") not in self._iomux_pin_config:
self._iomux_pin_config[match.group("pin")] = {
int((match.groupdict()["muxMode"].strip("U")), 16): match.groupdict()
}
else:
iomux_pin_config[match.group("pin")][
self._iomux_pin_config[match.group("pin")][
int((match.groupdict()["muxMode"].strip("U")), 16)
] = match.groupdict()
with open(filename, "r") as csvfile:
rows = csv.reader(csvfile)
header = next(rows)
# Extract indexes from header row
pad_col = header.index("Pad")
adc_col = header.index("ADC")
#
for idx, row in enumerate(rows):
pad = row[pad_col]
gpio, pin = row[6].split("_")
pin_number = pin.lstrip("IO")
pin = Pin(pad, gpio, pin_number, idx=idx)
# Also load the iomux header.
def load_inputs(self, out_source):
if self.args.iomux_header:
print("// --iomux-header {:s}".format(self.args.iomux_header), file=out_source)
self.load_iomux_header(self.args.iomux_header)
# Parse alternate functions
af_idx = 0
for af_idx, af in enumerate(row[(pad_col + 1) : adc_col]):
if af and af_supported(af):
pin.add_af(
AlternateFunction(
af_idx,
iomux_pin_config[pin.name][af_idx]["inputRegister"].strip("U"),
int(
iomux_pin_config[pin.name][af_idx]["inputDaisy"].strip("U"), 16
),
af,
super().load_inputs(out_source)
# Provide a macro for each supported (pin,af) that can be used to
# initialise a struct containing a machine_pin_obj_t* and the
# corresponding af for that pin. e.g. A mimxrt_sdcard_pin_t instance can
# be initialised with GPIO_SD_B0_00_USDHC1_CMD which tells it how to get
# the CMD pin of the USDHC1 function on the GPIO_SD_B0_00 pin.
def print_module_instances(self, out_header):
print(file=out_header)
for match_fn in ("USDHC", "FLEXPWM", "TMR"):
module_instances = defaultdict(list)
for pin in self.available_pins():
for i, (_af_idx, _input_reg, _input_daisy, instance, fn, af) in enumerate(
pin._afs
):
if fn == match_fn:
module_instances[instance].append(
"#define {:s}_{:s} pin_{:s}, {:d}".format(
pin.name(), af, pin.name(), i
)
)
for k, v in module_instances.items():
print("// {:s}".format(k), file=out_header)
print("#define {:s}_AVAIL (1)".format(k), file=out_header)
if match_fn == "FLEXPWM":
print("#define {:s} {:s}".format(k, k[-4:]), file=out_header)
for i in v:
print(i, file=out_header)
pin.parse_adc(row[adc_col])
self.cpu_pins.append(pin)
@staticmethod
def print_named(label, pins, out_source):
print("", file=out_source)
print(
"STATIC const mp_rom_map_elem_t pin_{:s}_pins_locals_dict_table[] = {{".format(label),
file=out_source,
)
for pin in pins:
(
print(
" {{ MP_ROM_QSTR(MP_QSTR_{}), MP_ROM_PTR(&pin_{}) }},".format(
pin.name, pin.pad
),
file=out_source,
),
)
print("};", file=out_source)
print(
"MP_DEFINE_CONST_DICT(machine_pin_{:s}_pins_locals_dict, pin_{:s}_pins_locals_dict_table);".format(
label, label
),
file=out_source,
)
def print(self, out_source):
# Print Pin Object declarations
for pin in self.cpu_pins:
pin.print(out_source)
print("", file=out_source)
print("const machine_pin_obj_t* machine_pin_board_pins [] = {", file=out_source)
for pin in self.board_pins:
print(" &pin_{},".format(pin.pad), file=out_source)
print("};", file=out_source)
print(
"const uint32_t num_board_pins = {:d};".format(len(self.board_pins)), file=out_source
)
# Print Pin mapping dictionaries
self.print_named("cpu", self.cpu_pins, out_source)
self.print_named("board", self.board_pins, out_source)
print("", file=out_source)
# Override to also print the module instances.
def print_header(self, out_header):
for pin in self.cpu_pins:
print("extern const machine_pin_obj_t pin_{};".format(pin.name), file=out_header)
print("extern const machine_pin_obj_t* machine_pin_board_pins[];", file=out_header)
print("extern const uint32_t num_board_pins;", file=out_header)
print("extern const mp_obj_dict_t machine_pin_cpu_pins_locals_dict;", file=out_header)
print("extern const mp_obj_dict_t machine_pin_board_pins_locals_dict;", file=out_header)
print("", file=out_header)
print("// Defines", file=out_header)
module_instance_factory(self.cpu_pins, out_header, "USDHC")
module_instance_factory(self.cpu_pins, out_header, "FLEXPWM")
module_instance_factory(self.cpu_pins, out_header, "TMR")
super().print_header(out_header)
self.print_module_instances(out_header)
# Override the default implementation just to change the default arguments
# (extra header row, skip first column).
def parse_af_csv(self, filename):
return super().parse_af_csv(filename, header_rows=1, pin_col=0, af_col=1)
def module_instance_factory(pins, out_header, name):
module_pin = filter(lambda p: any([af for af in p.alt_fn if name in af.af_str]), pins)
module_instances = dict()
for pin in module_pin:
for idx, alt_fn in enumerate(pin.alt_fn):
if name in alt_fn.instance:
format_string = "#define {0}_{1} &pin_{0}, {2}"
if alt_fn.instance not in module_instances:
module_instances[alt_fn.instance] = [
format_string.format(pin.name, alt_fn.af_str, idx)
]
else:
module_instances[alt_fn.instance].append(
format_string.format(pin.name, alt_fn.af_str, idx)
)
for k, v in module_instances.items():
print(f"// {k}", file=out_header)
print(f"#define {k}_AVAIL (1)", file=out_header)
if name == "FLEXPWM":
print(f"#define {k} {k[-4:]}", file=out_header)
for i in v:
print(i, file=out_header)
def main():
parser = argparse.ArgumentParser(description="Generate board specific pin file")
parser.add_argument("--board-csv")
parser.add_argument("--af-csv")
parser.add_argument("--prefix")
parser.add_argument("--iomux-header")
parser.add_argument("--output-source")
parser.add_argument("--output-header")
args = parser.parse_args()
pins = Pins()
with open(args.output_source, "w") as out_source:
if args.af_csv:
print("// --af {:s}".format(args.af_csv), file=out_source)
pins.parse_af_file(args.af_csv, args.iomux_header)
if args.board_csv:
print("// --board {:s}".format(args.board_csv), file=out_source)
pins.parse_board_file(args.board_csv)
if args.output_header:
print("// --hdr {:s}".format(args.output_header), file=out_source)
if args.prefix:
print("// --prefix {:s}".format(args.prefix), file=out_source)
with open(args.prefix, "r") as prefix_file:
print(prefix_file.read(), file=out_source)
pins.print(out_source)
with open(args.output_header, "w") as out_header:
pins.print_header(out_header)
# We need to know the mcu to emit the correct AF list.
def extra_args(self, parser):
parser.add_argument("--iomux-header")
if __name__ == "__main__":
main()
MimxrtPinGenerator().main()

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@ -30,7 +30,7 @@
.pin = (uint32_t)(_pin), \
.muxRegister = (uint32_t)&(IOMUXC->SW_MUX_CTL_PAD[kIOMUXC_SW_MUX_CTL_PAD_##_name]), \
.configRegister = (uint32_t)&(IOMUXC->SW_PAD_CTL_PAD[kIOMUXC_SW_PAD_CTL_PAD_##_name]), \
.af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
.af_list_len = MP_ARRAY_SIZE(_af_list), \
.adc_list_len = (_adc_list_len), \
.af_list = (_af_list), \
.adc_list = (_adc_list), \
@ -44,7 +44,7 @@
.pin = (uint32_t)(_pin), \
.muxRegister = (uint32_t)&(IOMUXC_LPSR->SW_MUX_CTL_PAD[kIOMUXC_LPSR_SW_MUX_CTL_PAD_##_name]), \
.configRegister = (uint32_t)&(IOMUXC_LPSR->SW_PAD_CTL_PAD[kIOMUXC_LPSR_SW_PAD_CTL_PAD_##_name]), \
.af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
.af_list_len = MP_ARRAY_SIZE(_af_list), \
.adc_list_len = (_adc_list_len), \
.af_list = (_af_list), \
.adc_list = (_adc_list), \
@ -58,7 +58,7 @@
.pin = (uint32_t)(_pin), \
.muxRegister = (uint32_t)&(IOMUXC_SNVS->SW_MUX_CTL_PAD_##_name), \
.configRegister = (uint32_t)&(IOMUXC_SNVS->SW_PAD_CTL_PAD_##_name), \
.af_list_len = (uint8_t)(sizeof((_af_list)) / sizeof(machine_pin_af_obj_t)), \
.af_list_len = MP_ARRAY_SIZE(_af_list), \
.adc_list_len = (_adc_list_len), \
.af_list = (_af_list), \
.adc_list = (_adc_list), \

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@ -365,7 +365,15 @@ void eth_init_0(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
uint32_t source_clock = eth_clock_init(eth_id, phy_clock);
eth_gpio_init(iomux_table_enet, ARRAY_SIZE(iomux_table_enet), ENET_RESET_PIN, ENET_INT_PIN);
const machine_pin_obj_t *reset_pin = NULL;
#if defined(pin_ENET_RESET)
reset_pin = pin_ENET_RESET;
#endif
const machine_pin_obj_t *int_pin = NULL;
#if defined(pin_ENET_INT)
int_pin = pin_ENET_INT;
#endif
eth_gpio_init(iomux_table_enet, ARRAY_SIZE(iomux_table_enet), reset_pin, int_pin);
mp_hal_get_mac(0, hw_addr);
@ -411,7 +419,15 @@ void eth_init_1(eth_t *self, int eth_id, const phy_operations_t *phy_ops, int ph
uint32_t source_clock = eth_clock_init(eth_id, phy_clock);
eth_gpio_init(iomux_table_enet_1, ARRAY_SIZE(iomux_table_enet_1), ENET_1_RESET_PIN, ENET_1_INT_PIN);
const machine_pin_obj_t *reset_pin = NULL;
#if defined(pin_ENET_1_INT)
reset_pin = pin_ENET_1_RESET;
#endif
const machine_pin_obj_t *int_pin = NULL;
#if defined(pin_ENET_1_INT)
int_pin = pin_ENET_1_INT;
#endif
eth_gpio_init(iomux_table_enet_1, ARRAY_SIZE(iomux_table_enet_1), reset_pin, int_pin);
#if defined MIMXRT117x_SERIES
NVIC_SetPriority(ENET_1G_MAC0_Tx_Rx_1_IRQn, IRQ_PRI_PENDSV);

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@ -34,13 +34,13 @@
#if defined(MICROPY_HW_LED1_PIN)
const machine_led_obj_t machine_led_obj[] = {
{ .base = {&machine_led_type}, .led_id = 1U, .led_pin = &MICROPY_HW_LED1_PIN, },
{ .base = {&machine_led_type}, .led_id = 1U, .led_pin = MICROPY_HW_LED1_PIN, },
#if defined(MICROPY_HW_LED2_PIN)
{ .base = {&machine_led_type}, .led_id = 2U, .led_pin = &MICROPY_HW_LED2_PIN, },
{ .base = {&machine_led_type}, .led_id = 2U, .led_pin = MICROPY_HW_LED2_PIN, },
#if defined(MICROPY_HW_LED3_PIN)
{ .base = {&machine_led_type}, .led_id = 3U, .led_pin = &MICROPY_HW_LED3_PIN, },
{ .base = {&machine_led_type}, .led_id = 3U, .led_pin = MICROPY_HW_LED3_PIN, },
#if defined(MICROPY_HW_LED4_PIN)
{ .base = {&machine_led_type}, .led_id = 4U, .led_pin = &MICROPY_HW_LED4_PIN, },
{ .base = {&machine_led_type}, .led_id = 4U, .led_pin = MICROPY_HW_LED4_PIN, },
#endif
#endif
#endif

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@ -191,8 +191,9 @@ STATIC const machine_pin_af_obj_t *af_name_decode_qtmr(const machine_pin_af_obj_
#endif
STATIC bool is_board_pin(const machine_pin_obj_t *pin) {
for (int i = 0; i < num_board_pins; i++) {
if (pin == machine_pin_board_pins[i]) {
const mp_map_t *board_map = &machine_pin_board_pins_locals_dict.map;
for (uint i = 0; i < board_map->alloc; i++) {
if (pin == MP_OBJ_TO_PTR(board_map->table[i].value)) {
return true;
}
}

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@ -152,14 +152,6 @@ const machine_pin_obj_t *pin_find(mp_obj_t user_obj) {
return pin_obj;
}
// If pin is SMALL_INT
if (mp_obj_is_small_int(user_obj)) {
uint8_t value = MP_OBJ_SMALL_INT_VALUE(user_obj);
if (value < num_board_pins) {
return machine_pin_board_pins[value];
}
}
// See if the pin name matches a board pin
pin_obj = pin_find_named_pin(&machine_pin_board_pins_locals_dict, user_obj);
if (pin_obj) {

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@ -147,9 +147,6 @@ extern const mp_obj_type_t machine_pin_af_type;
// Include board specific pins
#include "genhdr/pins.h" // pins.h must included at this location
extern const machine_pin_obj_t *machine_pin_board_pins[];
extern const uint32_t num_board_pins;
extern const mp_obj_type_t machine_pin_board_pins_obj_type;
extern const mp_obj_type_t machine_pin_cpu_pins_obj_type;