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mimxrt/boards/MIMXRT1176_clock_config: Fix comments about UART clocks. 

No functional change, and pretty obvious.

Signed-off-by: robert-hh <robert@hammelrath.com>
pull/12377/head
robert-hh 2023-09-06 14:35:44 +02:00 zatwierdzone przez Damien George
rodzic 0701341e7f
commit abb44694d8
1 zmienionych plików z 12 dodań i 12 usunięć
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24
ports/mimxrt/boards/MIMXRT1176_clock_config.c
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@ -382,62 +382,62 @@ void BOARD_BootClockRUN(void) {
rootCfg.div = 1;
CLOCK_SetRootClock(kCLOCK_Root_Can3, &rootCfg);
/* Configure LPUART1 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART1 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART1_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart1, &rootCfg);
/* Configure LPUART2 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART2 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART2_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart2, &rootCfg);
/* Configure LPUART3 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART3 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART3_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart3, &rootCfg);
/* Configure LPUART4 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART4 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART4_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart4, &rootCfg);
/* Configure LPUART5 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART5 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART5_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart5, &rootCfg);
/* Configure LPUART6 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART6 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART6_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart6, &rootCfg);
/* Configure LPUART7 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART7 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART7_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart7, &rootCfg);
/* Configure LPUART8 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART8 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART8_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart8, &rootCfg);
/* Configure LPUART9 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART9 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART9_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart9, &rootCfg);
/* Configure LPUART10 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART10 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART10_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart10, &rootCfg);
/* Configure LPUART11 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART11 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART11_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart11, &rootCfg);
/* Configure LPUART12 using SYS_PLL3_PFD3_CLK */
/* Configure LPUART12 using SYS_PLL2_PFD3_CLK */
rootCfg.mux = kCLOCK_LPUART12_ClockRoot_MuxSysPll2Pfd3;
rootCfg.div = 4;
CLOCK_SetRootClock(kCLOCK_Root_Lpuart12, &rootCfg);