diff --git a/drivers/bus/qspi.h b/drivers/bus/qspi.h index c82796fac5..7dfaaf3d40 100644 --- a/drivers/bus/qspi.h +++ b/drivers/bus/qspi.h @@ -28,7 +28,9 @@ #include "py/mphal.h" -#define MP_SPI_ADDR_IS_32B(addr) (addr & 0xff000000) +#ifndef MICROPY_HW_SPI_ADDR_IS_32BIT +#define MICROPY_HW_SPI_ADDR_IS_32BIT(addr) (addr & 0xff000000) +#endif enum { MP_QSPI_IOCTL_INIT, @@ -57,7 +59,7 @@ typedef struct _mp_soft_qspi_obj_t { extern const mp_qspi_proto_t mp_soft_qspi_proto; static inline uint8_t mp_spi_set_addr_buff(uint8_t *buf, uint32_t addr) { - if (MP_SPI_ADDR_IS_32B(addr)) { + if (MICROPY_HW_SPI_ADDR_IS_32BIT(addr)) { buf[0] = addr >> 24; buf[1] = addr >> 16; buf[2] = addr >> 8; diff --git a/drivers/memory/spiflash.c b/drivers/memory/spiflash.c index bb15bd6252..9f8dc29a73 100644 --- a/drivers/memory/spiflash.c +++ b/drivers/memory/spiflash.c @@ -123,9 +123,9 @@ STATIC void mp_spiflash_read_data(mp_spiflash_t *self, uint32_t addr, size_t len const mp_spiflash_config_t *c = self->config; uint8_t cmd; if (c->bus_kind == MP_SPIFLASH_BUS_SPI) { - cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_READ_32 : CMD_READ; + cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? CMD_READ_32 : CMD_READ; } else { - cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_C4READ_32 : CMD_C4READ; + cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? CMD_C4READ_32 : CMD_C4READ; } mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, len, NULL, dest); } @@ -218,7 +218,7 @@ STATIC int mp_spiflash_erase_block_internal(mp_spiflash_t *self, uint32_t addr) } // erase the sector - uint8_t cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_SEC_ERASE_32 : CMD_SEC_ERASE; + uint8_t cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? CMD_SEC_ERASE_32 : CMD_SEC_ERASE; mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, 0, NULL, NULL); // wait WIP=0 @@ -236,7 +236,7 @@ STATIC int mp_spiflash_write_page(mp_spiflash_t *self, uint32_t addr, size_t len } // write the page - uint8_t cmd = MP_SPI_ADDR_IS_32B(addr) ? CMD_WRITE_32 : CMD_WRITE; + uint8_t cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? CMD_WRITE_32 : CMD_WRITE; mp_spiflash_transfer_cmd_addr_data(self, cmd, addr, len, src, NULL); // wait WIP=0 diff --git a/ports/stm32/qspi.c b/ports/stm32/qspi.c index d32bd4dcf4..04e226697e 100644 --- a/ports/stm32/qspi.c +++ b/ports/stm32/qspi.c @@ -246,7 +246,7 @@ STATIC void qspi_write_cmd_data(void *self_in, uint8_t cmd, size_t len, uint32_t STATIC void qspi_write_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, const uint8_t *src) { (void)self_in; - uint8_t adsize = MP_SPI_ADDR_IS_32B(addr) ? 3 : 2; + uint8_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2; QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag @@ -331,7 +331,7 @@ STATIC uint32_t qspi_read_cmd(void *self_in, uint8_t cmd, size_t len) { STATIC void qspi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) { (void)self_in; - uint8_t adsize = MP_SPI_ADDR_IS_32B(addr) ? 3 : 2; + uint8_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2; QUADSPI->FCR = QUADSPI_FCR_CTCF; // clear TC flag