From 54d33b266ca337d8fb42852422cc6bf87c813e4e Mon Sep 17 00:00:00 2001 From: Damien George Date: Thu, 16 Sep 2021 22:16:36 +1000 Subject: [PATCH] esp32: Add support for ESP32-S3 SoCs. Thanks to Seon Rozenblum aka @UnexpectedMaker for the work. Signed-off-by: Damien George --- ports/esp32/machine_adc.c | 10 ++++++++-- ports/esp32/machine_hw_spi.c | 2 ++ ports/esp32/machine_i2s.c | 5 +++++ ports/esp32/machine_timer.c | 4 ++++ ports/esp32/modmachine.c | 2 ++ ports/esp32/partitions-8MiB.csv | 7 +++++++ ports/esp32/uart.c | 9 +++++++-- 7 files changed, 35 insertions(+), 4 deletions(-) create mode 100644 ports/esp32/partitions-8MiB.csv diff --git a/ports/esp32/machine_adc.c b/ports/esp32/machine_adc.c index 5ac05d56b5..6731978e28 100644 --- a/ports/esp32/machine_adc.c +++ b/ports/esp32/machine_adc.c @@ -164,10 +164,14 @@ STATIC mp_obj_t madc_width(mp_obj_t cls_in, mp_obj_t width_in) { case ADC_WIDTH_12Bit: adc_bit_width = 12; break; - #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 + #elif CONFIG_IDF_TARGET_ESP32S2 case ADC_WIDTH_BIT_13: adc_bit_width = 13; break; + #elif CONFIG_IDF_TARGET_ESP32S3 + case ADC_WIDTH_BIT_12: + adc_bit_width = 12; + break; #endif default: break; @@ -194,8 +198,10 @@ STATIC const mp_rom_map_elem_t madc_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_WIDTH_10BIT), MP_ROM_INT(ADC_WIDTH_10Bit) }, { MP_ROM_QSTR(MP_QSTR_WIDTH_11BIT), MP_ROM_INT(ADC_WIDTH_11Bit) }, { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(ADC_WIDTH_12Bit) }, - #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 + #elif CONFIG_IDF_TARGET_ESP32S2 { MP_ROM_QSTR(MP_QSTR_WIDTH_13BIT), MP_ROM_INT(ADC_WIDTH_BIT_13) }, + #elif CONFIG_IDF_TARGET_ESP32S3 + { MP_ROM_QSTR(MP_QSTR_WIDTH_12BIT), MP_ROM_INT(ADC_WIDTH_BIT_12) }, #endif }; diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c index ca530ba943..4c0989b9a6 100644 --- a/ports/esp32/machine_hw_spi.c +++ b/ports/esp32/machine_hw_spi.c @@ -55,6 +55,8 @@ #if CONFIG_IDF_TARGET_ESP32C3 #define HSPI_HOST SPI2_HOST +#elif CONFIG_IDF_TARGET_ESP32S3 +#define HSPI_HOST SPI3_HOST #endif typedef struct _machine_hw_spi_default_pins_t { diff --git a/ports/esp32/machine_i2s.c b/ports/esp32/machine_i2s.c index c650a33bef..dc583e8e96 100644 --- a/ports/esp32/machine_i2s.c +++ b/ports/esp32/machine_i2s.c @@ -455,8 +455,13 @@ STATIC void machine_i2s_init_helper(machine_i2s_obj_t *self, size_t n_pos_args, // apply low-level workaround for bug in some ESP-IDF versions that swap // the left and right channels // https://github.com/espressif/esp-idf/issues/6625 + #if CONFIG_IDF_TARGET_ESP32S3 + REG_SET_BIT(I2S_TX_CONF_REG(self->port), I2S_TX_MSB_SHIFT); + REG_SET_BIT(I2S_TX_CONF_REG(self->port), I2S_RX_MSB_SHIFT); + #else REG_SET_BIT(I2S_CONF_REG(self->port), I2S_TX_MSB_RIGHT); REG_SET_BIT(I2S_CONF_REG(self->port), I2S_RX_MSB_RIGHT); + #endif i2s_pin_config_t pin_config; pin_config.bck_io_num = self->sck; diff --git a/ports/esp32/machine_timer.c b/ports/esp32/machine_timer.c index 803849e1be..020ba4447d 100644 --- a/ports/esp32/machine_timer.c +++ b/ports/esp32/machine_timer.c @@ -138,7 +138,11 @@ STATIC void machine_timer_isr(void *self_in) { device->hw_timer[self->index].update = 1; #else #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(4, 4, 0) + #if CONFIG_IDF_TARGET_ESP32S3 + device->hw_timer[self->index].update.tn_update = 1; + #else device->hw_timer[self->index].update.tx_update = 1; + #endif #else device->hw_timer[self->index].update.update = 1; #endif diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c index 00271a37ed..cca2015729 100644 --- a/ports/esp32/modmachine.c +++ b/ports/esp32/modmachine.c @@ -91,6 +91,8 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { esp_pm_config_esp32c3_t pm; #elif CONFIG_IDF_TARGET_ESP32S2 esp_pm_config_esp32s2_t pm; + #elif CONFIG_IDF_TARGET_ESP32S3 + esp_pm_config_esp32s3_t pm; #endif pm.max_freq_mhz = freq; pm.min_freq_mhz = freq; diff --git a/ports/esp32/partitions-8MiB.csv b/ports/esp32/partitions-8MiB.csv new file mode 100644 index 0000000000..582d3b50e5 --- /dev/null +++ b/ports/esp32/partitions-8MiB.csv @@ -0,0 +1,7 @@ +# Notes: the offset of the partition table itself is set in +# $IDF_PATH/components/partition_table/Kconfig.projbuild. +# Name, Type, SubType, Offset, Size, Flags +nvs, data, nvs, 0x9000, 0x6000, +phy_init, data, phy, 0xf000, 0x1000, +factory, app, factory, 0x10000, 0x1F0000, +vfs, data, fat, 0x200000, 0x600000, diff --git a/ports/esp32/uart.c b/ports/esp32/uart.c index 480b364a59..58fc0c6c61 100644 --- a/ports/esp32/uart.c +++ b/ports/esp32/uart.c @@ -45,13 +45,18 @@ void uart_init(void) { // all code executed in ISR must be in IRAM, and any const data must be in DRAM STATIC void IRAM_ATTR uart_irq_handler(void *arg) { volatile uart_dev_t *uart = &UART0; + #if CONFIG_IDF_TARGET_ESP32S3 + uart->int_clr.rxfifo_full_int_clr = 1; + uart->int_clr.rxfifo_tout_int_clr = 1; + #else uart->int_clr.rxfifo_full = 1; - uart->int_clr.frm_err = 1; uart->int_clr.rxfifo_tout = 1; + uart->int_clr.frm_err = 1; + #endif while (uart->status.rxfifo_cnt) { #if CONFIG_IDF_TARGET_ESP32 uint8_t c = uart->fifo.rw_byte; - #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 + #elif CONFIG_IDF_TARGET_ESP32C3 || CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3 uint8_t c = READ_PERI_REG(UART_FIFO_AHB_REG(0)); // UART0 #endif if (c == mp_interrupt_char) {