kopia lustrzana https://github.com/micropython/micropython
stm32/ospi: Support read in 1 and 4 line modes.
Fixes support for 4 line communication with chip, but maintains fallback to 2 or 1 line if hardware needs it. Signed-off-by: Andrew Leech <andrew.leech@planetinnovation.com.au>pull/12722/head
rodzic
fd2833e95c
commit
45920afc34
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@ -269,37 +269,59 @@ static int octospi_read_cmd(void *self_in, uint8_t cmd, size_t len, uint32_t *de
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return 0;
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return 0;
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}
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}
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static int octospi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest) {
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static int octospi_read_cmd_addr_data(void *self_in, uint8_t cmd, uint32_t addr, size_t len, uint8_t *dest, uint8_t mode) {
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// Note this only support use with 1 or 4 line commands.
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// Full 8-line mode support is not included.
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// Some commands will auto-downgrade to support 2-line mode if needed by hardware.
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(void)self_in;
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(void)self_in;
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#if defined(MICROPY_HW_OSPIFLASH_IO1) && !defined(MICROPY_HW_OSPIFLASH_IO2) && !defined(MICROPY_HW_OSPIFLASH_IO4)
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uint32_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2;
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uint32_t dmode = 0;
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uint32_t admode = 0;
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uint32_t dcyc = 0;
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uint32_t abmode = 0;
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if (mode == MP_QSPI_TRANSFER_CMD_QADDR_QDATA) {
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dmode = 3; // 4 data lines used
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admode = 3; // 4 address lines used
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dcyc = 4; // 4 dummy cycles (2 bytes)
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abmode = 3; // alternate-byte bytes sent on 4 lines
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} else if (mode == MP_QSPI_TRANSFER_CMD_ADDR_DATA) {
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dmode = 1; // 1 data lines used
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admode = 1; // 1 address lines used
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dcyc = 8; // 8 dummy cycles (1 byte)
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abmode = 0; // No alternate-byte bytes sent
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} else {
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return -1;
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}
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#if !defined(MICROPY_HW_OSPIFLASH_IO2) && !defined(MICROPY_HW_OSPIFLASH_IO4)
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// Use 2-line address, 2-line data.
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// Use 2-line address, 2-line data.
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uint32_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2;
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dmode = 2; // data on 2-lines
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uint32_t dmode = 2; // data on 2-lines
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admode = 2; // address on 2-lines
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uint32_t admode = 2; // address on 2-lines
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dcyc = 4; // 4 dummy cycles
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uint32_t dcyc = 4; // 4 dummy cycles
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if (cmd == 0xeb || cmd == 0xec) {
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if (cmd == 0xeb || cmd == 0xec) {
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// Convert to 2-line command.
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// Convert to 2-line command.
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cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 0xbc : 0xbb;
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cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 0xbc : 0xbb;
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}
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}
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#endif
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#else
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#if !defined(MICROPY_HW_OSPIFLASH_IO1)
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// Fallback to use 1-line address, 1-line data.
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// Fallback to use 1-line address, 1-line data.
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uint32_t adsize = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 3 : 2;
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dmode = 1; // data on 1-line
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uint32_t dmode = 1; // data on 1-line
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admode = 1; // address on 1-line
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uint32_t admode = 1; // address on 1-line
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dcyc = 0; // 0 dummy cycles
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uint32_t dcyc = 0; // 0 dummy cycles
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if (cmd == 0xeb || cmd == 0xec) {
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if (cmd == 0xeb || cmd == 0xec) {
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// Convert to 1-line command.
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// Convert to 1-line command.
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cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 0x13 : 0x03;
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cmd = MICROPY_HW_SPI_ADDR_IS_32BIT(addr) ? 0x13 : 0x03;
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}
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}
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#endif
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#endif
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OCTOSPI1->FCR = OCTOSPI_FCR_CTCF; // clear TC flag
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OCTOSPI1->FCR = OCTOSPI_FCR_CTCF; // clear TC flag
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@ -311,7 +333,7 @@ static int octospi_read_cmd_qaddr_qdata(void *self_in, uint8_t cmd, uint32_t add
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| 0 << OCTOSPI_CCR_SIOO_Pos // send instruction every transaction
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| 0 << OCTOSPI_CCR_SIOO_Pos // send instruction every transaction
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| dmode << OCTOSPI_CCR_DMODE_Pos // data on n lines
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| dmode << OCTOSPI_CCR_DMODE_Pos // data on n lines
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| 0 << OCTOSPI_CCR_ABSIZE_Pos // 8-bit alternate byte
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| 0 << OCTOSPI_CCR_ABSIZE_Pos // 8-bit alternate byte
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| 0 << OCTOSPI_CCR_ABMODE_Pos // no alternate byte
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| abmode << OCTOSPI_CCR_ABMODE_Pos // alternate byte
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| adsize << OCTOSPI_CCR_ADSIZE_Pos // 32 or 24-bit address size
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| adsize << OCTOSPI_CCR_ADSIZE_Pos // 32 or 24-bit address size
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| admode << OCTOSPI_CCR_ADMODE_Pos // address on n lines
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| admode << OCTOSPI_CCR_ADMODE_Pos // address on n lines
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| 1 << OCTOSPI_CCR_IMODE_Pos // instruction on 1 line
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| 1 << OCTOSPI_CCR_IMODE_Pos // instruction on 1 line
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@ -357,7 +379,7 @@ const mp_qspi_proto_t octospi_proto = {
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.write_cmd_data = octospi_write_cmd_data,
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.write_cmd_data = octospi_write_cmd_data,
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.write_cmd_addr_data = octospi_write_cmd_addr_data,
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.write_cmd_addr_data = octospi_write_cmd_addr_data,
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.read_cmd = octospi_read_cmd,
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.read_cmd = octospi_read_cmd,
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.read_cmd_qaddr_qdata = octospi_read_cmd_qaddr_qdata,
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.read_cmd_addr_data = octospi_read_cmd_addr_data,
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};
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};
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#endif // defined(MICROPY_HW_OSPIFLASH_SIZE_BITS_LOG2)
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#endif // defined(MICROPY_HW_OSPIFLASH_SIZE_BITS_LOG2)
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