samd/mphalport: Add pin open-drain funcs, and improve delay and ticks.

The changes in this commit are:
- Add an interface for pin open-drain mode.
- Improve ticks_us() by using the us-counter.
- Improve ticks_cpu() by using the CPU's SysTick.
pull/9534/head
robert-hh 2022-06-04 18:09:11 +02:00 zatwierdzone przez Damien George
rodzic 5af54ad61f
commit 3d9940bc28
2 zmienionych plików z 82 dodań i 19 usunięć

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@ -4,6 +4,7 @@
* The MIT License (MIT)
*
* Copyright (c) 2019 Damien P. George
* Copyright (c) 2022 Robert Hammelrath
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@ -27,10 +28,13 @@
#include "py/runtime.h"
#include "py/mphal.h"
#include "py/stream.h"
#include "shared/runtime/interrupt_char.h"
#include "extmod/misc.h"
#include "samd_soc.h"
#include "tusb.h"
#if MICROPY_KBD_EXCEPTION
int mp_interrupt_char = -1;
void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) {
(void)itf;
@ -40,24 +44,47 @@ void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) {
}
void mp_hal_set_interrupt_char(int c) {
mp_interrupt_char = c;
tud_cdc_set_wanted_char(c);
}
#endif
void mp_hal_set_pin_mux(mp_hal_pin_obj_t pin, uint8_t mux) {
int pin_grp = pin / 32;
int port_grp = (pin % 32) / 2;
PORT->Group[pin_grp].PINCFG[pin % 32].bit.PMUXEN = 1; // Enable Mux
if (pin & 1) {
PORT->Group[pin_grp].PMUX[port_grp].bit.PMUXO = mux;
} else {
PORT->Group[pin_grp].PMUX[port_grp].bit.PMUXE = mux;
}
}
void mp_hal_delay_ms(mp_uint_t ms) {
ms += 1;
uint32_t t0 = systick_ms;
while (systick_ms - t0 < ms) {
MICROPY_EVENT_POLL_HOOK
if (ms > 10) {
uint32_t t0 = systick_ms;
while (systick_ms - t0 < ms) {
MICROPY_EVENT_POLL_HOOK
}
} else {
mp_hal_delay_us(ms * 1000);
}
}
void mp_hal_delay_us(mp_uint_t us) {
uint32_t ms = us / 1000 + 1;
uint32_t t0 = systick_ms;
while (systick_ms - t0 < ms) {
__WFI();
if (us > 0) {
uint32_t start = mp_hal_ticks_us();
#if defined(MCU_SAMD21)
// SAMD21 counter has effective 32 bit width
while ((mp_hal_ticks_us() - start) < us) {
}
#elif defined(MCU_SAMD51)
// SAMD51 counter has effective 29 bit width
while (((mp_hal_ticks_us() - start) & (MICROPY_PY_UTIME_TICKS_PERIOD - 1)) < us) {
}
#endif
}
}
@ -78,7 +105,7 @@ int mp_hal_stdin_rx_chr(void) {
return buf[0];
}
}
__WFI();
MICROPY_EVENT_POLL_HOOK
}
}
@ -90,7 +117,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
n = CFG_TUD_CDC_EP_BUFSIZE;
}
while (n > tud_cdc_write_available()) {
__WFI();
MICROPY_EVENT_POLL_HOOK
}
uint32_t n2 = tud_cdc_write(str + i, n);
tud_cdc_write_flush();

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@ -4,6 +4,7 @@
* The MIT License (MIT)
*
* Copyright (c) 2019-2021 Damien P. George
* Copyright (c) 2022 Robert Hammelrath
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
@ -27,25 +28,49 @@
#define MICROPY_INCLUDED_SAMD_MPHALPORT_H
#include "py/mpconfig.h"
#include "py/ringbuf.h"
// ASF4
#include "hal_gpio.h"
#include "hpl_time_measure.h"
#include "sam.h"
extern int mp_interrupt_char;
extern ringbuf_t stdin_ringbuf;
extern volatile uint32_t systick_ms;
extern volatile uint32_t systick_ms_upper;
void mp_hal_set_interrupt_char(int c);
#define mp_hal_delay_us_fast mp_hal_delay_us
static inline mp_uint_t mp_hal_ticks_ms(void) {
return systick_ms;
}
static inline mp_uint_t mp_hal_ticks_us(void) {
#if defined(MCU_SAMD21)
return REG_TC4_COUNT32_COUNT;
#elif defined(MCU_SAMD51)
TC0->COUNT32.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC;
while (TC0->COUNT32.CTRLBSET.reg != 0) {
}
return REG_TC0_COUNT32_COUNT >> 3;
#else
return systick_ms * 1000;
#endif
}
// ticks_cpu is limited to a 1 ms period, since the CPU SysTick counter
// is used for the 1 ms SysTick_Handler interrupt.
static inline mp_uint_t mp_hal_ticks_cpu(void) {
return 0;
return (system_time_t)SysTick->VAL;
}
static inline uint64_t mp_hal_time_ns(void) {
return ((uint64_t)systick_ms + (uint64_t)systick_ms_upper * 0x100000000) * 1000000;
}
// C-level pin HAL
@ -55,9 +80,10 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) {
#define MP_HAL_PIN_FMT "%u"
#define mp_hal_pin_obj_t uint
extern uint32_t machine_pin_open_drain_mask;
extern uint32_t machine_pin_open_drain_mask[];
mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
void mp_hal_set_pin_mux(mp_hal_pin_obj_t pin, uint8_t mux);
static inline unsigned int mp_hal_pin_name(mp_hal_pin_obj_t pin) {
return pin;
@ -65,18 +91,22 @@ static inline unsigned int mp_hal_pin_name(mp_hal_pin_obj_t pin) {
static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
machine_pin_open_drain_mask &= ~(1 << pin);
machine_pin_open_drain_mask[pin / 32] &= ~(1 << (pin % 32));
}
static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT);
machine_pin_open_drain_mask &= ~(1 << pin);
machine_pin_open_drain_mask[pin / 32] &= ~(1 << (pin % 32));
}
static inline void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
gpio_set_pin_level(pin, 0);
machine_pin_open_drain_mask |= 1 << pin;
machine_pin_open_drain_mask[pin / 32] |= 1 << (pin % 32);
}
static inline unsigned int mp_hal_get_pin_direction(mp_hal_pin_obj_t pin) {
return (PORT->Group[pin / 32].DIR.reg & (1 << (pin % 32))) >> (pin % 32);
}
static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) {
@ -87,7 +117,14 @@ static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) {
gpio_set_pin_level(pin, v);
}
/*
static inline void mp_hal_pin_low(mp_hal_pin_obj_t pin) {
gpio_set_pin_level(pin, 0);
}
static inline void mp_hal_pin_high(mp_hal_pin_obj_t pin) {
gpio_set_pin_level(pin, 1);
}
static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT);
}
@ -95,6 +132,5 @@ static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) {
gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
}
*/
#endif // MICROPY_INCLUDED_SAMD_MPHALPORT_H