stm32/boards: Convert F413,F439,H743,L4xx,WB55 to new flash FS config.

Signed-off-by: Damien George <damien@micropython.org>
2021-11-29 13:10:36 +11:00 · 2021-11-29 13:10:36 +11:00 · 35e70c1698
commit 35e70c1698
--- a/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F413ZH/mpconfigboard.h
@ -3,6 +3,8 @@

 #define MICROPY_HW_HAS_SWITCH       (1)
 #define MICROPY_HW_HAS_FLASH        (1)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE_SEGMENT2 (1)
 #define MICROPY_HW_ENABLE_RNG       (1)
 #define MICROPY_HW_ENABLE_RTC       (1)
 #define MICROPY_HW_ENABLE_DAC       (1)
--- a/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_F439ZI/mpconfigboard.h
@ -3,6 +3,8 @@

 #define MICROPY_HW_HAS_SWITCH       (1)
 #define MICROPY_HW_HAS_FLASH        (1)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (1)
+#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE_SEGMENT2 (1)
 #define MICROPY_HW_ENABLE_RNG       (1)
 #define MICROPY_HW_ENABLE_RTC       (1)
 #define MICROPY_HW_ENABLE_USB       (1)
--- a/ports/stm32/boards/NUCLEO_WB55/rfcore_firmware.py
+++ b/ports/stm32/boards/NUCLEO_WB55/rfcore_firmware.py
@ -89,7 +89,8 @@ _HCI_KIND_VENDOR_RESPONSE = const(0x11)
 _OBFUSCATION_KEY = const(0x0573B55AA)

 # On boards using the internal flash filesystem, this must match the
-# `_flash_fs_end` symbol defined by the linker script (boards/stm32wb55xg.ld).
+# `_micropy_hw_internal_flash_storage_end` symbol defined by the linker script
+# (see eg boards/stm32wb55xg.ld).
 # We erase everything from here until the start of the secure area (defined by
 # SFSA) just to ensure that no other fragments of firmware files are left
 # behind. On boards with external flash, this just needs to ensure that it
--- a/ports/stm32/boards/stm32f413xg.ld
+++ b/ports/stm32/boards/stm32f413xg.ld
@ -3,15 +3,14 @@
 */

 /* Specify the memory areas */
-/* FLASH_FS2 is placed before FLASH_TEXT to support 1MB and 1.5MB FLASH with common code in flashbdev.c */
 MEMORY
 {
    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
    FLASH_FS (rx)   : ORIGIN = 0x08004000, LENGTH = 176K /* sectors 1,2,3 are 16K, 4 is 64K, 5 is 128K (64K used) for filesystem */
-    FLASH_FS2 (rx)  : ORIGIN = 0x08040000, LENGTH = 128K /* sector 6 is 128K (64K used) for filesystem, Total filesystem 240K */
+    FLASH_FS2 (rx)  : ORIGIN = 0x08040000, LENGTH = 64K /* sector 6 is 128K (64K used) for filesystem, Total filesystem 240K */
    FLASH_TEXT (rx) : ORIGIN = 0x08060000, LENGTH = 640K /* sectors 7,8,9,10,11  are 128K*/
-    SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 64K
+    SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 64K /* used for filesystem cache */
    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 256K
 }

@ -29,3 +28,11 @@ _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
+
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2);
+_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2);
--- a/ports/stm32/boards/stm32f413xh.ld
+++ b/ports/stm32/boards/stm32f413xh.ld
@ -3,15 +3,14 @@
 */

 /* Specify the memory areas */
-/* FLASH_FS2 is placed before FLASH_TEXT to support 1MB and 1.5MB FLASH with common code in flashbdev.c */
 MEMORY
 {
    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1536K /* entire flash */
    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
    FLASH_FS (rx)   : ORIGIN = 0x08004000, LENGTH = 176K /* sectors 1,2,3 are 16K, 4 is 64K, 5 is 128K (64K used) for filesystem */
-    FLASH_FS2 (rx)  : ORIGIN = 0x08040000, LENGTH = 128K /* sector 6 is 128K (64K used) for filesystem, Total filesystem 240K */
+    FLASH_FS2 (rx)  : ORIGIN = 0x08040000, LENGTH = 64K /* sector 6 is 128K (64K used) for filesystem, Total filesystem 240K */
    FLASH_TEXT (rx) : ORIGIN = 0x08060000, LENGTH = 1152K /* sectors 7,8,9,10,11,12,13,14,15  are 128K*/
-    SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 64K
+    SRAM2 (xrw)     : ORIGIN = 0x10000000, LENGTH = 64K /* used for filesystem cache */
    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 256K
 }

@ -29,3 +28,11 @@ _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
+
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(SRAM2);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2);
+_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2);
--- a/ports/stm32/boards/stm32f439.ld
+++ b/ports/stm32/boards/stm32f439.ld
@ -8,8 +8,8 @@ MEMORY
    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 2048K /* entire flash */
    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
    FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 896K /* sectors 5-11 are 128K */
-    FLASH_FS (rx)   : ORIGIN = 0x08100000, LENGTH = 256K /* sectors 12-17 are 4*16K+64K+128K */
-    FLASH_FS2 (rx)  : ORIGIN = 0x08140000, LENGTH = 128K /* sector 18 */
+    FLASH_FS (rx)   : ORIGIN = 0x08100000, LENGTH = 192K /* sectors 12-15 are 16K, 16 is 64K, 17 is 128K (64K used) */
+    FLASH_FS2 (rx)  : ORIGIN = 0x08140000, LENGTH = 64K /* sector 18 is 128K (64K used) */
    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 192K
    CCMRAM (xrw)    : ORIGIN = 0x10000000, LENGTH = 64K
 }
@ -28,3 +28,11 @@ _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);
 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;
+
+/* Filesystem cache in RAM, and storage in flash */
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(CCMRAM);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(CCMRAM) + LENGTH(CCMRAM);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage2_start = ORIGIN(FLASH_FS2);
+_micropy_hw_internal_flash_storage2_end = ORIGIN(FLASH_FS2) + LENGTH(FLASH_FS2);
--- a/ports/stm32/boards/stm32h743.ld
+++ b/ports/stm32/boards/stm32h743.ld
@ -29,12 +29,12 @@ _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;

 /* Location of filesystem RAM cache */
-_ram_fs_cache_start = ORIGIN(DTCM);
-_ram_fs_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);
+_micropy_hw_internal_flash_storage_ram_cache_start = ORIGIN(DTCM);
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(DTCM) + LENGTH(DTCM);

 /* Location of filesystem flash storage */
-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

 /* Define output sections */
 SECTIONS
--- a/ports/stm32/boards/stm32l432.ld
+++ b/ports/stm32/boards/stm32l432.ld
@ -21,14 +21,14 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = _ram_end;
-_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
+_micropy_hw_internal_flash_storage_ram_cache_end = _ram_end;
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */

-_estack = _ram_fs_cache_start - _estack_reserve;
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve;
 _sstack = _estack - 10K; /* stack = 10K */

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack; /* bss + heap = 52K, tunable by adjusting stack size */

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
--- a/ports/stm32/boards/stm32l452xe.ld
+++ b/ports/stm32/boards/stm32l452xe.ld
@ -21,14 +21,14 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = _ram_end;
-_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
+_micropy_hw_internal_flash_storage_ram_cache_end = _ram_end;
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */

-_estack = _ram_fs_cache_start - _estack_reserve;
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve;
 _sstack = _estack - 16K; /* stack = 16K */

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack; /* bss + heap = 142K, tunable by adjusting stack size */

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
--- a/ports/stm32/boards/stm32l476xe.ld
+++ b/ports/stm32/boards/stm32l476xe.ld
@ -22,14 +22,14 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
-_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */

-_estack = _ram_fs_cache_start - _estack_reserve; /* stack in SRAM2 */
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve; /* stack in SRAM2 */
 _sstack = ORIGIN(SRAM2); /* stack = 30K */

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _ram_end; /* bss + heap = 96K, tunable by adjusting stack size */

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
--- a/ports/stm32/boards/stm32l476xg.ld
+++ b/ports/stm32/boards/stm32l476xg.ld
@ -22,14 +22,14 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
-_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(SRAM2) + LENGTH(SRAM2); /* fs_cache in SRAM2 */
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */

-_estack = _ram_fs_cache_start - _estack_reserve; /* stack in SRAM2 */
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve; /* stack in SRAM2 */
 _sstack = ORIGIN(SRAM2); /* stack = 30K */

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _ram_end; /* bss + heap = 96K, tunable by adjusting stack size */

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
--- a/ports/stm32/boards/stm32l496xg.ld
+++ b/ports/stm32/boards/stm32l496xg.ld
@ -21,14 +21,14 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = _ram_end;
-_ram_fs_cache_start = _ram_fs_cache_end - 2K; /* fs cache = 2K */
+_micropy_hw_internal_flash_storage_ram_cache_end = _ram_end;
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K */

-_estack = _ram_fs_cache_start - _estack_reserve;
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve;
 _sstack = _estack - 16K; /* stack = 16K */

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack; /* bss + heap = 302K, tunable by adjusting stack size */

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
--- a/ports/stm32/boards/stm32wb55xg.ld
+++ b/ports/stm32/boards/stm32wb55xg.ld
@ -21,19 +21,19 @@ _minimum_heap_size = 16K;
 _ram_start = ORIGIN(RAM);
 _ram_end = ORIGIN(RAM) + LENGTH(RAM);

-_ram_fs_cache_end = ORIGIN(RAM) + LENGTH(RAM);
-_ram_fs_cache_start = _ram_fs_cache_end - 4K; /* fs cache = 4K */
+_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(RAM) + LENGTH(RAM);
+_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 4K; /* fs cache = 4K */

 /* Define the stack.  The stack is full descending so begins at the bottom of FS cache.
   Note that EABI requires the stack to be 8-byte aligned for a call. */
-_estack = _ram_fs_cache_start - _estack_reserve;
+_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve;
 _sstack = _estack - 16K;

 _heap_start = _ebss; /* heap starts just after statically allocated memory */
 _heap_end = _sstack;

-_flash_fs_start = ORIGIN(FLASH_FS);
-_flash_fs_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
+_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
+_micropy_hw_internal_flash_storage_end   = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);

 SECTIONS
 {
--- a/ports/stm32/flashbdev.c
+++ b/ports/stm32/flashbdev.c
@ -61,15 +61,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
 #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
 #define FLASH_MEM_SEG1_NUM_BLOCKS (128) // sectors 1,2,3,4: 16k+16k+16k+16k(of 64k)=64k

-#elif defined(STM32F413xx)
-
-#define CACHE_MEM_START_ADDR (0x10000000) // SRAM2 data RAM, 64k
-#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of SRAM2
-#define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
-#define FLASH_MEM_SEG1_NUM_BLOCKS (352) // sectors 1,2,3,4,5: 16k+16k+16k+64k+64k(of 128k)=176k
-#define FLASH_MEM_SEG2_START_ADDR (0x08040000) // sector 6
-#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 6: 64k(of 128k). Filesystem 176K + 64K = 240K
-
 #elif defined(STM32F427xx) || defined(STM32F429xx)

 #define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
@ -77,15 +68,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
 #define FLASH_MEM_SEG1_START_ADDR (0x08004000) // sector 1
 #define FLASH_MEM_SEG1_NUM_BLOCKS (224) // sectors 1,2,3,4: 16k+16k+16k+64k=112k

-#elif defined(STM32F439xx)
-
-#define CACHE_MEM_START_ADDR (0x10000000) // CCM data RAM, 64k
-#define FLASH_SECTOR_SIZE_MAX (0x10000) // 64k max, size of CCM
-#define FLASH_MEM_SEG1_START_ADDR (0x08100000) // sector 12
-#define FLASH_MEM_SEG1_NUM_BLOCKS (384) // sectors 12,13,14,15,16,17: 16k+16k+16k+16k+64k+64k(of 128k)=192k
-#define FLASH_MEM_SEG2_START_ADDR (0x08140000) // sector 18
-#define FLASH_MEM_SEG2_NUM_BLOCKS (128) // sector 18: 64k(of 128k)
-
 #elif defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx)

 #define CACHE_MEM_START_ADDR (0x20000000) // DTCM data RAM, 64k
@ -102,36 +84,6 @@ STATIC byte flash_cache_mem[0x4000] __attribute__((aligned(4))); // 16k
 #define FLASH_MEM_SEG1_START_ADDR (0x08008000) // sector 1
 #define FLASH_MEM_SEG1_NUM_BLOCKS (192) // sectors 1,2,3: 32k+32k+32=96k

-#elif defined(STM32H743xx)
-
-// The STM32H743 flash sectors are 128K, with locations defined in the linker script
-extern uint8_t _flash_fs_start;
-extern uint8_t _flash_fs_end;
-extern uint8_t _ram_fs_cache_start[];
-extern uint8_t _ram_fs_cache_end[];
-
-#define CACHE_MEM_START_ADDR ((uintptr_t)&_ram_fs_cache_start[0])
-#define FLASH_SECTOR_SIZE_MAX (&_ram_fs_cache_end[0] - &_ram_fs_cache_start[0])
-#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start)
-#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512)
-
-#elif defined(STM32L432xx) || \
-    defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx) || \
-    defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L496xx) || \
-    defined(STM32WB)
-
-// The STM32L4xx doesn't have CCRAM, so we use SRAM2 for this, although
-// actual location and size is defined by the linker script.
-extern uint8_t _flash_fs_start;
-extern uint8_t _flash_fs_end;
-extern uint8_t _ram_fs_cache_start[]; // size determined by linker file
-extern uint8_t _ram_fs_cache_end[];
-
-#define CACHE_MEM_START_ADDR ((uintptr_t)&_ram_fs_cache_start[0])
-#define FLASH_SECTOR_SIZE_MAX (&_ram_fs_cache_end[0] - &_ram_fs_cache_start[0]) // 2k max
-#define FLASH_MEM_SEG1_START_ADDR ((long)&_flash_fs_start)
-#define FLASH_MEM_SEG1_NUM_BLOCKS ((&_flash_fs_end - &_flash_fs_start) / 512)
-
 #else

 // Generic configuration where the linker script specifies flash storage and RAM cache locations.