diff --git a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h
index 3ab3d5fa17..a88bcf6756 100644
--- a/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h
+++ b/ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h
@@ -12,9 +12,11 @@
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
 #define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
 #define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV4)
-
 #define MICROPY_HW_FLASH_LATENCY    FLASH_LATENCY_4
 
+// The board has an external 32kHz crystal
+#define MICROPY_HW_RTC_USE_LSE      (1)
+
 // USART1 config connected to ST-Link
 #define MICROPY_HW_UART1_TX     (pin_B6)
 #define MICROPY_HW_UART1_RX     (pin_B7)
diff --git a/ports/stm32/boards/LIMIFROG/mpconfigboard.h b/ports/stm32/boards/LIMIFROG/mpconfigboard.h
index d27c2e66ef..4b750c17ff 100644
--- a/ports/stm32/boards/LIMIFROG/mpconfigboard.h
+++ b/ports/stm32/boards/LIMIFROG/mpconfigboard.h
@@ -16,9 +16,11 @@ void LIMIFROG_board_early_init(void);
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
 #define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
 #define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
-
 #define MICROPY_HW_FLASH_LATENCY    FLASH_LATENCY_4
 
+// The board has an external 32kHz crystal
+#define MICROPY_HW_RTC_USE_LSE      (1)
+
 // USART config
 #define MICROPY_HW_UART3_TX (pin_C10)
 #define MICROPY_HW_UART3_RX (pin_C11)
diff --git a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.h b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.h
index 60e053f44f..e7202efe02 100644
--- a/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.h
@@ -25,6 +25,9 @@
 #define MICROPY_HW_CLK_PLLP (7)
 #define MICROPY_HW_CLK_PLLQ (2)
 
+// The board has an external 32kHz crystal
+#define MICROPY_HW_RTC_USE_LSE      (1)
+
 // UART config
 #define MICROPY_HW_UART1_TX     (pin_B6)
 #define MICROPY_HW_UART1_RX     (pin_B7)
diff --git a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h
index 05298253ae..00b033006b 100644
--- a/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h
+++ b/ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h
@@ -15,6 +15,9 @@
 #define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
 #define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
 
+// The board has an external 32kHz crystal
+#define MICROPY_HW_RTC_USE_LSE      (1)
+
 // UART config
 #define MICROPY_HW_UART2_TX     (pin_A2)
 #define MICROPY_HW_UART2_RX     (pin_A3)
diff --git a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h
index 6a17d74d3a..5d9fa25bc3 100644
--- a/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h
+++ b/ports/stm32/boards/STM32L496GDISC/mpconfigboard.h
@@ -14,9 +14,11 @@
 #define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
 #define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
 #define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
-
 #define MICROPY_HW_FLASH_LATENCY    FLASH_LATENCY_4
 
+// The board has an external 32kHz crystal
+#define MICROPY_HW_RTC_USE_LSE      (1)
+
 // USART config
 #define MICROPY_HW_UART2_TX     (pin_A2)
 #define MICROPY_HW_UART2_RX     (pin_D6)