mixmrt/machine_i2s: Add I2S protocol support.

This commit adds support for machine.I2S on the mimxrt port.  The I2S API
is consistent with the existing stm32, esp32, and rp2 implementations.

I2S features:
- controller transmit and controller receive
- 16-bit and 32-bit sample sizes
- mono and stereo formats
- sampling frequencies from 8kHz to 48kHz
- 3 modes of operation:
  - blocking
  - non-blocking with callback
  - uasyncio
- configurable internal buffer
- optional MCK

Tested with the following development boards:
- MIMXRT1010_EVK, MIMXRT1015_EVK, MIMXRT1020_EVK, MIMXRT1050_EVK
- Teensy 4.0, Teensy 4.1
- Olimex RT1010
- Seeed ARCH MIX

Tested with the following I2S hardware peripherals:
- UDA1334
- GY-SPH0645LM4H
- WM8960 codec on board the MIMXRT boards and separate breakout board
- INMP441
- PCM5102
- SGTL5000 on the Teensy audio shield

Signed-off-by: Mike Teachman <mike.teachman@gmail.com>

docs/library/machine.I2S.rst

@@ -75,23 +75,19 @@ uasyncio::
 Constructor
 -----------
 
-.. class:: I2S(id, *, sck, ws, sd, mode, bits, format, rate, ibuf)
+.. class:: I2S(id, *, sck, ws, sd, mck=None, mode, bits, format, rate, ibuf)
 
    Construct an I2S object of the given id:
 
-   - ``id`` identifies a particular I2S bus.
-
-   ``id`` is board and port specific:
-
-     - PYBv1.0/v1.1: has one I2S bus with id=2.
-     - PYBD-SFxW: has two I2S buses with id=1 and id=2.
-     - ESP32: has two I2S buses with id=0 and id=1.
+   - ``id`` identifies a particular I2S bus; it is board and port specific
 
    Keyword-only parameters that are supported on all ports:
 
      - ``sck`` is a pin object for the serial clock line
      - ``ws`` is a pin object for the word select line
      - ``sd`` is a pin object for the serial data line
+     - ``mck`` is a pin object for the master clock line;
+       master clock frequency is sampling rate * 256
      - ``mode`` specifies receive or transmit
      - ``bits`` specifies sample size (bits), 16 or 32
      - ``format`` specifies channel format, STEREO or MONO

ports/mimxrt/Makefile

@@ -77,7 +77,7 @@ INC += -I$(TOP)/lib/tinyusb/hw
 INC += -I$(TOP)/lib/tinyusb/hw/bsp/teensy_40
 INC += -I$(TOP)/lib/tinyusb/src
 
-CFLAGS_MCU = -mtune=cortex-m7 -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16
+CFLAGS_MCU = -mtune=cortex-m7 -mcpu=cortex-m7
 CFLAGS += $(INC) -Wall -Werror -Wdouble-promotion -Wfloat-conversion -std=c99 -nostdlib -mthumb $(CFLAGS_MCU)
 CFLAGS += -DCPU_$(MCU_SERIES) -DCPU_$(MCU_VARIANT) -DBOARD_$(BOARD)
 CFLAGS += -DXIP_EXTERNAL_FLASH=1 \
@@ -100,12 +100,14 @@ CFLAGS += $(CFLAGS_MOD) $(CFLAGS_EXTRA)
 # Configure floating point support
 ifeq ($(MICROPY_FLOAT_IMPL),double)
 CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE
+CFLAGS_MCU += -mfloat-abi=hard  -mfpu=fpv5-d16
 else
 ifeq ($(MICROPY_FLOAT_IMPL),none)
 CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_NONE
 else
 CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT
 CFLAGS += -fsingle-precision-constant
+CFLAGS_MCU += -mfloat-abi=softfp -mfpu=fpv5-sp-d16
 endif
 endif
 
@@ -188,6 +190,7 @@ SRC_HAL_IMX_C += \
 	$(MCU_DIR)/drivers/fsl_lpuart.c \
 	$(MCU_DIR)/drivers/fsl_pit.c \
 	$(MCU_DIR)/drivers/fsl_pwm.c \
+	$(MCU_DIR)/drivers/fsl_sai.c \
 	$(MCU_DIR)/drivers/fsl_snvs_lp.c \
 	$(MCU_DIR)/drivers/fsl_trng.c \
 	$(MCU_DIR)/drivers/fsl_wdog.c \
@@ -210,7 +213,7 @@ endif
 
 SRC_C += \
 	board_init.c \
-	dma_channel.c \
+	dma_manager.c \
 	drivers/bus/softspi.c \
 	drivers/dht/dht.c \
 	eth.c \
@@ -224,6 +227,7 @@ SRC_C += \
 	machine_adc.c \
 	machine_bitstream.c \
 	machine_i2c.c \
+	machine_i2s.c \
 	machine_led.c \
 	machine_pin.c \
 	machine_rtc.c \
@@ -396,6 +400,7 @@ SRC_QSTR += \
 	extmod/modonewire.c \
 	extmod/uos_dupterm.c \
 	machine_adc.c \
+	machine_i2s.c \
 	machine_led.c \
 	machine_pin.c \
 	machine_pwm.c \

ports/mimxrt/board_init.c

@@ -96,6 +96,10 @@ void board_init(void) {
     #if MICROPY_PY_MACHINE_SDCARD
     machine_sdcard_init0();
     #endif
+
+    #if MICROPY_PY_MACHINE_I2S
+    machine_i2s_init0();
+    #endif
 }
 
 void USB_OTG1_IRQHandler(void) {

ports/mimxrt/boards/MIMXRT1010_EVK/mpconfigboard.h

@@ -44,3 +44,36 @@
 #define IOMUX_TABLE_I2C \
     { IOMUXC_GPIO_02_LPI2C1_SCL }, { IOMUXC_GPIO_01_LPI2C1_SDA }, \
     { IOMUXC_GPIO_10_LPI2C2_SCL }, { IOMUXC_GPIO_09_LPI2C2_SDA },
+
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx }
+#define I2S_WM8960_RX_MODE  (1)
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_08, IOMUXC_GPIO_08_SAI1_MCLK),  \
+        I2S_GPIO(1, SCK, RX, GPIO_01, IOMUXC_GPIO_01_SAI1_RX_BCLK),  \
+        I2S_GPIO(1, WS, RX, GPIO_02, IOMUXC_GPIO_02_SAI1_RX_SYNC),  \
+        I2S_GPIO(1, SD, RX, GPIO_03, IOMUXC_GPIO_03_SAI1_RX_DATA00),  \
+        I2S_GPIO(1, SCK, TX, GPIO_06, IOMUXC_GPIO_06_SAI1_TX_BCLK),  \
+        I2S_GPIO(1, WS, TX, GPIO_07, IOMUXC_GPIO_07_SAI1_TX_SYNC),  \
+        I2S_GPIO(1, SD, TX, GPIO_04, IOMUXC_GPIO_04_SAI1_TX_DATA00),  \
+    }
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/MIMXRT1010_EVK/pins.csv

@@ -34,3 +34,10 @@ PWM_CB,GPIO_05
 ENC_A,GPIO_AD_05
 ENC_B,GPIO_AD_06
 LED_GREEN,GPIO_11
+MCK,GPIO_08
+SCK_RX,GPIO_01
+WS_RX,GPIO_02
+SD_RX,GPIO_03
+SCK_TX,GPIO_06
+WS_TX,GPIO_07
+SD_TX,GPIO_04

ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h

@@ -65,6 +65,36 @@
     { 0 }, { 0 }, \
     { IOMUXC_GPIO_SD_B1_02_LPI2C4_SCL }, { IOMUXC_GPIO_SD_B1_03_LPI2C4_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_00, IOMUXC_GPIO_AD_B1_00_SAI1_MCLK), \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_06, IOMUXC_GPIO_AD_B1_06_SAI1_RX_BCLK), \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_04, IOMUXC_GPIO_AD_B1_04_SAI1_RX_SYNC), \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_05, IOMUXC_GPIO_AD_B1_05_SAI1_RX_DATA00),  \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_01, IOMUXC_GPIO_AD_B1_01_SAI1_TX_BCLK), \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_02, IOMUXC_GPIO_AD_B1_02_SAI1_TX_SYNC),  \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_03, IOMUXC_GPIO_AD_B1_03_SAI1_TX_DATA00), \
+    }
+
+
 #define USDHC_DUMMY_PIN NULL, 0
 #define MICROPY_USDHC1 \
     { \
@@ -142,3 +172,6 @@
     { IOMUXC_GPIO_AD_B0_15_ENET_TDATA01, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_40_ENET_MDIO, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_41_ENET_MDC, 0, 0xB0E9u },
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv

@@ -30,4 +30,11 @@ SCK,GPIO_AD_B0_10
 SDI,GPIO_AD_B0_13
 SDO,GPIO_AD_B0_12
 CS,GPIO_AD_B0_11
-LED_GREEN,GPIO_AD_B0_05
+LED_GREEN,GPIO_AD_B0_05
+MCK,GPIO_AD_B1_00
+SCK_RX,GPIO_AD_B1_06
+WS_RX,GPIO_AD_B1_04
+SD_RX,GPIO_AD_B1_05
+SCK_TX,GPIO_AD_B1_01
+WS_TX,GPIO_AD_B1_02
+SD_TX,GPIO_AD_B1_03

ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h

@@ -53,6 +53,37 @@
     { 0 }, { 0 }, \
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+#define I2S_WM8960_RX_MODE  (1)
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00),  \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC),  \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00), \
+    }
+
+
 #define USDHC_DUMMY_PIN NULL, 0
 
 #define MICROPY_USDHC1 \
@@ -131,3 +162,6 @@
     { IOMUXC_GPIO_B1_11_ENET_RX_ER, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_41_ENET_MDIO, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_40_ENET_MDC, 0, 0xB0E9u },
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv

@@ -29,3 +29,10 @@ SDI,GPIO_SD_B0_03
 SDO,GPIO_SD_B0_02
 CS,GPIO_SD_B0_01
 LED_GREEN,GPIO_AD_B0_09
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_AD_B1_12
+SCK_TX,GPIO_AD_B1_14
+WS_TX,GPIO_AD_B1_15
+SD_TX,GPIO_AD_B1_13

ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h

@@ -53,6 +53,36 @@
     { 0 }, { 0 }, \
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+#define I2S_WM8960_RX_MODE  (1)
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00),  \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC),  \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00), \
+    }
+
 #define USDHC_DUMMY_PIN NULL, 0
 #define MICROPY_USDHC1 \
     { \
@@ -130,3 +160,6 @@
     { IOMUXC_GPIO_B1_11_ENET_RX_ER, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_41_ENET_MDIO, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_40_ENET_MDC, 0, 0xB0E9u },
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv

@@ -29,3 +29,10 @@ SDI,GPIO_SD_B0_03
 SDO,GPIO_SD_B0_02
 CS,GPIO_SD_B0_01
 LED_GREEN,GPIO_AD_B0_09
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_AD_B1_12
+SCK_TX,GPIO_AD_B1_14
+WS_TX,GPIO_AD_B1_15
+SD_TX,GPIO_AD_B1_13

ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h

@@ -53,6 +53,36 @@
     { 0 }, { 0 }, \
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+#define I2S_WM8960_RX_MODE  (1)
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00),  \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC),  \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00), \
+    }
+
 #define USDHC_DUMMY_PIN NULL, 0
 #define MICROPY_USDHC1 \
     { \
@@ -130,3 +160,6 @@
     { IOMUXC_GPIO_B1_11_ENET_RX_ER, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_41_ENET_MDIO, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_EMC_40_ENET_MDC, 0, 0xB0E9u },
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv

@@ -29,3 +29,10 @@ SDI,GPIO_SD_B0_03
 SDO,GPIO_SD_B0_02
 CS,GPIO_SD_B0_01
 LED_GREEN,GPIO_AD_B0_09
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_AD_B1_12
+SCK_TX,GPIO_AD_B1_14
+WS_TX,GPIO_AD_B1_15
+SD_TX,GPIO_AD_B1_13

ports/mimxrt/boards/OLIMEX_RT1010/mpconfigboard.h

@@ -48,3 +48,39 @@
 #define IOMUX_TABLE_I2C \
     { IOMUXC_GPIO_AD_14_LPI2C1_SCL }, { IOMUXC_GPIO_AD_13_LPI2C1_SDA }, \
     { IOMUXC_GPIO_AD_08_LPI2C2_SCL }, { IOMUXC_GPIO_AD_07_LPI2C2_SDA },
+
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (3)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, 0, kCLOCK_Sai3Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, 0, kCLOCK_Sai3PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, 0, kCLOCK_Sai3Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, 0, kIOMUXC_GPR_SAI3MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, 0, kDmaRequestMuxSai3Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, 0, kDmaRequestMuxSai3Tx }
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_08, IOMUXC_GPIO_08_SAI1_MCLK), /* pin D8 */ \
+        I2S_GPIO(1, SCK, RX, GPIO_01, IOMUXC_GPIO_01_SAI1_RX_BCLK), /* pin D1 */ \
+        I2S_GPIO(1, WS, RX, GPIO_02, IOMUXC_GPIO_02_SAI1_RX_SYNC), /* pin D2 */ \
+        I2S_GPIO(1, SD, RX, GPIO_03, IOMUXC_GPIO_03_SAI1_RX_DATA00), /* pin D3 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_06, IOMUXC_GPIO_06_SAI1_TX_BCLK), /* pin D6 */ \
+        I2S_GPIO(1, WS, TX, GPIO_07, IOMUXC_GPIO_07_SAI1_TX_SYNC), /* pin D7 */ \
+        I2S_GPIO(1, SD, TX, GPIO_04, IOMUXC_GPIO_04_SAI1_TX_DATA00), /* pin D4 */ \
+        I2S_GPIO(3, SCK, TX, GPIO_SD_01, IOMUXC_GPIO_SD_01_SAI3_TX_BCLK), /* pin D10 */ \
+        I2S_GPIO(3, WS, TX, GPIO_SD_00, IOMUXC_GPIO_SD_00_SAI3_TX_SYNC), /* pin D9 */ \
+        I2S_GPIO(3, SD, TX, GPIO_SD_02, IOMUXC_GPIO_SD_02_SAI3_TX_DATA) /* pin D11 */ \
+    }
+
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/OLIMEX_RT1010/pins.csv

@@ -34,3 +34,10 @@ RX, GPIO_09
 TX, GPIO_10
 RELAY1,GPIO_SD_12
 RELAY2,GPIO_SD_13
+MCK,GPIO_08
+SCK_RX,GPIO_01
+WS_RX,GPIO_02
+SD_RX,GPIO_03
+SCK_TX,GPIO_06
+WS_TX,GPIO_07
+SD_TX,GPIO_04

ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h

@@ -65,6 +65,35 @@
     { IOMUXC_GPIO_B0_04_LPI2C2_SCL }, { IOMUXC_GPIO_B0_05_LPI2C2_SDA }, \
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA }
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (1)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx }
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), /* pin J4 09 */ \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), /* pin J4 11 */ \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), /* pin J4 10 */ \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00), /* pin J4 12 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), /* pin J4 14 */ \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC), /* pin J4 15 */ \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00) /* pin J4 13 */ \
+    }
+
 #define USDHC_DUMMY_PIN NULL, 0
 
 #define MICROPY_USDHC1 \
@@ -144,3 +173,6 @@
 #define MIMXRT_IOMUXC_SEMC_WE IOMUXC_GPIO_EMC_28_SEMC_WE
 
 #define MIMXRT_IOMUXC_SEMC_CS0 IOMUXC_GPIO_EMC_29_SEMC_CS0
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv

@@ -60,3 +60,10 @@ J5_50,GPIO_AD_B0_02
 LED_RED,GPIO_AD_B0_09
 LED_GREEN,GPIO_AD_B0_10
 LED_BLUE,GPIO_AD_B0_11
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_AD_B1_12
+SCK_TX,GPIO_AD_B1_14
+WS_TX,GPIO_AD_B1_15
+SD_TX,GPIO_AD_B1_13

ports/mimxrt/boards/TEENSY40/mpconfigboard.h

@@ -58,6 +58,41 @@
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA }, \
     { IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL }, { IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (2)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), /* pin 21 */ \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), /* pin 20 */ \
+        I2S_GPIO(1, SD, RX, GPIO_B1_00, IOMUXC_GPIO_B1_00_SAI1_RX_DATA00), /* pin 8 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), /* pin 26 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_B1_02, IOMUXC_GPIO_B1_02_SAI1_TX_BCLK), /* pin 36 */ \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC), /* pin 27 */ \
+        I2S_GPIO(1, WS, TX, GPIO_B1_03, IOMUXC_GPIO_B1_03_SAI1_TX_SYNC), /* pin 37 */ \
+        I2S_GPIO(1, SD, TX, GPIO_B1_01, IOMUXC_GPIO_B1_01_SAI1_TX_DATA00), /* pin 7 */ \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), /* pin 23 */ \
+        I2S_GPIO(2, SCK, TX, GPIO_EMC_06, IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK), /* pin 4 */ \
+        I2S_GPIO(2, WS, TX, GPIO_EMC_05, IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC), /* pin 3 */ \
+        I2S_GPIO(2, SD, TX, GPIO_EMC_04, IOMUXC_GPIO_EMC_04_SAI2_TX_DATA), /* pin 2 */ \
+        I2S_GPIO(2, MCK, TX, GPIO_EMC_07, IOMUXC_GPIO_EMC_07_SAI2_MCLK) /* pin 33 */ \
+    }
+
 #define USDHC_DUMMY_PIN NULL, 0
 #define MICROPY_USDHC1 \
     { \
@@ -69,3 +104,6 @@
         .data2 = { GPIO_SD_B0_04_USDHC1_DATA2 }, \
         .data3 = { GPIO_SD_B0_05_USDHC1_DATA3 }, \
     }
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/TEENSY40/pins.csv

@@ -52,4 +52,11 @@ A10,GPIO_AD_B0_12
 A11,GPIO_AD_B0_13
 A12,GPIO_AD_B1_14
 A13,GPIO_AD_B1_15
-LED,GPIO_B0_03
+LED,GPIO_B0_03
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_B1_00
+SCK_TX,GPIO_EMC_06
+WS_TX,GPIO_EMC_05
+SD_TX,GPIO_EMC_04

ports/mimxrt/boards/TEENSY41/mpconfigboard.h

@@ -58,6 +58,43 @@
     { IOMUXC_GPIO_AD_B1_07_LPI2C3_SCL }, { IOMUXC_GPIO_AD_B1_06_LPI2C3_SDA }, \
     { IOMUXC_GPIO_AD_B0_12_LPI2C4_SCL }, { IOMUXC_GPIO_AD_B0_13_LPI2C4_SDA },
 
+#define MICROPY_PY_MACHINE_I2S (1)
+#define MICROPY_HW_I2S_NUM (2)
+#define I2S_CLOCK_MUX { 0, kCLOCK_Sai1Mux, kCLOCK_Sai2Mux }
+#define I2S_CLOCK_PRE_DIV { 0, kCLOCK_Sai1PreDiv, kCLOCK_Sai2PreDiv }
+#define I2S_CLOCK_DIV { 0, kCLOCK_Sai1Div, kCLOCK_Sai2Div }
+#define I2S_IOMUXC_GPR_MODE { 0, kIOMUXC_GPR_SAI1MClkOutputDir, kIOMUXC_GPR_SAI2MClkOutputDir }
+#define I2S_DMA_REQ_SRC_RX { 0, kDmaRequestMuxSai1Rx, kDmaRequestMuxSai2Rx }
+#define I2S_DMA_REQ_SRC_TX { 0, kDmaRequestMuxSai1Tx, kDmaRequestMuxSai2Tx }
+
+#define I2S_GPIO(_hwid, _fn, _mode, _pin, _iomux) \
+    { \
+        .hw_id = _hwid, \
+        .fn = _fn, \
+        .mode = _mode, \
+        .name = MP_QSTR_##_pin, \
+        .iomux = {_iomux}, \
+    }
+
+#define I2S_GPIO_MAP \
+    { \
+        I2S_GPIO(1, SCK, RX, GPIO_AD_B1_11, IOMUXC_GPIO_AD_B1_11_SAI1_RX_BCLK), /* pin 21 */ \
+        I2S_GPIO(1, WS, RX, GPIO_AD_B1_10, IOMUXC_GPIO_AD_B1_10_SAI1_RX_SYNC), /* pin 20 */ \
+        I2S_GPIO(1, SD, RX, GPIO_AD_B1_12, IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00), /* pin 38 */ \
+        I2S_GPIO(1, SD, RX, GPIO_B1_00, IOMUXC_GPIO_B1_00_SAI1_RX_DATA00), /* pin 8 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_AD_B1_14, IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK), /* pin 26 */ \
+        I2S_GPIO(1, SCK, TX, GPIO_B1_02, IOMUXC_GPIO_B1_02_SAI1_TX_BCLK), /* pin 36 */ \
+        I2S_GPIO(1, WS, TX, GPIO_AD_B1_15, IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC), /* pin 27 */ \
+        I2S_GPIO(1, WS, TX, GPIO_B1_03, IOMUXC_GPIO_B1_03_SAI1_TX_SYNC), /* pin 37 */ \
+        I2S_GPIO(1, SD, TX, GPIO_AD_B1_13, IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00), /* pin 39 */ \
+        I2S_GPIO(1, SD, TX, GPIO_B1_01, IOMUXC_GPIO_B1_01_SAI1_TX_DATA00), /* pin 7 */ \
+        I2S_GPIO(1, MCK, TX, GPIO_AD_B1_09, IOMUXC_GPIO_AD_B1_09_SAI1_MCLK), /* pin 23 */ \
+        I2S_GPIO(2, SCK, TX, GPIO_EMC_06, IOMUXC_GPIO_EMC_06_SAI2_TX_BCLK), /* pin 4 */ \
+        I2S_GPIO(2, WS, TX, GPIO_EMC_05, IOMUXC_GPIO_EMC_05_SAI2_TX_SYNC), /* pin 3 */ \
+        I2S_GPIO(2, SD, TX, GPIO_EMC_04, IOMUXC_GPIO_EMC_04_SAI2_TX_DATA), /* pin 2 */ \
+        I2S_GPIO(2, MCK, TX, GPIO_EMC_07, IOMUXC_GPIO_EMC_07_SAI2_MCLK) /* pin 33 */ \
+    }
+
 #define USDHC_DUMMY_PIN NULL, 0
 #define MICROPY_USDHC1 \
     { \
@@ -90,3 +127,6 @@
     { IOMUXC_GPIO_B1_11_ENET_RX_ER, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_15_ENET_MDIO, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_14_ENET_MDC, 0, 0xB0E9u },
+
+#define MICROPY_BOARD_ROOT_POINTERS \
+    struct _machine_i2s_obj_t *machine_i2s_obj[MICROPY_HW_I2S_NUM];

ports/mimxrt/boards/TEENSY41/pins.csv

@@ -80,4 +80,11 @@ A10,GPIO_AD_B0_12
 A11,GPIO_AD_B0_13
 A12,GPIO_AD_B1_14
 A13,GPIO_AD_B1_15
-LED,GPIO_B0_03
+LED,GPIO_B0_03
+MCK,GPIO_AD_B1_09
+SCK_RX,GPIO_AD_B1_11
+WS_RX,GPIO_AD_B1_10
+SD_RX,GPIO_B1_00
+SCK_TX,GPIO_EMC_06
+WS_TX,GPIO_EMC_05
+SD_TX,GPIO_EMC_04

ports/mimxrt/dma_manager.c

@@ -24,7 +24,10 @@
  * THE SOFTWARE.
  */
 
-#include "dma_channel.h"
+#include <stdbool.h>
+#include "py/mpconfig.h"
+#include "fsl_edma.h"
+#include "dma_manager.h"
 
 // List of channel flags: true: channel used, false: channel available
 static bool channel_list[FSL_FEATURE_DMAMUX_MODULE_CHANNEL] = {
@@ -39,6 +42,8 @@ static bool channel_list[FSL_FEATURE_DMAMUX_MODULE_CHANNEL] = {
     #endif
 };
 
+STATIC bool dma_initialized = false;
+
 // allocate_channel(): retrieve an available channel. Return the number or -1
 int allocate_dma_channel(void) {
     for (int i = 0; i < ARRAY_SIZE(channel_list); i++) {
@@ -56,3 +61,12 @@ void free_dma_channel(int n) {
         channel_list[n] = false;
     }
 }
+
+void dma_init(void) {
+    if (!dma_initialized) {
+        edma_config_t dmaConfig;
+        EDMA_GetDefaultConfig(&dmaConfig);
+        EDMA_Init(DMA0, &dmaConfig);
+        dma_initialized = true;
+    }
+}

ports/mimxrt/dma_manager.h

@@ -30,5 +30,6 @@
 
 int allocate_dma_channel(void);
 void free_dma_channel(int n);
+void dma_init(void);
 
 #endif // MICROPY_INCLUDED_MIMXRT_DMACHANNEL_H

ports/mimxrt/machine_spi.c

@@ -30,7 +30,7 @@
 #include "py/mperrno.h"
 #include "extmod/machine_spi.h"
 #include "modmachine.h"
-#include "dma_channel.h"
+#include "dma_manager.h"
 
 #include "fsl_cache.h"
 #include "fsl_dmamux.h"
@@ -256,8 +256,6 @@ STATIC void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8
     bool use_dma = chan_rx >= 0 && chan_tx >= 0;
 
     if (use_dma) {
-        edma_config_t userConfig;
-
         /* DMA MUX init*/
         DMAMUX_Init(DMAMUX);
 
@@ -267,8 +265,7 @@ STATIC void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8
         DMAMUX_SetSource(DMAMUX, chan_tx, dma_req_src_tx[self->spi_hw_id]);
         DMAMUX_EnableChannel(DMAMUX, chan_tx);
 
-        EDMA_GetDefaultConfig(&userConfig);
-        EDMA_Init(DMA0, &userConfig);
+        dma_init();
 
         lpspi_master_edma_handle_t g_master_edma_handle;
         edma_handle_t lpspiEdmaMasterRxRegToRxDataHandle;

ports/mimxrt/main.c

@@ -113,6 +113,9 @@ int main(void) {
     soft_reset_exit:
         mp_printf(MP_PYTHON_PRINTER, "MPY: soft reboot\n");
         machine_pin_irq_deinit();
+        #if MICROPY_PY_MACHINE_I2S
+        machine_i2s_deinit_all();
+        #endif
         #if MICROPY_PY_NETWORK
         mod_network_deinit();
         #endif

ports/mimxrt/modmachine.c

@@ -131,6 +131,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_SoftI2C),             MP_ROM_PTR(&mp_machine_soft_i2c_type) },
     { MP_ROM_QSTR(MP_QSTR_SoftSPI),             MP_ROM_PTR(&mp_machine_soft_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_I2C),                 MP_ROM_PTR(&machine_i2c_type) },
+    #if MICROPY_PY_MACHINE_I2S
+    { MP_ROM_QSTR(MP_QSTR_I2S),                 MP_ROM_PTR(&machine_i2s_type) },
+    #endif
     { MP_ROM_QSTR(MP_QSTR_SPI),                 MP_ROM_PTR(&machine_spi_type) },
     { MP_ROM_QSTR(MP_QSTR_UART),                MP_ROM_PTR(&machine_uart_type) },
     { MP_ROM_QSTR(MP_QSTR_WDT),                 MP_ROM_PTR(&machine_wdt_type) },

ports/mimxrt/modmachine.h

@@ -31,6 +31,7 @@
 
 extern const mp_obj_type_t machine_adc_type;
 extern const mp_obj_type_t machine_i2c_type;
+extern const mp_obj_type_t machine_i2s_type;
 extern const mp_obj_type_t machine_pwm_type;
 extern const mp_obj_type_t machine_rtc_type;
 extern const mp_obj_type_t machine_sdcard_type;
@@ -45,5 +46,7 @@ void machine_pwm_deinit_all(void);
 void machine_timer_init_PIT(void);
 void machine_sdcard_init0(void);
 void mimxrt_sdram_init(void);
+void machine_i2s_init0();
+void machine_i2s_deinit_all(void);
 
 #endif // MICROPY_INCLUDED_MIMXRT_MODMACHINE_H

ports/mimxrt/mpconfigport.h

@@ -140,6 +140,9 @@ uint32_t trng_random_u32(void);
 #define MICROPY_PY_MACHINE_PWM_DUTY_U16_NS  (1)
 #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE  "ports/mimxrt/machine_pwm.c"
 #define MICROPY_PY_MACHINE_I2C              (1)
+#ifndef MICROPY_PY_MACHINE_I2S
+#define MICROPY_PY_MACHINE_I2S              (0)
+#endif
 #define MICROPY_PY_MACHINE_SOFTI2C          (1)
 #define MICROPY_PY_MACHINE_SPI              (1)
 #define MICROPY_PY_MACHINE_SOFTSPI          (1)
@@ -277,6 +280,10 @@ extern const struct _mp_obj_type_t network_lan_type;
 
 #define MICROPY_HW_PIT_NUM_CHANNELS 3
 
+#ifndef MICROPY_BOARD_ROOT_POINTERS
+#define MICROPY_BOARD_ROOT_POINTERS
+#endif
+
 #define MICROPY_PORT_ROOT_POINTERS \
     const char *readline_hist[8]; \
     struct _machine_timer_obj_t *timer_table[MICROPY_HW_PIT_NUM_CHANNELS]; \
@@ -285,6 +292,8 @@ extern const struct _mp_obj_type_t network_lan_type;
     mp_obj_list_t mod_network_nic_list; \
     /* root pointers for sub-systems */ \
     MICROPY_PORT_ROOT_POINTER_MBEDTLS \
+    /* root pointers defined by a board */ \
+        MICROPY_BOARD_ROOT_POINTERS \
 
 #define MP_STATE_PORT MP_STATE_VM
 
@@ -298,6 +307,10 @@ extern const struct _mp_obj_type_t network_lan_type;
 
 #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1))
 
+#define MP_HAL_CLEANINVALIDATE_DCACHE(addr, size) \
+    (SCB_CleanInvalidateDCache_by_Addr((uint32_t *)((uint32_t)addr & ~0x1f), \
+    ((uint32_t)((uint8_t *)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))
+
 #define MP_HAL_CLEAN_DCACHE(addr, size) \
     (SCB_CleanDCache_by_Addr((uint32_t *)((uint32_t)addr & ~0x1f), \
     ((uint32_t)((uint8_t *)addr + size + 0x1f) & ~0x1f) - ((uint32_t)addr & ~0x1f)))

ports/mimxrt/sdcard.c

@@ -822,7 +822,7 @@ bool sdcard_write(mimxrt_sdcard_obj_t *card, uint8_t *buffer, uint32_t block_num
         .command = &command,
     };
 
-    status_t status = sdcard_transfer_blocking(card->usdhc_inst, &card->handle, &transfer, 500);
+    status_t status = sdcard_transfer_blocking(card->usdhc_inst, &card->handle, &transfer, 3000);
 
     if (status == kStatus_Success) {
         card->status = command.response[0];