kopia lustrzana https://github.com/micropython/micropython
Merge 5bb75c5f70 into 01c31ea804
nmz787
GitHub
commit
19857d568d
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{
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"deploy": [
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"../deploy.md"
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],
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"docs": "",
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"features": [],
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"images": [
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"nucleo_g491re.jpg"
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],
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"mcu": "stm32g4",
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"product": "Nucleo G491RE",
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"thumbnail": "",
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"url": "",
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"vendor": "ST Microelectronics"
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}
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#define MICROPY_HW_BOARD_NAME "NUCLEO_G491RE"
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#define MICROPY_HW_MCU_NAME "STM32G491"
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_ADC (1)
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#define MICROPY_HW_ENABLE_DAC (1) // A4, A5
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#define MICROPY_HW_ENABLE_USB (0) // A12 (dp), A11 (dm)
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#define MICROPY_HW_HAS_SWITCH (1)
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#define MICROPY_HW_HAS_FLASH (0) // QSPI extflash not mounted
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#define MICROPY_PY_UASYNCIO (0)
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#define MICROPY_PY_UZLIB (0)
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#define MICROPY_PY_UBINASCII (0)
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#define MICROPY_PY_UHASHLIB (0)
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#define MICROPY_PY_UJSON (0)
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#define MICROPY_PY_URE (0)
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#define MICROPY_PY_FRAMEBUF (0)
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#define MICROPY_PY_USOCKET (0)
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#define MICROPY_PY_NETWORK (0)
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// The board has an 24MHz HSE, the following gives 170MHz CPU speed
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#define MICROPY_HW_CLK_PLLM (6)
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#define MICROPY_HW_CLK_PLLN (85)
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#define MICROPY_HW_CLK_PLLP (2)
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#define MICROPY_HW_CLK_PLLQ (8)
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#define MICROPY_HW_CLK_PLLR (2)
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#define MICROPY_HW_CLK_USE_HSI48 (1) // for RNG
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// 4 wait states
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_8
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// UART config
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#define MICROPY_HW_LPUART1_TX (pin_A2) // A2 (to STLINK), B11, C1
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#define MICROPY_HW_LPUART1_RX (pin_A3) // A3 (to STLINK), B10, C0
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#define MICROPY_HW_UART1_TX (pin_C4) // A9, B6, C4, E0
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#define MICROPY_HW_UART1_RX (pin_C5) // A10, B7, C5, E1
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// #define MICROPY_HW_UART2_TX (pin_A2) // A14, B3, D5
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// #define MICROPY_HW_UART2_RX (pin_A3) // A15, B4, D6
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// #define MICROPY_HW_UART2_RTS (pin_A1) // D4
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// #define MICROPY_HW_UART2_CTS (pin_A0) // D3
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#define MICROPY_HW_UART3_TX (pin_B10) // B9, B10, C10, D8
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#define MICROPY_HW_UART3_RX (pin_B11) // B8 = boot0, B11, C11, D9, E15
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// #define MICROPY_HW_UART3_RTS (pin_B14) // D12, F6
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// #define MICROPY_HW_UART3_CTS (pin_B13) // A13, D11
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// #define MICROPY_HW_UART4_TX (pin_) // C10
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// #define MICROPY_HW_UART4_RX (pin_) // C11
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#define MICROPY_HW_UART_REPL (PYB_LPUART_1) // default on Nucleo G491
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#define MICROPY_HW_UART_REPL_BAUD (115200)
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// I2C buses
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#define MICROPY_HW_I2C1_SCL (pin_B8) // A13, A15, B8 (=boot0)
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#define MICROPY_HW_I2C1_SDA (pin_B9) // A14, B7, B9
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// #define MICROPY_HW_I2C2_SCL (pin_) // A9, C4
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// #define MICROPY_HW_I2C2_SDA (pin_) // A8, F0
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// #define MICROPY_HW_I2C3_SCL (pin_) // A8, C8
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// #define MICROPY_HW_I2C3_SDA (pin_) // B5, C9, C11
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// SPI
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#define MICROPY_HW_SPI1_NSS (pin_A4) // A4, A15 (Nucleo64 specifies B6 as pin CS, must be done as GPIO, not as AF)
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#define MICROPY_HW_SPI1_SCK (pin_A5) // A5 (LED), B3 (SWO)
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#define MICROPY_HW_SPI1_MISO (pin_A6) // A6, B4
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#define MICROPY_HW_SPI1_MOSI (pin_A7) // A7, B5
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// #define MICROPY_HW_SPI2_NSS (pin_) // B12, D15, F0
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// #define MICROPY_HW_SPI2_SCK (pin_) // B13, F1, F9, F10
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// #define MICROPY_HW_SPI2_MISO (pin_) // A10, B14
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// #define MICROPY_HW_SPI2_MOSI (pin_) // A11, B15
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// #define MICROPY_HW_SPI3_NSS (pin_) // A4, A15
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// #define MICROPY_HW_SPI3_SCK (pin_) // B3, C10
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// #define MICROPY_HW_SPI3_MISO (pin_) // B4, C11
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// #define MICROPY_HW_SPI3_MOSI (pin_) // B5, C12
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// USRSW is pulled low. Pressing the button makes the input go high.
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#define MICROPY_HW_USRSW_PIN (pin_C13)
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#define MICROPY_HW_USRSW_PULL (GPIO_NOPULL)
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#define MICROPY_HW_USRSW_EXTI_MODE (GPIO_MODE_IT_RISING)
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#define MICROPY_HW_USRSW_PRESSED (1)
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// LEDs
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#define MICROPY_HW_LED1 (pin_A5) // green
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#define MICROPY_HW_LED_ON(pin) (mp_hal_pin_high(pin))
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#define MICROPY_HW_LED_OFF(pin) (mp_hal_pin_low(pin))
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// USB config pin A12 (dp), A11 (dm) not mounted on Nucleo
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// #define MICROPY_HW_USB_FS (1)
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// #define MICROPY_HW_USB_VBUS_DETECT_PIN (pin_A9)
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// #define MICROPY_HW_USB_OTG_ID_PIN (pin_A10)
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// FDCAN bus
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// User TODO: fit transceiver chip
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#define MICROPY_HW_CAN1_NAME "FDCAN1"
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#define MICROPY_HW_CAN1_TX (pin_A12) // A12, B9, D1
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#define MICROPY_HW_CAN1_RX (pin_A11) // A11, B8, D0
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@ -0,0 +1,6 @@
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# MCU settings
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MCU_SERIES = g4
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CMSIS_MCU = STM32G491xx
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MICROPY_FLOAT_IMPL = single
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AF_FILE = boards/stm32g491_af.csv
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LD_FILES = boards/stm32g491.ld boards/common_basic.ld
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A0,PA0
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A1,PA1
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A2,PA4
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A3,BPB0
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A4,PC1
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A5,PC0
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D0,PC5
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D1,PC4
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D2,PA10
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D3,PB3
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D4,PB5
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D5,PB4
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D6,PB10
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D7,PA8
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D8,PA9
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D9,PC7
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D10,PB6
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D11,PA7
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D12,PA6
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D13,PA5
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D14,PB9
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D15,PB8
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SW,PC13
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I2C_SDA,PB9
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I2C_SCL,PB8
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LED1,PA5
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SPI_MOSI,PA7
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SPI_MISO,PA6
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SPI_SCK,PA5
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SPI_CS,PB6
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LPUART1_TX,PA2
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LPUART1_RX,PA3
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UART1_TX,PC4
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UART1_RX,PC5
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CN7_1,PC10
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CN7_2,PC11
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CN7_3,PC12
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CN7_4,PD2
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CN7_7,PB8
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CN7_13,PA13
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CN7_15,PA14
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CN7_17,PA15
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CN7_21,PB7
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CN7_23,PC13
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CN7_25,PC14
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CN7_27,PC15
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CN7_28,PA0
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CN7_29,PF0
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CN7_30,PA1
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CN7_31,PF1
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CN7_32,PA4
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CN7_34,PB0
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CN7_35,PC2
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CN7_36,PC1
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CN7_37,PC3
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CN7_38,PC0
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CN10_1,PC9
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CN10_2,PC8
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CN10_3,PB8
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CN10_4,PC6
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CN10_5,PB9
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CN10_6,PC5
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CN10_11,PA5
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CN10_12,PA12
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CN10_13,PA6
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CN10_14,PA11
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CN10_15,PA7
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CN10_16,PB12
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CN10_17,PB6
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CN10_18,PB11
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CN10_19,PC7
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CN10_21,PA9
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CN10_22,PB2
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CN10_23,PA8
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CN10_24,PB1
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CN10_25,PB10
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CN10_26,PB15
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CN10_27,PB4
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CN10_28,PB14
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CN10_29,PB5
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CN10_30,PB13
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CN10_31,PB3
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CN10_33,PA10
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CN10_34,PC4
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CN10_35,PC4
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CN10_37,PC5
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/* This file is part of the MicroPython project, http://micropython.org/
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* The MIT License (MIT)
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* Copyright (c) 2019 Damien P. George
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*/
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#ifndef MICROPY_INCLUDED_STM32G4XX_HAL_CONF_H
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#define MICROPY_INCLUDED_STM32G4XX_HAL_CONF_H
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#include "boards/stm32g4xx_hal_conf_base.h"
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// Oscillator values in Hz
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#define HSE_VALUE (24000000)
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#define LSE_VALUE (32768)
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#define EXTERNAL_CLOCK_VALUE (24000)
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// Oscillator timeouts in ms
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#define HSE_STARTUP_TIMEOUT (100)
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#define LSE_STARTUP_TIMEOUT (5000)
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#endif // MICROPY_INCLUDED_STM32G4XX_HAL_CONF_H
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/* Specify the memory areas */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 112K
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 352K
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FLASH_FS (rx) : ORIGIN = 0x08058000, LENGTH = 160K /* starting @ 352K */
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}
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/* Generate a link error if heap and stack don't fit into RAM */
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_minimum_heap_size = 0x200; /* required amount of heap */
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_minimum_stack_size = 0x400; /* required amount of stack */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_micropy_hw_internal_flash_storage_ram_cache_end = ORIGIN(RAM) + LENGTH(RAM);
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_micropy_hw_internal_flash_storage_ram_cache_start = _micropy_hw_internal_flash_storage_ram_cache_end - 2K; /* fs cache = 2K RAM */
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/* Define the stack. The stack is full descending so begins just above last byte
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of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
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_estack = _micropy_hw_internal_flash_storage_ram_cache_start - _estack_reserve;
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_sstack = _estack - 8K; /* tunable */
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = _sstack;
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_micropy_hw_internal_flash_storage_start = ORIGIN(FLASH_FS);
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_micropy_hw_internal_flash_storage_end = ORIGIN(FLASH_FS) + LENGTH(FLASH_FS);
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Port,,AF0,AF1,AF2,AF3,AF4,AF5,AF6,AF7,AF8,AF9,AF10,AF11,AF12,AF13,AF14,AF15,
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,,I2C4/SYS_AF,LPTIM1/TIM2/5/15/16/17,I2C1/3/TIM1/2/3/4/5/8/20/15/COMP1,QUADSPI1/I2C3/4/SAI1/USB/HRTIM1/TIM8/20/15/COMP3,I2C1/2/3/4/TIM1/8/16/17,QUADSPI1/SPI1/2/3/4/I2S2/3/I2C4/UART4/5/TIM8/Infrared,QUADSPI1/SPI2/3/I2S2/3/TIM1/5/8/20/Infrared,USART1/2/3/CAN/COMP7/5/6,I2C3/4/UART4/5/LPUART1/COMP1/2/7/4/5/6/3,CAN/TIM1/8/15/CAN1/2,QUADSPI1/TIM2/3/4/8/17,LPTIM1/TIM1/8/CAN1/3,FMC/LPUART1/SAI1/HRTIM1/TIM1,SAI1SAI1/HRTIM1/OPAMP2,UART4/5/SAI1/TIM2/15/UCPD1,SYS,ADC,COMP,DAC,OPAMP
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PortA,PA0,,TIM2_CH1,,,,,,USART2_CTS,COMP1_OUT,TIM8_BKIN,TIM8_ETR,,,,TIM2_ETR,EVENTOUT,ADC12_IN1,COMP1_INM/COMP3_INP,,
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PortA,PA1,RTC_REFIN,TIM2_CH2,,,,,,USART2_RTS_DE,,TIM15_CH1N,,,,,,EVENTOUT,ADC12_IN2,COMP1_INP,,OPAMP1_VINP/OPAMP3_VINP/OPAMP6_VINM
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PortA,PA2,,TIM2_CH3,,,,,,USART2_TX,COMP2_OUT,TIM15_CH1,QUADSPI1_BK1_NCS,,LPUART1_TX,,UCPD1_FRSTX,EVENTOUT,ADC1_IN3,COMP2_INM,,OPAMP1_VOUT
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PortA,PA3,,TIM2_CH4,,SAI1_CK1,,,,USART2_RX,,TIM15_CH2,QUADSPI1_CLK,,LPUART1_RX,SAI1_MCLK_A,,EVENTOUT,ADC1_IN4,COMP2_INP,,OPAMP1_VINM/OPAMP1_VINP/OPAMP5_VINM
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PortA,PA4,,,TIM3_CH2,,,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_CK,,,,,,SAI1_FS_B,,EVENTOUT,ADC2_IN17,COMP1_INM,DAC1_OUT1,
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PortA,PA5,,TIM2_CH1,TIM2_ETR,,,SPI1_SCK,,,,,,,,,UCPD1_FRSTX,EVENTOUT,ADC2_IN13,COMP2_INM,DAC1_OUT2,OPAMP2_VINM
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PortA,PA6,,TIM16_CH1,TIM3_CH1,,TIM8_BKIN,SPI1_MISO,TIM1_BKIN,,COMP1_OUT,,QUADSPI1_BK1_IO3,,LPUART1_CTS,,,EVENTOUT,ADC2_IN3,,DAC2_OUT1,OPAMP2_VOUT
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PortA,PA7,,TIM17_CH1,TIM3_CH2,,TIM8_CH1N,SPI1_MOSI,TIM1_CH1N,,COMP2_OUT,,QUADSPI1_BK1_IO2,,,,UCPD1_FRSTX,EVENTOUT,ADC2_IN4,COMP2_INP,,OPAMP1_VINP/OPAMP2_VINP
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PortA,PA8,MCO,,I2C3_SCL,,I2C2_SDA,I2S2_MCK,TIM1_CH1,USART1_CK,COMP7_OUT,,TIM4_ETR,CAN3_RX,SAI1_CK2,HRTIM1_CHA1,SAI1_SCK_A,EVENTOUT,ADC5_IN1,,,OPAMP5_VOUT
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PortA,PA9,,,I2C3_SMBA,,I2C2_SCL,I2S3_MCK,TIM1_CH2,USART1_TX,COMP5_OUT,TIM15_BKIN,TIM2_CH3,,,HRTIM1_CHA2,SAI1_FS_A,EVENTOUT,ADC5_IN2,,,
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PortA,PA10,,TIM17_BKIN,,USB_CRS_SYNC,I2C2_SMBA,SPI2_MISO,TIM1_CH3,USART1_RX,COMP6_OUT,,TIM2_CH4,TIM8_BKIN,SAI1_D1,HRTIM1_CHB1,SAI1_SD_A,EVENTOUT,,,,
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PortA,PA11,,,,,,SPI2_MOSI/I2S2_SD,TIM1_CH1N,USART1_CTS,COMP1_OUT,CAN1_RX,TIM4_CH1,TIM1_CH4,TIM1_BKIN2,HRTIM1_CHB2,,EVENTOUT,,,,
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PortA,PA12,,TIM16_CH1,,,,I2SCKIN,TIM1_CH2N,USART1_RTS_DE,COMP2_OUT,CAN1_TX,TIM4_CH2,TIM1_ETR,,HRTIM1_FLT1,,EVENTOUT,,,,
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PortA,PA13,SWDIOJTMS,TIM16_CH1N,,I2C4_SCL,I2C1_SCL,IR_OUT,,USART3_CTS,,,TIM4_CH3,,,SAI1_SD_B,,EVENTOUT,,,,
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PortA,PA14,SWCLKJTCK,LPTIM1_OUT,,I2C4_SMBA,I2C1_SDA,TIM8_CH2,TIM1_BKIN,USART2_TX,,,,,,SAI1_FS_B,,EVENTOUT,,,,
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PortA,PA15,JTDI,TIM2_CH1,TIM8_CH1,,I2C1_SCL,SPI1_NSS,SPI3_NSS/I2S3_WS,USART2_RX,UART4_RTS_DE,TIM1_BKIN,,CAN3_TX,,HRTIM1_FLT2,TIM2_ETR,EVENTOUT,,,,
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PortB,PB0,,,TIM3_CH3,,TIM8_CH2N,,TIM1_CH2N,,,,QUADSPI1_BK1_IO1,,,HRTIM1_FLT5,UCPD1_FRSTX,EVENTOUT,ADC3_IN12/ADC1_IN15,COMP4_INP,,OPAMP2_VINP/OPAMP3_VINP
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PortB,PB1,,,TIM3_CH4,,TIM8_CH3N,,TIM1_CH3N,,COMP4_OUT,,QUADSPI1_BK1_IO0,,LPUART1_RTS_DE,HRTIM1_SCOUT,,EVENTOUT,ADC3_IN1/ADC1_IN12,COMP1_INP,,OPAMP3_VOUT/OPAMP6_VINM
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||||
PortB,PB2,RTC_OUT2,LPTIM1_OUT,,TIM20_CH1,I2C3_SMBA,,,,,,QUADSPI1_BK2_IO1,,,HRTIM1_SCIN,,EVENTOUT,ADC2_IN12,COMP4_INM,,OPAMP3_VINM
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PortB,PB3,JTDOTRACESWO,TIM2_CH2,TIM4_ETR,USB_CRS_SYNC,TIM8_CH1N,SPI1_SCK,SPI3_SCK/I2S3_CK,USART2_TX,,,TIM3_ETR,CAN3_RX,HRTIM1_SCOUT,HRTIM1_EEV9,SAI1_SCK_B,EVENTOUT,,,,
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PortB,PB4,JTRST,TIM16_CH1,TIM3_CH1,,TIM8_CH2N,SPI1_MISO,SPI3_MISO,USART2_RX,UART5_RTS_DE,,TIM17_BKIN,CAN3_TX,,HRTIM1_EEV7,SAI1_MCLK_B,EVENTOUT,,,,
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||||
PortB,PB5,,TIM16_BKIN,TIM3_CH2,TIM8_CH3N,I2C1_SMBA,SPI1_MOSI,SPI3_MOSI/I2S3_SD,USART2_CK,I2C3_SDA,CAN2_RX,TIM17_CH1,LPTIM1_IN1,SAI1_SD_B,HRTIM1_EEV6,UART5_CTS,EVENTOUT,,,,
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PortB,PB6,,TIM16_CH1N,TIM4_CH1,,,TIM8_CH1,TIM8_ETR,USART1_TX,COMP4_OUT,CAN2_TX,TIM8_BKIN2,LPTIM1_ETR,HRTIM1_SCIN,HRTIM1_EEV4,SAI1_FS_B,EVENTOUT,,,,
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PortB,PB7,,TIM17_CH1N,TIM4_CH2,I2C4_SDA,I2C1_SDA,TIM8_BKIN,,USART1_RX,COMP3_OUT,,TIM3_CH4,LPTIM1_IN2,FMC_NL,HRTIM1_EEV3,UART4_CTS,EVENTOUT,,,,
|
||||
PortB,PB8,,TIM16_CH1,TIM4_CH3,SAI1_CK1,I2C1_SCL,,,USART3_RX,COMP1_OUT,CAN1_RX,TIM8_CH2,,TIM1_BKIN,HRTIM1_EEV8,SAI1_MCLK_A,EVENTOUT,,,,
|
||||
PortB,PB9,,TIM17_CH1,TIM4_CH4,SAI1_D2,I2C1_SDA,,IR_OUT,USART3_TX,COMP2_OUT,CAN1_TX,TIM8_CH3,,TIM1_CH3N,HRTIM1_EEV5,SAI1_FS_A,EVENTOUT,,,,
|
||||
PortB,PB10,,TIM2_CH3,,,,,,USART3_TX,LPUART1_RX,,QUADSPI1_CLK,,TIM1_BKIN,HRTIM1_FLT3,SAI1_SCK_A,EVENTOUT,,COMP5_INM,,OPAMP3_VINM/OPAMP4_VINM
|
||||
PortB,PB11,,TIM2_CH4,,,,,,USART3_RX,LPUART1_TX,,QUADSPI1_BK1_NCS,,,HRTIM1_FLT4,,EVENTOUT,ADC12_IN14,COMP6_INP,,OPAMP4_VINP/OPAMP6_VOUT
|
||||
PortB,PB12,,,,,I2C2_SMBA,SPI2_NSS/I2S2_WS,TIM1_BKIN,USART3_CK,LPUART1_RTS_DE,CAN2_RX,,,,HRTIM1_CHC1,,EVENTOUT,ADC4_IN3/ADC1_IN11,COMP7_INM,,OPAMP4_VOUT/OPAMP6_VINP
|
||||
PortB,PB13,,,,,,SPI2_SCK/I2S2_CK,TIM1_CH1N,USART3_CTS,LPUART1_CTS,CAN2_TX,,,,HRTIM1_CHC2,,EVENTOUT,ADC3_IN5,COMP5_INP,,OPAMP3_VINP/OPAMP4_VINP/OPAMP6_VINP
|
||||
PortB,PB14,,TIM15_CH1,,,,SPI2_MISO,TIM1_CH2N,USART3_RTS_DE,COMP4_OUT,,,,,HRTIM1_CHD1,,EVENTOUT,ADC4_IN4/ADC1_IN5,COMP7_INP,,OPAMP2_VINP/OPAMP5_VINP
|
||||
PortB,PB15,RTC_REFIN,TIM15_CH2,TIM15_CH1N,COMP3_OUT,TIM1_CH3N,SPI2_MOSI/I2S2_SD,,,,,,,,HRTIM1_CHD2,,EVENTOUT,ADC4_IN5/ADC2_IN15,COMP6_INM,,OPAMP5_VINM
|
||||
PortC,PC0,,LPTIM1_IN1,TIM1_CH1,,,,,,LPUART1_RX,,,,,,,EVENTOUT,ADC12_IN6,COMP3_INM,
|
||||
PortC,PC1,,LPTIM1_OUT,TIM1_CH2,,,,,,LPUART1_TX,,QUADSPI1_BK2_IO0,,,SAI1_SD_A,,EVENTOUT,ADC12_IN7,COMP3_INP,,
|
||||
PortC,PC2,,LPTIM1_IN2,TIM1_CH3,COMP3_OUT,,,TIM20_CH2,,,,QUADSPI1_BK2_IO1,,,,,EVENTOUT,ADC12_IN8,,
|
||||
PortC,PC3,,LPTIM1_ETR,TIM1_CH4,SAI1_D1,,,TIM1_BKIN2,,,,QUADSPI1_BK2_IO2,,,SAI1_SD_A,,EVENTOUT,ADC12_IN9,,,OPAMP5_VINP
|
||||
PortC,PC4,,,TIM1_ETR,,I2C2_SCL,,,USART1_TX,,,QUADSPI1_BK2_IO3,,,,,EVENTOUT,ADC2_IN5,,,
|
||||
PortC,PC5,,,TIM15_BKIN,SAI1_D3,,,TIM1_CH4N,USART1_RX,,,,,,HRTIM1_EEV10,,EVENTOUT,ADC2_IN11,,,OPAMP1_VINM/OPAMP2_VINM
|
||||
PortC,PC6,,,TIM3_CH1,HRTIM1_EEV10,TIM8_CH1,,I2S2_MCK,COMP6_OUT,I2C4_SCL,,,,,HRTIM1_CHF1,,EVENTOUT,,,,
|
||||
PortC,PC7,,,TIM3_CH2,HRTIM1_FLT5,TIM8_CH2,,I2S3_MCK,COMP5_OUT,I2C4_SDA,,,,,HRTIM1_CHF2,,EVENTOUT,,,,
|
||||
PortC,PC8,,,TIM3_CH3,HRTIM1_CHE1,TIM8_CH3,,TIM20_CH3,COMP7_OUT,I2C3_SCL,,,,,,,EVENTOUT,,,,
|
||||
PortC,PC9,,,TIM3_CH4,HRTIM1_CHE2,TIM8_CH4,I2SCKIN,TIM8_BKIN2,,I2C3_SDA,,,,,,,EVENTOUT,,,,
|
||||
PortC,PC10,,,,,TIM8_CH1N,UART4_TX,SPI3_SCK/I2S3_CK,USART3_TX,,,,,,HRTIM1_FLT6,,EVENTOUT,,,,
|
||||
PortC,PC11,,,,HRTIM1_EEV2,TIM8_CH2N,UART4_RX,SPI3_MISO,USART3_RX,I2C3_SDA,,,,,,,EVENTOUT,,,,
|
||||
PortC,PC12,,,,HRTIM1_EEV1,TIM8_CH3N,UART5_TX,SPI3_MOSI/I2S3_SD,USART3_CK,,,,,,,UCPD1_FRSTX,EVENTOUT,,,,
|
||||
PortC,PC13,,,TIM1_BKIN,,TIM1_CH1N,,TIM8_CH4N,,,,,,,,,EVENTOUT,,,,
|
||||
PortC,PC14,,,,,,,,,,,,,,,,EVENTOUT,,,,
|
||||
PortC,PC15,,,,,,,,,,,,,,,,EVENTOUT,,,,
|
||||
PortD,PD0,,,,,,,TIM8_CH4N,,,CAN1_RX,,,FMC_D2,,,EVENTOUT,,,,
|
||||
PortD,PD1,,,,,TIM8_CH4,,TIM8_BKIN2,,,CAN1_TX,,,FMC_D3,,,EVENTOUT,,,,
|
||||
PortD,PD2,,,TIM3_ETR,,TIM8_BKIN,UART5_RX,,,,,,,,,,EVENTOUT,,,,
|
||||
PortD,PD3,,,TIM2_CH1/TIM2_ETR,,,,,USART2_CTS,,,QUADSPI1_BK2_NCS,,FMC_CLK,,,EVENTOUT,,,,
|
||||
PortD,PD4,,,TIM2_CH2,,,,,USART2_RTS_DE,,,QUADSPI1_BK2_IO0,,FMC_NOE,,,EVENTOUT,,,,
|
||||
PortD,PD5,,,,,,,,USART2_TX,,,QUADSPI1_BK2_IO1,,FMC_NWE,,,EVENTOUT,,,,
|
||||
PortD,PD6,,,TIM2_CH4,SAI1_D1,,,,USART2_RX,,,QUADSPI1_BK2_IO2,,FMC_NWAIT,SAI1_SD_A,,EVENTOUT,,,,
|
||||
PortD,PD7,,,TIM2_CH3,,,,,USART2_CK,,,QUADSPI1_BK2_IO3,,FMC_NCE/FMC_NE1,,,EVENTOUT,,,,
|
||||
PortD,PD8,,,,,,,,USART3_TX,,,,,FMC_D13,,,EVENTOUT,ADC4_IN12/ADC5_IN12,,,OPAMP4_VINM
|
||||
PortD,PD9,,,,,,,,USART3_RX,,,,,FMC_D14,,,EVENTOUT,ADC4_IN13/ADC5_IN13,,,OPAMP6_VINP
|
||||
PortD,PD10,,,,,,,,USART3_CK,,,,,FMC_D15,,,EVENTOUT,ADC345_IN7,COMP6_INM,,
|
||||
PortD,PD11,,,,,I2C4_SMBA,,,USART3_CTS,,,,,FMC_A16,,,EVENTOUT,ADC345_IN8,COMP6_INP,,OPAMP4_VINP
|
||||
PortD,PD12,,,TIM4_CH1,,,,,USART3_RTS_DE,,,,,FMC_A17,,,EVENTOUT,ADC345_IN9,COMP5_INP,,OPAMP5_VINP
|
||||
PortD,PD13,,,TIM4_CH2,,,,,,,,,,FMC_A18,,,EVENTOUT,ADC345_IN10,COMP5_INM,,
|
||||
PortD,PD14,,,TIM4_CH3,,,,,,,,,,FMC_D0,,,EVENTOUT,ADC345_IN11,COMP7_INP,,OPAMP2_VINP
|
||||
PortD,PD15,,,TIM4_CH4,,,,SPI2_NSS,,,,,,FMC_D1,,,EVENTOUT,,COMP7_INM,,
|
||||
PortE,PE0,,,TIM4_ETR,TIM20_CH4N,TIM16_CH1,,TIM20_ETR,USART1_TX,,CAN1_RXFD,,,FMC_NBL0,,,EVENTOUT,,,,
|
||||
PortE,PE1,,,,,TIM17_CH1,,TIM20_CH4,USART1_RX,,,,,FMC_NBL1,,,EVENTOUT,,,,
|
||||
PortE,PE2,TRACECK,,TIM3_CH1,SAI1_CK1,,SPI4_SCK,TIM20_CH1,,,,,,FMC_A23,SAI1_MCLK_A,,EVENTOUT,,,,
|
||||
PortE,PE3,TRACED0,,TIM3_CH2,,,SPI4_NSS,TIM20_CH2,,,,,,FMC_A19,SAI1_SD_B,,EVENTOUT,,,,
|
||||
PortE,PE4,TRACED1,,TIM3_CH3,SAI1_D2,,SPI4_NSS,TIM20_CH1N,,,,,,FMC_A20,SAI1_FS_A,,EVENTOUT,,,,
|
||||
PortE,PE5,TRACED2,,TIM3_CH4,SAI1_CK2,,SPI4_MISO,TIM20_CH2N,,,,,,FMC_A21,SAI1_SCK_A,,EVENTOUT,,,,
|
||||
PortE,PE6,TRACED3,,,SAI1_D1,,SPI4_MOSI,TIM20_CH3N,,,,,,FMC_A22,SAI1_SD_A,,EVENTOUT,,,,
|
||||
PortE,PE7,,,TIM1_ETR,,,,,,,,,,FMC_D4,SAI1_SD_B,,EVENTOUT,ADC3_IN4,COMP4_INP,,
|
||||
PortE,PE8,,,TIM1_CH1N,,,,,,,,,,FMC_D5,SAI1_SCK_B,,EVENTOUT,ADC345_IN6,COMP4_INM,,
|
||||
PortE,PE9,,,TIM1_CH1,,,,,,,,,,FMC_D6,SAI1_FS_B,,EVENTOUT,ADC3_IN2,,,
|
||||
PortE,PE10,,,TIM1_CH2N,,,,,,,,QUADSPI1_CLK,,FMC_D7,SAI1_MCLK_B,,EVENTOUT,ADC345_IN14,,,
|
||||
PortE,PE11,,,TIM1_CH2,,,SPI4_NSS,,,,,QUADSPI1_BK1_NCS,,FMC_D8,,,EVENTOUT,ADC345_IN15,,,
|
||||
PortE,PE12,,,TIM1_CH3N,,,SPI4_SCK,,,,,QUADSPI1_BK1_IO0,,FMC_D9,,,EVENTOUT,ADC345_IN16,,,
|
||||
PortE,PE13,,,TIM1_CH3,,,SPI4_MISO,,,,,QUADSPI1_BK1_IO1,,FMC_D10,,,EVENTOUT,ADC3_IN3,,,
|
||||
PortE,PE14,,,TIM1_CH4,,,SPI4_MOSI,TIM1_BKIN2,,,,QUADSPI1_BK1_IO2,,FMC_D11,,,EVENTOUT,ADC4_IN1,,,
|
||||
PortE,PE15,,,TIM1_BKIN,,,,TIM1_CH4N,USART3_RX,,,QUADSPI1_BK1_IO3,,FMC_D12,,,EVENTOUT,ADC4_IN2,,,
|
||||
PortF,PF0,,,,,I2C2_SDA,SPI2_NSS/I2S2_WS,TIM1_CH3N,,,,,,,,,EVENTOUT,ADC1_IN10,,,
|
||||
PortF,PF1,,,,,,SPI2_SCK/I2S2_CK,,,,,,,,,,EVENTOUT,ADC2_IN10,COMP3_INM,,
|
||||
PortF,PF2,,,TIM20_CH3,,I2C2_SMBA,,,,,,,,FMC_A2,,,EVENTOUT,,,,
|
||||
PortF,PF3,,,TIM20_CH4,,I2C3_SCL,,,,,,,,FMC_A3,,,EVENTOUT,,,,
|
||||
PortF,PF4,,,COMP1_OUT,TIM20_CH1N,I2C3_SDA,,,,,,,,FMC_A4,,,EVENTOUT,,,,
|
||||
PortF,PF5,,,TIM20_CH2N,,,,,,,,,,FMC_A5,,,EVENTOUT,,,,
|
||||
PortF,PF6,,,TIM4_CH4,SAI1_SD_B,I2C2_SCL,,,USART3_RTS,,,QUADSPI1_BK1_IO3,,,,,EVENTOUT,,,,
|
||||
PortF,PF7,,,TIM20_BKIN,,,,,,,,QUADSPI1_BK1_IO2,,FMC_A1,SAI1_MCLK_B,,EVENTOUT,,,,
|
||||
PortF,PF8,,,TIM20_BKIN2,,,,,,,,QUADSPI1_BK1_IO0,,FMC_A24,SAI1_SCK_B,,EVENTOUT,,,,
|
||||
PortF,PF9,,,TIM20_BKIN,TIM15_CH1,,SPI2_SCK,,,,,QUADSPI1_BK1_IO1,,FMC_A25,SAI1_FS_B,,EVENTOUT,,,,
|
||||
PortF,PF10,,,TIM20_BKIN2,TIM15_CH2,,SPI2_SCK,,,,,QUADSPI1_CLK,,FMC_A0,SAI1_D3,,EVENTOUT,,,,
|
||||
PortF,PF11,,,TIM20_ETR,,,,,,,,,,FMC_NE4,,,EVENTOUT,,,,
|
||||
PortF,PF12,,,TIM20_CH1,,,,,,,,,,FMC_A6,,,EVENTOUT,,,,
|
||||
PortF,PF13,,,TIM20_CH2,,I2C4_SMBA,,,,,,,,FMC_A7,,,EVENTOUT,,,,
|
||||
PortF,PF14,,,TIM20_CH3,,I2C4_SCL,,,,,,,,FMC_A8,,,EVENTOUT,,,,
|
||||
PortF,PF15,,,TIM20_CH4,,I2C4_SDA,,,,,,,,FMC_A9,,,EVENTOUT,,,,
|
||||
PortG,PG0,,,TIM20_CH1N,,,,,,,,,,FMC_A10,,,EVENTOUT,,,,
|
||||
PortG,PG1,,,TIM20_CH2N,,,,,,,,,,FMC_A11,,,EVENTOUT,,,,
|
||||
PortG,PG2,,,TIM20_CH3N,,,SPI1_SCK,,,,,,,FMC_A12,,,EVENTOUT,,,,
|
||||
PortG,PG3,,,TIM20_BKIN,,I2C4_SCL,SPI1_MISO,TIM20_CH4N,,,,,,FMC_A13,,,EVENTOUT,,,,
|
||||
PortG,PG4,,,TIM20_BKIN2,,I2C4_SDA,SPI1_MOSI,,,,,,,FMC_A14,,,EVENTOUT,,,,
|
||||
PortG,PG5,,,TIM20_ETR,,,SPI1_NSS,,,LPUART1_CTS,,,,FMC_A15,,,EVENTOUT,,,,
|
||||
PortG,PG6,,,TIM20_BKIN,,I2C3_SMBA,,,,LPUART1_RTS_DE,,,,FMC_INT,,,EVENTOUT,,,,
|
||||
PortG,PG7,,,,SAI1_CK1,I2C3_SCL,,,,LPUART1_TX,,,,FMC_INT,SAI1_MCLK_A,,EVENTOUT,,,,
|
||||
PortG,PG8,,,,,I2C3_SDA,,,,LPUART1_RX,,,,FMC_NE3,,,EVENTOUT,,,,
|
||||
PortG,PG9,,,,,,,SPI3_SCK,USART1_TX,,,,,FMC_NCE/FMC_NE2,,TIM15_CH1N,EVENTOUT,,,,
|
||||
PortG,PG10,MCO,,,,,,,,,,,,,,,EVENTOUT
|
||||
|
Ładowanie…
Reference in New Issue