kopia lustrzana https://github.com/micropython/micropython
stm32/mpu: Add MPU config for shared, uncached memory region.
Signed-off-by: iabdalkader <i.abdalkader@gmail.com>pull/12961/head
rodzic
b726022509
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162054be85
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@ -36,6 +36,7 @@
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#define MPU_REGION_QSPI3 (MPU_REGION_NUMBER3)
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#define MPU_REGION_SDRAM1 (MPU_REGION_NUMBER4)
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#define MPU_REGION_SDRAM2 (MPU_REGION_NUMBER5)
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#define MPU_REGION_OPENAMP (MPU_REGION_NUMBER15)
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// Only relevant on CPUs with D-Cache, must be higher priority than SDRAM
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#define MPU_REGION_DMA_UNCACHED_1 (MPU_REGION_NUMBER6)
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@ -94,6 +95,18 @@
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| MPU_REGION_ENABLE << MPU_RASR_ENABLE_Pos \
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)
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#define MPU_CONFIG_SHARED_UNCACHED(size) ( \
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MPU_INSTRUCTION_ACCESS_DISABLE << MPU_RASR_XN_Pos \
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| MPU_REGION_FULL_ACCESS << MPU_RASR_AP_Pos \
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| MPU_TEX_LEVEL1 << MPU_RASR_TEX_Pos \
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| MPU_ACCESS_SHAREABLE << MPU_RASR_S_Pos \
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| MPU_ACCESS_NOT_CACHEABLE << MPU_RASR_C_Pos \
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| MPU_ACCESS_NOT_BUFFERABLE << MPU_RASR_B_Pos \
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| 0x00 << MPU_RASR_SRD_Pos \
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| (size) << MPU_RASR_SIZE_Pos \
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| MPU_REGION_ENABLE << MPU_RASR_ENABLE_Pos \
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)
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static inline void mpu_init(void) {
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MPU->CTRL = MPU_PRIVILEGED_DEFAULT | MPU_CTRL_ENABLE_Msk;
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SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
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