2015-06-10 12:06:48 +00:00
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/*
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2017-06-30 07:22:17 +00:00
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* This file is part of the MicroPython project, http://micropython.org/
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2015-06-10 12:06:48 +00:00
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2015 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2018-02-15 04:47:04 +00:00
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#ifndef MICROPY_INCLUDED_STM32_DMA_H
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#define MICROPY_INCLUDED_STM32_DMA_H
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2016-03-22 10:28:35 +00:00
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2024-02-20 01:14:44 +00:00
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#include "py/mpconfig.h"
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2016-03-22 10:28:35 +00:00
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typedef struct _dma_descr_t dma_descr_t;
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2023-08-11 19:26:50 +00:00
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#if defined(STM32H5)
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// STM32H5 GPDMA doesn't feature circular mode directly, so define doesn't exist in
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// stm32 driver header. Define it here to make users like DAC driver happy.
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#define DMA_CIRCULAR 0x00000001
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#endif
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2023-03-22 05:38:49 +00:00
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#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7) || defined(STM32G0) || defined(STM32H5) || defined(STM32H7)
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_I2C_1_RX;
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extern const dma_descr_t dma_SPI_3_RX;
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2016-11-25 00:21:18 +00:00
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extern const dma_descr_t dma_I2C_4_RX;
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_3_TX;
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2016-11-25 00:21:18 +00:00
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extern const dma_descr_t dma_I2C_4_TX;
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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extern const dma_descr_t dma_SPI_3_TX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_2_TX;
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2018-09-11 07:20:34 +00:00
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extern const dma_descr_t dma_SDMMC_2;
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_SPI_5_RX;
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2018-09-11 07:20:34 +00:00
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extern const dma_descr_t dma_SDIO_0;
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_SPI_4_RX;
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extern const dma_descr_t dma_SPI_5_TX;
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extern const dma_descr_t dma_SPI_4_TX;
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extern const dma_descr_t dma_SPI_6_TX;
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extern const dma_descr_t dma_SPI_1_TX;
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2018-09-11 07:20:34 +00:00
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extern const dma_descr_t dma_SDMMC_2;
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_SPI_6_RX;
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2018-09-11 07:20:34 +00:00
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extern const dma_descr_t dma_SDIO_0;
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2018-09-17 03:47:54 +00:00
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extern const dma_descr_t dma_DCMI_0;
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2021-04-17 04:27:40 +00:00
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extern const dma_descr_t dma_I2S_1_RX;
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extern const dma_descr_t dma_I2S_1_TX;
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extern const dma_descr_t dma_I2S_2_RX;
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extern const dma_descr_t dma_I2S_2_TX;
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2016-03-22 10:28:35 +00:00
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2021-01-26 13:49:56 +00:00
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#elif defined(STM32G4)
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_1_RX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_I2C_3_TX;
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extern const dma_descr_t dma_UART_3_RX;
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extern const dma_descr_t dma_UART_3_TX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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extern const dma_descr_t dma_UART_1_RX;
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extern const dma_descr_t dma_UART_1_TX;
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extern const dma_descr_t dma_LPUART_1_RX;
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extern const dma_descr_t dma_LPUART_1_TX;
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extern const dma_descr_t dma_ADC_1;
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extern const dma_descr_t dma_MEM_2_MEM;
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2019-07-05 07:24:59 +00:00
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#elif defined(STM32L0)
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_I2C_3_TX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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2022-09-19 08:56:31 +00:00
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_1_RX;
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#elif defined(STM32L1)
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_SPI_3_TX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_SPI_3_RX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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2019-07-05 07:24:59 +00:00
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_1_RX;
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2021-02-22 00:55:12 +00:00
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#elif defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
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2016-03-22 10:28:35 +00:00
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extern const dma_descr_t dma_ADC_1_RX;
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extern const dma_descr_t dma_ADC_2_RX;
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_I2C_3_TX;
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extern const dma_descr_t dma_ADC_3_RX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_1_RX;
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extern const dma_descr_t dma_SPI_3_RX;
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extern const dma_descr_t dma_SPI_3_TX;
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2018-09-11 07:20:34 +00:00
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extern const dma_descr_t dma_SDIO_0;
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2019-05-20 12:00:41 +00:00
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extern const dma_descr_t dma_I2C_4_TX;
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extern const dma_descr_t dma_I2C_4_RX;
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2022-07-08 02:46:27 +00:00
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extern const dma_descr_t dma_SPI_SUBGHZ_TX;
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extern const dma_descr_t dma_SPI_SUBGHZ_RX;
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2016-03-22 10:28:35 +00:00
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#endif
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2015-11-16 01:02:43 +00:00
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2021-09-15 11:12:53 +00:00
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// API that configures the DMA via the HAL.
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2018-09-11 07:18:06 +00:00
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void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data);
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void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, uint32_t dir, void *data);
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2016-03-22 10:28:35 +00:00
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void dma_deinit(const dma_descr_t *dma_descr);
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void dma_invalidate_channel(const dma_descr_t *dma_descr);
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2021-09-15 11:12:53 +00:00
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// API that configures the DMA directly and does not use the HAL.
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2019-04-24 05:51:19 +00:00
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void dma_nohal_init(const dma_descr_t *descr, uint32_t config);
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void dma_nohal_deinit(const dma_descr_t *descr);
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void dma_nohal_start(const dma_descr_t *descr, uint32_t src_addr, uint32_t dst_addr, uint16_t len);
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2021-09-15 11:12:53 +00:00
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// API to be used if DMA is controlled externally, to ensure the clock remains enabled.
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// - controller: should be 0 or 1, corresponding to DMA1 or DMA2
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// - stream: should be 0 to N, corresponding to Stream0..StreamN, or Channel1..ChannelN
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void dma_external_acquire(uint32_t controller, uint32_t stream);
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void dma_external_release(uint32_t controller, uint32_t stream);
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2024-02-20 01:14:44 +00:00
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#if __DCACHE_PRESENT
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// On chips with D-Cache, it's necessary to call this function before using DMA to read
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// into a user-supplied buffer. It does two things:
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//
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// 1) Cleans this region in the cache.
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//
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// 2) Temporarily disables caching for the first and last cache lines of the
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// buffer. This prevents cache coherency issues if the start or end of the
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// buffer don't align to a cache line. (For example, this can happen if the CPU
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// accesses unrelated memory adjacent to the buffer and in the same cache
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// line.)
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//
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// Only one region can be protected in this way at a time.
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void dma_protect_rx_region(void *dest, size_t len);
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// Release the region protected by dma_protect_rx_region().
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//
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// Call this after the DMA operation completes, before the CPU reads any of the
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// data that was written.
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//
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// As well as restoring data caching, this function invalidates D-cache for the
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// entire specified region.
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void dma_unprotect_rx_region(void *dest, size_t len);
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#else
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inline static void dma_protect_rx_region(uint8_t *dest, size_t len) {
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// No-ops on targets without D-Cache.
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}
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inline static void dma_unprotect_rx_region(void *dest, size_t len) {
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}
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#endif // __DCACHE_PRESENT
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2018-02-15 04:47:04 +00:00
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#endif // MICROPY_INCLUDED_STM32_DMA_H
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