kopia lustrzana https://github.com/fsphil/hadie
Switched to using a single pin for RTTY
rodzic
a0aa94751f
commit
201c0d5b18
15
rtty.c
15
rtty.c
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@ -16,11 +16,10 @@
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#include "rtty.h"
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#include "rtty.h"
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/* MARK = Upper tone, Idle, bit */
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/* MARK = Upper tone, Idle, bit */
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#define TXENABLE (0x04)
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#define TXPIN (1 << 0) /* PB0 */
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#define MARK (0x02)
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#define TXENABLE (1 << 1) /* PB1 */
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#define SPACE (0x01)
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#define TXBIT(b) PORTB = (PORTB & ~(MARK | SPACE)) | (b)
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#define TXBIT(b) PORTB = (PORTB & ~TXPIN) | ((b) ? TXPIN : 0)
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volatile uint8_t txpgm = 0;
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volatile uint8_t txpgm = 0;
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volatile uint8_t *txbuf = 0;
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volatile uint8_t *txbuf = 0;
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@ -41,7 +40,7 @@ ISR(TIMER0_COMPA_vect)
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default: b = byte & 1; byte >>= 1; break;
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default: b = byte & 1; byte >>= 1; break;
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}
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}
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TXBIT(b ? MARK : SPACE);
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TXBIT(b);
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if(bit == 0 && txlen > 0)
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if(bit == 0 && txlen > 0)
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{
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{
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@ -59,10 +58,10 @@ void rtx_init()
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OCR0A = F_CPU / 1024 / RTTY_BAUD;
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OCR0A = F_CPU / 1024 / RTTY_BAUD;
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TIMSK0 = _BV(OCIE0A); /* Enable interrupt */
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TIMSK0 = _BV(OCIE0A); /* Enable interrupt */
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/* We use Port B pins 1, 2 and 3 */
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/* We use Port B pins 1 and 2 */
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TXBIT(MARK);
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TXBIT(1);
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PORTB |= TXENABLE;
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PORTB |= TXENABLE;
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DDRB |= MARK | SPACE | TXENABLE;
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DDRB |= TXPIN | TXENABLE;
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}
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}
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void inline rtx_wait()
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void inline rtx_wait()
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