From 06f7931b07dce92a46cee689325d75603876335c Mon Sep 17 00:00:00 2001
From: Philip Heron <phil@sanslogic.co.uk>
Date: Sat, 25 Jun 2011 00:03:13 +0100
Subject: [PATCH] Updates done for hadie:3 flight code

---
 gps.c  |  4 ++--
 rtty.c | 12 +++++++++---
 rtty.h |  1 +
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/gps.c b/gps.c
index b69db60..3e5fa7e 100644
--- a/gps.c
+++ b/gps.c
@@ -349,9 +349,9 @@ void gps_init(void)
 {
 	rxline[0] = '\0';
 	
-	/* Do UART1 initialisation, 38400 baud @ 7.3728 MHz */
+	/* Do UART1 initialisation, 9600 baud @ 7.3728 MHz */
 	UBRR1H = 0;
-	UBRR1L = 11;
+	UBRR1L = 47;
 	
 	/* Enable RX, TX and RX interrupt */
 	UCSR1B = (1 << RXEN1) | (1 << TXEN1) | (1 << RXCIE1);
diff --git a/rtty.c b/rtty.c
index 3d33f87..c0151f0 100644
--- a/rtty.c
+++ b/rtty.c
@@ -21,7 +21,7 @@ extern inline void gps_tick(void);
 
 /* MARK = Upper tone, Idle, bit  */
 #define TXPIN    (1 << 0) /* PB0 */
-#define TXENABLE (1 << 2) /* PB2 */
+#define TXENABLE (1 << 1) /* PB1 */
 
 #define TXBIT(b) PORTB = (PORTB & ~TXPIN) | ((b) ? TXPIN : 0)
 
@@ -59,6 +59,12 @@ ISR(TIMER0_COMPA_vect)
 	gps_tick();
 }
 
+void rtx_enable(char en)
+{
+	if(en) PORTB |= TXENABLE;
+	else PORTB &= ~TXENABLE;
+}
+
 void rtx_init(void)
 {
 	/* RTTY is driven by TIMER0 in CTC mode */
@@ -69,8 +75,8 @@ void rtx_init(void)
 	
 	/* We use Port B pins 1 and 2 */
 	TXBIT(1);
-	PORTB |= TXENABLE;
-	DDRB |= TXPIN | TXENABLE;
+	rtx_enable(0);
+	DDRB  |= TXPIN | TXENABLE;
 }
 
 void inline rtx_wait(void)
diff --git a/rtty.h b/rtty.h
index eea29d1..0c438e9 100644
--- a/rtty.h
+++ b/rtty.h
@@ -14,6 +14,7 @@
 #include <avr/pgmspace.h>
 
 extern void rtx_init(void);
+extern void rtx_enable(char en);
 extern void inline rtx_wait(void);
 extern void rtx_data(uint8_t *data, size_t length);
 extern void rtx_data_P(PGM_P data, size_t length);