kopia lustrzana https://github.com/espressif/esp-idf
106 wiersze
5.5 KiB
C
106 wiersze
5.5 KiB
C
/*
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* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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//Interrupt hardware source table
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//This table is decided by hardware, don't touch this.
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typedef enum {
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ETS_WIFI_MAC_INTR_SOURCE = 0, /**< interrupt of WiFi MAC, level*/
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ETS_WIFI_MAC_NMI_SOURCE, /**< interrupt of WiFi MAC, NMI, use if MAC have bug to fix in NMI*/
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ETS_WIFI_PWR_INTR_SOURCE, /**< */
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ETS_WIFI_BB_INTR_SOURCE, /**< interrupt of WiFi BB, level, we can do some calibration*/
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ETS_BT_MAC_INTR_SOURCE, /**< will be cancelled*/
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ETS_BT_BB_INTR_SOURCE, /**< interrupt of BT BB, level*/
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ETS_BT_BB_NMI_SOURCE, /**< interrupt of BT BB, NMI, use if BB have bug to fix in NMI*/
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ETS_LP_TIMER_INTR_SOURCE,
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ETS_COEX_INTR_SOURCE,
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ETS_BLE_TIMER_INTR_SOURCE,
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ETS_BLE_SEC_INTR_SOURCE,
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ETS_I2C_MASTER_SOURCE, /**< interrupt of I2C Master, level*/
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ETS_ZB_MAC_INTR_SOURCE,
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ETS_PMU_INTR_SOURCE,
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ETS_EFUSE_INTR_SOURCE, /**< interrupt of efuse, level, not likely to use*/
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ETS_LP_RTC_TIMER_INTR_SOURCE,
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ETS_LP_UART_INTR_SOURCE,
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ETS_LP_I2C_INTR_SOURCE,
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ETS_LP_WDT_INTR_SOURCE,
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ETS_LP_PERI_TIMEOUT_INTR_SOURCE,
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ETS_LP_APM_M0_INTR_SOURCE,
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ETS_LP_APM_M1_INTR_SOURCE,
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ETS_HUK_INTR_SOURCE,
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ETS_FROM_CPU_INTR0_SOURCE, /**< interrupt0 generated from a CPU, level*/
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ETS_FROM_CPU_INTR1_SOURCE, /**< interrupt1 generated from a CPU, level*/
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ETS_FROM_CPU_INTR2_SOURCE, /**< interrupt2 generated from a CPU, level*/
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ETS_FROM_CPU_INTR3_SOURCE, /**< interrupt3 generated from a CPU, level*/
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ETS_ASSIST_DEBUG_INTR_SOURCE, /**< interrupt of Assist debug module, LEVEL*/
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ETS_TRACE_INTR_SOURCE,
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ETS_CACHE_INTR_SOURCE,
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ETS_CPU_PERI_TIMEOUT_INTR_SOURCE,
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ETS_GPIO_INTR_SOURCE, /**< interrupt of GPIO, level*/
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ETS_GPIO_NMI_SOURCE, /**< interrupt of GPIO, NMI*/
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ETS_PAU_INTR_SOURCE,
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ETS_HP_PERI_TIMEOUT_INTR_SOURCE,
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ETS_MODEM_PERI_TIMEOUT_INTR_SOURCE,
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ETS_HP_APM_M0_INTR_SOURCE,
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ETS_HP_APM_M1_INTR_SOURCE,
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ETS_HP_APM_M2_INTR_SOURCE,
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ETS_HP_APM_M3_INTR_SOURCE,
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ETS_HP_APM_M4_INTR_SOURCE,
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ETS_LP_APM0_INTR_SOURCE,
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ETS_MSPI_INTR_SOURCE,
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ETS_I2S1_INTR_SOURCE, /**< interrupt of I2S1, level*/
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ETS_UHCI0_INTR_SOURCE, /**< interrupt of UHCI0, level*/
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ETS_UART0_INTR_SOURCE, /**< interrupt of UART0, level*/
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ETS_UART1_INTR_SOURCE, /**< interrupt of UART1, level*/
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ETS_LEDC_INTR_SOURCE, /**< interrupt of LED PWM, level*/
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ETS_TWAI0_INTR_SOURCE, /**< interrupt of can0, level*/
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ETS_TWAI0_TIMER_INTR_SOURCE, /**< interrupt of can0 timer, level*/
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ETS_TWAI1_INTR_SOURCE, /**< interrupt of can1, level*/
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ETS_TWAI1_TIMER_INTR_SOURCE, /**< interrupt of can0 timer, level*/
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ETS_USB_SERIAL_JTAG_INTR_SOURCE, /**< interrupt of USB, level*/
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ETS_RMT_INTR_SOURCE, /**< interrupt of remote controller, level*/
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ETS_I2C_EXT0_INTR_SOURCE, /**< interrupt of I2C controller1, level*/
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ETS_TG0_T0_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP0, TIMER0, level*/
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ETS_TG0_WDT_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP0, WATCH DOG, level*/
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ETS_TG1_T0_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP1, TIMER0, level*/
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ETS_TG1_WDT_LEVEL_INTR_SOURCE, /**< interrupt of TIMER_GROUP1, WATCHDOG, level*/
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ETS_SYSTIMER_TARGET0_INTR_SOURCE, /**< interrupt of system timer 0 */
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ETS_SYSTIMER_TARGET1_INTR_SOURCE, /**< interrupt of system timer 1 */
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ETS_SYSTIMER_TARGET2_INTR_SOURCE, /**< interrupt of system timer 2 */
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ETS_APB_ADC_INTR_SOURCE, /**< interrupt of APB ADC, LEVEL*/
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ETS_MCPWM0_INTR_SOURCE, /**< interrupt of MCPWM0, LEVEL*/
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ETS_PCNT_INTR_SOURCE,
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ETS_PARL_IO_TX_INTR_SOURCE,
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ETS_PARL_IO_RX_INTR_SOURCE,
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ETS_DMA_IN_CH0_INTR_SOURCE, /**< interrupt of general DMA IN channel 0, LEVEL*/
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ETS_DMA_IN_CH1_INTR_SOURCE, /**< interrupt of general DMA IN channel 1, LEVEL*/
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ETS_DMA_IN_CH2_INTR_SOURCE, /**< interrupt of general DMA IN channel 2, LEVEL*/
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ETS_DMA_OUT_CH0_INTR_SOURCE, /**< interrupt of general DMA OUT channel 0, LEVEL*/
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ETS_DMA_OUT_CH1_INTR_SOURCE, /**< interrupt of general DMA OUT channel 1, LEVEL*/
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ETS_DMA_OUT_CH2_INTR_SOURCE, /**< interrupt of general DMA OUT channel 2, LEVEL*/
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ETS_GPSPI2_INTR_SOURCE,
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ETS_AES_INTR_SOURCE, /**< interrupt of AES accelerator, level*/
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ETS_SHA_INTR_SOURCE, /**< interrupt of SHA accelerator, level*/
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ETS_RSA_INTR_SOURCE, /**< interrupt of RSA accelerator, level*/
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ETS_ECC_INTR_SOURCE, /**< interrupt of ECC accelerator, level*/
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ETS_ECDSA_INTR_SOURCE,
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ETS_KM_INTR_SOURCE,
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ETS_MAX_INTR_SOURCE,
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} periph_interrupt_t;
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extern const char * const esp_isr_names[ETS_MAX_INTR_SOURCE];
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#ifdef __cplusplus
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}
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#endif
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