kopia lustrzana https://github.com/espressif/esp-idf
123 wiersze
4.7 KiB
C
123 wiersze
4.7 KiB
C
/*
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* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#pragma once
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#include "esp_bit_defs.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if !SOC_MMU_PAGE_SIZE
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/**
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* We define `SOC_MMU_PAGE_SIZE` in soc/CMakeLists.txt.
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* Here we give a default definition, if SOC_MMU_PAGE_SIZE doesn't exist. This is to pass the check_public_headers.py
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*/
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#define SOC_MMU_PAGE_SIZE 0x10000
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#endif
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#define SOC_IRAM0_ADDRESS_LOW 0x4ff00000
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#define SOC_IRAM0_ADDRESS_HIGH 0x4ffc0000
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#define SOC_DRAM0_ADDRESS_LOW SOC_IRAM0_ADDRESS_LOW
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#define SOC_DRAM0_ADDRESS_HIGH SOC_IRAM0_ADDRESS_HIGH
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#define SOC_IRAM0_CACHE_ADDRESS_LOW 0x40000000
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#define SOC_IRAM0_CACHE_ADDRESS_HIGH 0x50000000
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#define SOC_DRAM0_CACHE_ADDRESS_LOW SOC_IRAM0_CACHE_ADDRESS_LOW //I/D share the same vaddr range
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#define SOC_DRAM0_CACHE_ADDRESS_HIGH SOC_IRAM0_CACHE_ADDRESS_HIGH //I/D share the same vaddr range
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#define SOC_DRAM_FLASH_ADDRESS_LOW SOC_DRAM0_CACHE_ADDRESS_LOW
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#define SOC_DRAM_FLASH_ADDRESS_HIGH 0x44000000
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#define SOC_DRAM_PSRAM_ADDRESS_LOW 0x48000000
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#define SOC_DRAM_PSRAM_ADDRESS_HIGH 0x4C000000
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#define SOC_BUS_SIZE(bus_name) (bus_name##_ADDRESS_HIGH - bus_name##_ADDRESS_LOW)
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#define SOC_ADDRESS_IN_BUS(bus_name, vaddr) ((vaddr) >= bus_name##_ADDRESS_LOW && (vaddr) < bus_name##_ADDRESS_HIGH)
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#define SOC_ADDRESS_IN_IRAM0_CACHE(vaddr) SOC_ADDRESS_IN_BUS(SOC_IRAM0_CACHE, vaddr)
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#define SOC_ADDRESS_IN_DRAM0_CACHE(vaddr) SOC_ADDRESS_IN_BUS(SOC_DRAM0_CACHE, vaddr)
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#define SOC_ADDRESS_IN_DRAM_FLASH(vaddr) SOC_ADDRESS_IN_BUS(SOC_DRAM_FLASH, vaddr)
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#define SOC_ADDRESS_IN_DRAM_PSRAM(vaddr) SOC_ADDRESS_IN_BUS(SOC_DRAM_PSRAM, vaddr)
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#define SOC_MMU_FLASH_VALID BIT(12)
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#define SOC_MMU_FLASH_INVALID 0
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#define SOC_MMU_PSRAM_VALID BIT(11)
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#define SOC_MMU_PSRAM_INVALID 0
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#define SOC_MMU_ACCESS_FLASH 0
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#define SOC_MMU_ACCESS_PSRAM BIT(10)
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#define SOC_MMU_FLASH_SENSITIVE BIT(13)
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#define SOC_MMU_PSRAM_SENSITIVE BIT(12)
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/**
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* MMU entry valid bit mask for mapping value.
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* - For a Flash MMU entry:
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* physical page number is BIT(0)~BIT(10), so value bits are 0x7ff
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* - For a PSRAM MMU entry:
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* physical page number is BIT(0)~BIT(9), so value bits are 0x3ff
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*/
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#define SOC_MMU_FLASH_VALID_VAL_MASK 0x7ff
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#define SOC_MMU_PSRAM_VALID_VAL_MASK 0x3ff
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/**
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* Max MMU available paddr page num.
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* `SOC_MMU_MAX_PADDR_PAGE_NUM * SOC_MMU_PAGE_SIZE` means the max paddr address supported by the MMU. e.g.:
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* 32768 * 64KB, means MMU can support 2GB paddr at most
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*/
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#define SOC_MMU_FLASH_MAX_PADDR_PAGE_NUM 32768
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#define SOC_MMU_PSRAM_MAX_PADDR_PAGE_NUM 16384
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//MMU entry num
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#define SOC_MMU_ENTRY_NUM 1024
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/**
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* This is the mask used for mapping. e.g.:
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* 0x4000_0000 & SOC_MMU_VADDR_MASK
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*/
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#define SOC_MMU_VADDR_MASK ((SOC_MMU_PAGE_SIZE) * SOC_MMU_ENTRY_NUM - 1)
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#define SOC_MMU_FLASH_VADDR_BASE 0x40000000
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#define SOC_MMU_PSRAM_VADDR_BASE 0x48000000
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/*------------------------------------------------------------------------------
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* MMU Linear Address
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*----------------------------------------------------------------------------*/
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/**
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* - 64KB MMU page size: the last 0xFFFF, which is the offset
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* - 1024 MMU entries for flash, 1024 MMU entries for psram, needs 0xFFF to hold it.
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*
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* Therefore, 0x3F,FFFF
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*/
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#define SOC_MMU_LINEAR_ADDR_MASK 0xFFFFFFF
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/**
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* - If high linear address isn't 0, this means MMU can recognize these addresses
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* - If high linear address is 0, this means MMU linear address range is equal or smaller than vaddr range.
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* Under this condition, we use the max linear space.
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*/
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#define SOC_MMU_FLASH_LINEAR_ADDRESS_LOW (SOC_DRAM_FLASH_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
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#if ((SOC_DRAM_FLASH_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
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#define SOC_MMU_FLASH_LINEAR_ADDRESS_HIGH (SOC_DRAM_FLASH_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
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#else
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#define SOC_MMU_FLASH_LINEAR_ADDRESS_HIGH (SOC_MMU_LINEAR_ADDR_MASK + 1)
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#endif
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#define SOC_MMU_PSRAM_LINEAR_ADDRESS_LOW (SOC_DRAM_PSRAM_ADDRESS_LOW & SOC_MMU_LINEAR_ADDR_MASK)
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#if ((SOC_DRAM_PSRAM_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK) > 0)
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#define SOC_MMU_PSRAM_LINEAR_ADDRESS_HIGH (SOC_DRAM_PSRAM_ADDRESS_HIGH & SOC_MMU_LINEAR_ADDR_MASK)
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#else
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#define SOC_MMU_PSRAM_LINEAR_ADDRESS_HIGH (SOC_MMU_LINEAR_ADDR_MASK + 1)
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#endif
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#ifdef __cplusplus
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}
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#endif
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