kopia lustrzana https://github.com/espressif/esp-idf
658 wiersze
28 KiB
C
658 wiersze
28 KiB
C
/*
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* FreeRTOS Kernel V10.5.1
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* Copyright (C) 2015-2019 Cadence Design Systems, Inc.
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* Copyright (C) 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* SPDX-FileCopyrightText: 2015-2019 Cadence Design Systems, Inc
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* SPDX-FileCopyrightText: 2021 Amazon.com, Inc. or its affiliates
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*
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* SPDX-License-Identifier: MIT
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*
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* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#include "sdkconfig.h"
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <xtensa/config/core.h>
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#include <xtensa_context.h>
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#include "soc/soc_caps.h"
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#include "esp_attr.h"
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#include "esp_private/crosscore_int.h"
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#include "esp_private/esp_int_wdt.h"
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#include "esp_system.h"
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#include "esp_log.h"
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#include "FreeRTOS.h" /* This pulls in portmacro.h */
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#include "task.h" /* Required for TaskHandle_t, tskNO_AFFINITY, and vTaskStartScheduler */
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#include "port_systick.h"
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#include "esp_cpu.h"
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#include "esp_memory_utils.h"
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_Static_assert(portBYTE_ALIGNMENT == 16, "portBYTE_ALIGNMENT must be set to 16");
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/* ---------------------------------------------------- Variables ------------------------------------------------------
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* - Various variables used to maintain the FreeRTOS port's state. Used from both port.c and various .S files
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* - Constant offsets are used by assembly to jump to particular TCB members or a stack area (such as the CPSA). We use
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* C constants instead of preprocessor macros due to assembly lacking "offsetof()".
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* ------------------------------------------------------------------------------------------------------------------ */
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#if XCHAL_CP_NUM > 0
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/* Offsets used to navigate to a task's CPSA on the stack */
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const DRAM_ATTR uint32_t offset_pxEndOfStack = offsetof(StaticTask_t, pxDummy8);
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const DRAM_ATTR uint32_t offset_cpsa = XT_CP_SIZE; /* Offset to start of the CPSA area on the stack. See uxInitialiseStackCPSA(). */
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#if configNUM_CORES > 1
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/* Offset to TCB_t.xCoreID member. Used to pin unpinned tasks that use the FPU. */
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const DRAM_ATTR uint32_t offset_xCoreID = offsetof(StaticTask_t, xDummyCoreID);
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#endif /* configNUM_CORES > 1 */
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#endif /* XCHAL_CP_NUM > 0 */
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volatile unsigned port_xSchedulerRunning[portNUM_PROCESSORS] = {0}; // Indicates whether scheduler is running on a per-core basis
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unsigned port_interruptNesting[portNUM_PROCESSORS] = {0}; // Interrupt nesting level. Increased/decreased in portasm.c, _frxt_int_enter/_frxt_int_exit
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BaseType_t port_uxCriticalNesting[portNUM_PROCESSORS] = {0};
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BaseType_t port_uxOldInterruptState[portNUM_PROCESSORS] = {0};
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/*
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*******************************************************************************
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* Interrupt stack. The size of the interrupt stack is determined by the config
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* parameter "configISR_STACK_SIZE" in FreeRTOSConfig.h
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*******************************************************************************
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*/
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volatile StackType_t DRAM_ATTR __attribute__((aligned(16))) port_IntStack[portNUM_PROCESSORS][configISR_STACK_SIZE];
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/* One flag for each individual CPU. */
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volatile uint32_t port_switch_flag[portNUM_PROCESSORS];
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/* ------------------------------------------------ FreeRTOS Portable --------------------------------------------------
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* - Provides implementation for functions required by FreeRTOS
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* - Declared in portable.h
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* ------------------------------------------------------------------------------------------------------------------ */
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// ----------------- Scheduler Start/End -------------------
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/* Defined in xtensa_context.S */
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extern void _xt_coproc_init(void);
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BaseType_t xPortStartScheduler( void )
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{
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portDISABLE_INTERRUPTS();
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// Interrupts are disabled at this point and stack contains PS with enabled interrupts when task context is restored
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#if XCHAL_CP_NUM > 0
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/* Initialize co-processor management for tasks. Leave CPENABLE alone. */
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_xt_coproc_init();
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#endif
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/* Setup the hardware to generate the tick. */
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vPortSetupTimer();
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port_xSchedulerRunning[xPortGetCoreID()] = 1;
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// Cannot be directly called from C; never returns
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__asm__ volatile ("call0 _frxt_dispatch\n");
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/* Should not get here. */
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return pdTRUE;
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}
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void vPortEndScheduler( void )
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{
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/* It is unlikely that the Xtensa port will get stopped. If required simply
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disable the tick interrupt here. */
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abort();
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}
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// ------------------------ Stack --------------------------
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// User exception dispatcher when exiting
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void _xt_user_exit(void);
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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// Wrapper to allow task functions to return (increases stack overhead by 16 bytes)
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static void vPortTaskWrapper(TaskFunction_t pxCode, void *pvParameters)
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{
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pxCode(pvParameters);
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//FreeRTOS tasks should not return. Log the task name and abort.
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char *pcTaskName = pcTaskGetName(NULL);
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ESP_LOGE("FreeRTOS", "FreeRTOS Task \"%s\" should not return, Aborting now!", pcTaskName);
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abort();
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}
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#endif
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/**
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* @brief Align stack pointer in a downward growing stack
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*
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* This macro is used to round a stack pointer downwards to the nearest n-byte boundary, where n is a power of 2.
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* This macro is generally used when allocating aligned areas on a downward growing stack.
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*/
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#define STACKPTR_ALIGN_DOWN(n, ptr) ((ptr) & (~((n)-1)))
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#if XCHAL_CP_NUM > 0
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/**
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* @brief Allocate and initialize coprocessor save area on the stack
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*
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* This function allocates the coprocessor save area on the stack (sized XT_CP_SIZE) which includes...
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* - Individual save areas for each coprocessor (size XT_CPx_SA, inclusive of each area's alignment)
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* - Coprocessor context switching flags (e.g., XT_CPENABLE, XT_CPSTORED, XT_CP_CS_ST, XT_CP_ASA).
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*
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* The coprocessor save area is aligned to a 16-byte boundary.
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* The coprocessor context switching flags are then initialized
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*
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* @param[in] uxStackPointer Current stack pointer address
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* @return Stack pointer that points to allocated and initialized the coprocessor save area
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*/
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FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackCPSA(UBaseType_t uxStackPointer)
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{
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/*
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HIGH ADDRESS
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|-------------------| XT_CP_SIZE
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| CPn SA | ^
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| ... | |
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| CP0 SA | |
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| ----------------- | | ---- XCHAL_TOTAL_SA_ALIGN aligned
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|-------------------| | 12 bytes
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| XT_CP_ASA | | ^
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| XT_CP_CS_ST | | |
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| XT_CPSTORED | | |
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| XT_CPENABLE | | |
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|-------------------| ---------------------- 16 byte aligned
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LOW ADDRESS
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*/
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// Allocate overall coprocessor save area, aligned down to 16 byte boundary
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uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - XT_CP_SIZE);
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// Initialize the coprocessor context switching flags.
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uint32_t *p = (uint32_t *)uxStackPointer;
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p[0] = 0; // Clear XT_CPENABLE and XT_CPSTORED
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p[1] = 0; // Clear XT_CP_CS_ST
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// XT_CP_ASA points to the aligned start of the individual CP save areas (i.e., start of CP0 SA)
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p[2] = (uint32_t)ALIGNUP(XCHAL_TOTAL_SA_ALIGN, (uint32_t)uxStackPointer + 12);
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return uxStackPointer;
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}
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#endif /* XCHAL_CP_NUM > 0 */
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/**
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* @brief Allocate and initialize GCC TLS area
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*
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* This function allocates and initializes the area on the stack used to store GCC TLS (Thread Local Storage) variables.
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* - The area's size is derived from the TLS section's linker variables, and rounded up to a multiple of 16 bytes
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* - The allocated area is aligned to a 16-byte aligned address
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* - The TLS variables in the area are then initialized
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*
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* Each task access the TLS variables using the THREADPTR register plus an offset to obtain the address of the variable.
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* The value for the THREADPTR register is also calculated by this function, and that value should be use to initialize
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* the THREADPTR register.
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*
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* @param[in] uxStackPointer Current stack pointer address
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* @param[out] ret_threadptr_reg_init Calculated THREADPTR register initialization value
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* @return Stack pointer that points to the TLS area
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*/
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FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackTLS(UBaseType_t uxStackPointer, uint32_t *ret_threadptr_reg_init)
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{
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/*
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TLS layout at link-time, where 0xNNN is the offset that the linker calculates to a particular TLS variable.
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LOW ADDRESS
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|---------------------------| Linker Symbols
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| Section | --------------
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| .flash.rodata |
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0x0|---------------------------| <- _flash_rodata_start
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^ | Other Data |
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| |---------------------------| <- _thread_local_start
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| | .tbss | ^
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V | | |
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0xNNN | int example; | | tls_area_size
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| .tdata | V
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|---------------------------| <- _thread_local_end
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| Other data |
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| ... |
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|---------------------------|
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HIGH ADDRESS
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*/
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// Calculate the TLS area's size (rounded up to multiple of 16 bytes).
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extern int _thread_local_start, _thread_local_end, _flash_rodata_start, _flash_rodata_align;
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const uint32_t tls_area_size = ALIGNUP(16, (uint32_t)&_thread_local_end - (uint32_t)&_thread_local_start);
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// TODO: check that TLS area fits the stack
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// Allocate space for the TLS area on the stack. The area must be allocated at a 16-byte aligned address
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uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - (UBaseType_t)tls_area_size);
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// Initialize the TLS area with the initialization values of each TLS variable
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memcpy((void *)uxStackPointer, &_thread_local_start, tls_area_size);
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/*
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Calculate the THREADPTR register's initialization value based on the link-time offset and the TLS area allocated on
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the stack.
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HIGH ADDRESS
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|---------------------------|
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| .tdata (*) |
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^ | int example; |
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| | |
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| | .tbss (*) |
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| |---------------------------| <- uxStackPointer (start of TLS area)
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0xNNN | | | ^
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| ... | (_thread_local_start - _flash_rodata_start) + align_up(TCB_SIZE, tls_section_alignment)
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| | | |
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| | | V
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V | | <- threadptr register's value
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LOW ADDRESS
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Note: Xtensa is slightly different compared to the RISC-V port as there is an implicit aligned TCB_SIZE added to
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the offset. (search for 'tpoff' in elf32-xtensa.c in BFD):
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- "offset = address - tls_section_vma + align_up(TCB_SIZE, tls_section_alignment)"
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- TCB_SIZE is hardcoded to 8
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*/
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const uint32_t tls_section_align = (uint32_t)&_flash_rodata_align; // ALIGN value of .flash.rodata section
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#define TCB_SIZE 8
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const uint32_t base = ALIGNUP(tls_section_align, TCB_SIZE);
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*ret_threadptr_reg_init = (uint32_t)uxStackPointer - ((uint32_t)&_thread_local_start - (uint32_t)&_flash_rodata_start) - base;
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return uxStackPointer;
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}
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/**
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* @brief Initialize the task's starting interrupt stack frame
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*
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* This function initializes the task's starting interrupt stack frame. The dispatcher will use this stack frame in a
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* context restore routine. Therefore, the starting stack frame must be initialized as if the task was interrupted right
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* before its first instruction is called.
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*
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* - The stack frame is allocated to a 16-byte aligned address
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* - The THREADPTR register is saved in the extra storage area of the stack frame. This is also initialized
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*
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* @param[in] uxStackPointer Current stack pointer address
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* @param[in] pxCode Task function
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* @param[in] pvParameters Task function's parameter
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* @param[in] threadptr_reg_init THREADPTR register initialization value
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* @return Stack pointer that points to the stack frame
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*/
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FORCE_INLINE_ATTR UBaseType_t uxInitialiseStackFrame(UBaseType_t uxStackPointer, TaskFunction_t pxCode, void *pvParameters, uint32_t threadptr_reg_init)
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{
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/*
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HIGH ADDRESS
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|---------------------------| ^ XT_STK_FRMSZ
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| Stack Frame Extra Storage | |
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| ------------------------- | | ^ XT_STK_EXTRA
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| Intr/Exc Stack Frame | | |
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| | V V
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| ------------------------- | ---------------------- 16 byte aligned
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LOW ADDRESS
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*/
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/*
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Allocate space for the task's starting interrupt stack frame.
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- The stack frame must be allocated to a 16-byte aligned address.
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- We use XT_STK_FRMSZ (instead of sizeof(XtExcFrame)) as it...
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- includes the size of the extra storage area
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- includes the size for a base save area before the stack frame
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- rounds up the total size to a multiple of 16
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*/
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UBaseType_t uxStackPointerPrevious = uxStackPointer;
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uxStackPointer = STACKPTR_ALIGN_DOWN(16, uxStackPointer - XT_STK_FRMSZ);
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// Clear the entire interrupt stack frame
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memset((void *)uxStackPointer, 0, (size_t)(uxStackPointerPrevious - uxStackPointer));
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XtExcFrame *frame = (XtExcFrame *)uxStackPointer;
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/*
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Initialize common registers
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*/
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frame->a0 = 0; // Set the return address to 0 terminate GDB backtrace
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frame->a1 = uxStackPointer + XT_STK_FRMSZ; // Saved stack pointer should point to physical top of stack frame
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frame->exit = (UBaseType_t) _xt_user_exit; // User exception exit dispatcher
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/*
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Initialize the task's entry point. This will differ depending on
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- Whether the task's entry point is the wrapper function or pxCode
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- Whether Windowed ABI is used (for windowed, we mimic the task entry point being call4'd )
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*/
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#if CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
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frame->pc = (UBaseType_t) vPortTaskWrapper; // Task entry point is the wrapper function
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#ifdef __XTENSA_CALL0_ABI__
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frame->a2 = (UBaseType_t) pxCode; // Wrapper function's argument 0 (which is the task function)
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frame->a3 = (UBaseType_t) pvParameters; // Wrapper function's argument 1 (which is the task function's argument)
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#else // __XTENSA_CALL0_ABI__
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frame->a6 = (UBaseType_t) pxCode; // Wrapper function's argument 0 (which is the task function), passed as if we call4'd
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frame->a7 = (UBaseType_t) pvParameters; // Wrapper function's argument 1 (which is the task function's argument), passed as if we call4'd
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#endif // __XTENSA_CALL0_ABI__
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#else
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frame->pc = (UBaseType_t) pxCode; // Task entry point is the provided task function
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#ifdef __XTENSA_CALL0_ABI__
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frame->a2 = (UBaseType_t) pvParameters; // Task function's argument
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#else // __XTENSA_CALL0_ABI__
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frame->a6 = (UBaseType_t) pvParameters; // Task function's argument, passed as if we call4'd
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#endif // __XTENSA_CALL0_ABI__
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#endif
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/*
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Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode.
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For windowed ABI also set WOE and CALLINC (pretend task was 'call4'd)
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*/
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#ifdef __XTENSA_CALL0_ABI__
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frame->ps = PS_UM | PS_EXCM;
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#else // __XTENSA_CALL0_ABI__
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frame->ps = PS_UM | PS_EXCM | PS_WOE | PS_CALLINC(1);
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#endif // __XTENSA_CALL0_ABI__
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#ifdef XT_USE_SWPRI
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// Set the initial virtual priority mask value to all 1's.
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frame->vpri = 0xFFFFFFFF;
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#endif
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// Initialize the threadptr register in the extra save area of the stack frame
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uint32_t *threadptr_reg = (uint32_t *)(uxStackPointer + XT_STK_EXTRA);
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*threadptr_reg = threadptr_reg_init;
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return uxStackPointer;
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}
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#if ( portHAS_STACK_OVERFLOW_CHECKING == 1 )
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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StackType_t * pxEndOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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#else
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StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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TaskFunction_t pxCode,
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void * pvParameters )
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#endif
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{
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#ifdef __clang_analyzer__
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// Teach clang-tidy that pxTopOfStack cannot be a pointer to const
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volatile StackType_t * pxTemp = pxTopOfStack;
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pxTopOfStack = pxTemp;
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#endif /*__clang_analyzer__ */
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/*
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HIGH ADDRESS
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|---------------------------| <- pxTopOfStack on entry
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| Coproc Save Area | (CPSA MUST BE FIRST)
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| ------------------------- |
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| TLS Variables |
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| ------------------------- | <- Start of useable stack
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| Starting stack frame |
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| ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
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| | |
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| | |
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| V |
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----------------------------- <- Bottom of stack
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LOW ADDRESS
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- All stack areas are aligned to 16 byte boundary
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- We use UBaseType_t for all of stack area initialization functions for more convenient pointer arithmetic
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*/
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UBaseType_t uxStackPointer = (UBaseType_t)pxTopOfStack;
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// Make sure the incoming stack pointer is aligned on 16
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configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
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#if XCHAL_CP_NUM > 0
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// Initialize the coprocessor save area. THIS MUST BE THE FIRST AREA due to access from _frxt_task_coproc_state()
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uxStackPointer = uxInitialiseStackCPSA(uxStackPointer);
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// Each allocated section on the stack must have a size aligned on 16
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configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
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#endif /* XCHAL_CP_NUM > 0 */
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// Initialize the GCC TLS area
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uint32_t threadptr_reg_init;
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uxStackPointer = uxInitialiseStackTLS(uxStackPointer, &threadptr_reg_init);
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configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
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// Initialize the starting interrupt stack frame
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uxStackPointer = uxInitialiseStackFrame(uxStackPointer, pxCode, pvParameters, threadptr_reg_init);
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configASSERT((uxStackPointer & portBYTE_ALIGNMENT_MASK) == 0);
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// Return the task's current stack pointer address which should point to the starting interrupt stack frame
|
|
return (StackType_t *)uxStackPointer;
|
|
}
|
|
|
|
|
|
|
|
/* ---------------------------------------------- Port Implementations -------------------------------------------------
|
|
*
|
|
* ------------------------------------------------------------------------------------------------------------------ */
|
|
|
|
// --------------------- Interrupts ------------------------
|
|
|
|
BaseType_t xPortInIsrContext(void)
|
|
{
|
|
unsigned int irqStatus;
|
|
BaseType_t ret;
|
|
irqStatus = portSET_INTERRUPT_MASK_FROM_ISR();
|
|
ret = (port_interruptNesting[xPortGetCoreID()] != 0);
|
|
portCLEAR_INTERRUPT_MASK_FROM_ISR(irqStatus);
|
|
return ret;
|
|
}
|
|
|
|
void vPortAssertIfInISR(void)
|
|
{
|
|
configASSERT(xPortInIsrContext());
|
|
}
|
|
|
|
BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
|
|
{
|
|
return (port_interruptNesting[xPortGetCoreID()] != 0);
|
|
}
|
|
|
|
// ------------------ Critical Sections --------------------
|
|
|
|
BaseType_t __attribute__((optimize("-O3"))) xPortEnterCriticalTimeout(portMUX_TYPE *mux, BaseType_t timeout)
|
|
{
|
|
/* Interrupts may already be disabled (if this function is called in nested
|
|
* manner). However, there's no atomic operation that will allow us to check,
|
|
* thus we have to disable interrupts again anyways.
|
|
*
|
|
* However, if this is call is NOT nested (i.e., the first call to enter a
|
|
* critical section), we will save the previous interrupt level so that the
|
|
* saved level can be restored on the last call to exit the critical.
|
|
*/
|
|
BaseType_t xOldInterruptLevel = portSET_INTERRUPT_MASK_FROM_ISR();
|
|
if (!spinlock_acquire(mux, timeout)) {
|
|
//Timed out attempting to get spinlock. Restore previous interrupt level and return
|
|
portCLEAR_INTERRUPT_MASK_FROM_ISR(xOldInterruptLevel);
|
|
return pdFAIL;
|
|
}
|
|
//Spinlock acquired. Increment the critical nesting count.
|
|
BaseType_t coreID = xPortGetCoreID();
|
|
BaseType_t newNesting = port_uxCriticalNesting[coreID] + 1;
|
|
port_uxCriticalNesting[coreID] = newNesting;
|
|
//If this is the first entry to a critical section. Save the old interrupt level.
|
|
if ( newNesting == 1 ) {
|
|
port_uxOldInterruptState[coreID] = xOldInterruptLevel;
|
|
}
|
|
return pdPASS;
|
|
}
|
|
|
|
void __attribute__((optimize("-O3"))) vPortExitCritical(portMUX_TYPE *mux)
|
|
{
|
|
/* This function may be called in a nested manner. Therefore, we only need
|
|
* to reenable interrupts if this is the last call to exit the critical. We
|
|
* can use the nesting count to determine whether this is the last exit call.
|
|
*/
|
|
spinlock_release(mux);
|
|
BaseType_t coreID = xPortGetCoreID();
|
|
BaseType_t nesting = port_uxCriticalNesting[coreID];
|
|
|
|
if (nesting > 0) {
|
|
nesting--;
|
|
port_uxCriticalNesting[coreID] = nesting;
|
|
//This is the last exit call, restore the saved interrupt level
|
|
if ( nesting == 0 ) {
|
|
portCLEAR_INTERRUPT_MASK_FROM_ISR(port_uxOldInterruptState[coreID]);
|
|
}
|
|
}
|
|
}
|
|
|
|
BaseType_t xPortEnterCriticalTimeoutCompliance(portMUX_TYPE *mux, BaseType_t timeout)
|
|
{
|
|
BaseType_t ret;
|
|
if (!xPortInIsrContext()) {
|
|
ret = xPortEnterCriticalTimeout(mux, timeout);
|
|
} else {
|
|
esp_rom_printf("port*_CRITICAL called from ISR context. Aborting!\n");
|
|
abort();
|
|
ret = pdFAIL;
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
void vPortExitCriticalCompliance(portMUX_TYPE *mux)
|
|
{
|
|
if (!xPortInIsrContext()) {
|
|
vPortExitCritical(mux);
|
|
} else {
|
|
esp_rom_printf("port*_CRITICAL called from ISR context. Aborting!\n");
|
|
abort();
|
|
}
|
|
}
|
|
|
|
// ---------------------- Yielding -------------------------
|
|
|
|
void vPortYieldOtherCore( BaseType_t coreid )
|
|
{
|
|
esp_crosscore_int_send_yield( coreid );
|
|
}
|
|
|
|
// ------------------- Hook Functions ----------------------
|
|
|
|
void __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, char *pcTaskName )
|
|
{
|
|
#define ERR_STR1 "***ERROR*** A stack overflow in task "
|
|
#define ERR_STR2 " has been detected."
|
|
const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2};
|
|
|
|
char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = { 0 };
|
|
|
|
char *dest = buf;
|
|
for (size_t i = 0 ; i < sizeof(str) / sizeof(str[0]); i++) {
|
|
dest = strcat(dest, str[i]);
|
|
}
|
|
esp_system_abort(buf);
|
|
}
|
|
|
|
// ----------------------- System --------------------------
|
|
|
|
uint32_t xPortGetTickRateHz(void)
|
|
{
|
|
return (uint32_t)configTICK_RATE_HZ;
|
|
}
|
|
|
|
|
|
#define STACK_WATCH_AREA_SIZE 32
|
|
#define STACK_WATCH_POINT_NUMBER (SOC_CPU_WATCHPOINTS_NUM - 1)
|
|
|
|
void vPortSetStackWatchpoint( void *pxStackStart )
|
|
{
|
|
//Set watchpoint 1 to watch the last 32 bytes of the stack.
|
|
//Unfortunately, the Xtensa watchpoints can't set a watchpoint on a random [base - base+n] region because
|
|
//the size works by masking off the lowest address bits. For that reason, we futz a bit and watch the lowest 32
|
|
//bytes of the stack we can actually watch. In general, this can cause the watchpoint to be triggered at most
|
|
//28 bytes early. The value 32 is chosen because it's larger than the stack canary, which in FreeRTOS is 20 bytes.
|
|
//This way, we make sure we trigger before/when the stack canary is corrupted, not after.
|
|
int addr = (int)pxStackStart;
|
|
addr = (addr + 31) & (~31);
|
|
esp_cpu_set_watchpoint(STACK_WATCH_POINT_NUMBER, (char *)addr, 32, ESP_CPU_WATCHPOINT_STORE);
|
|
}
|
|
|
|
// --------------------- TCB Cleanup -----------------------
|
|
|
|
#if ( CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS )
|
|
static void vPortTLSPointersDelCb( void *pxTCB )
|
|
{
|
|
/* Typecast pxTCB to StaticTask_t type to access TCB struct members.
|
|
* pvDummy15 corresponds to pvThreadLocalStoragePointers member of the TCB.
|
|
*/
|
|
StaticTask_t *tcb = ( StaticTask_t * )pxTCB;
|
|
|
|
/* The TLSP deletion callbacks are stored at an offset of (configNUM_THREAD_LOCAL_STORAGE_POINTERS/2) */
|
|
TlsDeleteCallbackFunction_t *pvThreadLocalStoragePointersDelCallback = ( TlsDeleteCallbackFunction_t * )( &( tcb->pvDummy15[ ( configNUM_THREAD_LOCAL_STORAGE_POINTERS / 2 ) ] ) );
|
|
|
|
/* We need to iterate over half the depth of the pvThreadLocalStoragePointers area
|
|
* to access all TLS pointers and their respective TLS deletion callbacks.
|
|
*/
|
|
for ( int x = 0; x < ( configNUM_THREAD_LOCAL_STORAGE_POINTERS / 2 ); x++ ) {
|
|
if ( pvThreadLocalStoragePointersDelCallback[ x ] != NULL ) { //If del cb is set
|
|
/* In case the TLSP deletion callback has been overwritten by a TLS pointer, gracefully abort. */
|
|
if ( !esp_ptr_executable( pvThreadLocalStoragePointersDelCallback[ x ] ) ) {
|
|
// We call EARLY log here as currently portCLEAN_UP_TCB() is called in a critical section
|
|
ESP_EARLY_LOGE("FreeRTOS", "Fatal error: TLSP deletion callback at index %d overwritten with non-excutable pointer %p", x, pvThreadLocalStoragePointersDelCallback[ x ]);
|
|
abort();
|
|
}
|
|
|
|
pvThreadLocalStoragePointersDelCallback[ x ]( x, tcb->pvDummy15[ x ] ); //Call del cb
|
|
}
|
|
}
|
|
}
|
|
#endif /* CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS */
|
|
|
|
#if ( XCHAL_CP_NUM > 0 )
|
|
static void vPortCleanUpCoprocArea(void *pvTCB)
|
|
{
|
|
UBaseType_t uxCoprocArea;
|
|
BaseType_t xTargetCoreID;
|
|
|
|
/* Get a pointer to the task's coprocessor save area */
|
|
uxCoprocArea = ( UBaseType_t ) ( ( ( StaticTask_t * ) pvTCB )->pxDummy8 ); /* Get TCB_t.pxEndOfStack */
|
|
uxCoprocArea = STACKPTR_ALIGN_DOWN(16, uxCoprocArea - XT_CP_SIZE);
|
|
|
|
/* Get xTargetCoreID from the TCB.xCoreID */
|
|
xTargetCoreID = ( ( StaticTask_t * ) pvTCB )->xDummyCoreID;
|
|
|
|
/* If task has live floating point registers somewhere, release them */
|
|
void _xt_coproc_release(volatile void *coproc_sa_base, BaseType_t xTargetCoreID);
|
|
_xt_coproc_release( (void *)uxCoprocArea, xTargetCoreID );
|
|
}
|
|
#endif /* XCHAL_CP_NUM > 0 */
|
|
|
|
void vPortTCBPreDeleteHook( void *pxTCB )
|
|
{
|
|
#if ( CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK )
|
|
/* Call the user defined task pre-deletion hook */
|
|
extern void vTaskPreDeletionHook( void * pxTCB );
|
|
vTaskPreDeletionHook( pxTCB );
|
|
#endif /* CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK */
|
|
|
|
#if ( CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP )
|
|
/*
|
|
* If the user is using the legacy task pre-deletion hook, call it.
|
|
* Todo: Will be removed in IDF-8097
|
|
*/
|
|
#warning "CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is deprecated. Use CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK instead."
|
|
extern void vPortCleanUpTCB( void * pxTCB );
|
|
vPortCleanUpTCB( pxTCB );
|
|
#endif /* CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP */
|
|
|
|
#if ( CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS )
|
|
/* Call TLS pointers deletion callbacks */
|
|
vPortTLSPointersDelCb( pxTCB );
|
|
#endif /* CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS */
|
|
|
|
#if ( XCHAL_CP_NUM > 0 )
|
|
/* Cleanup coproc save area */
|
|
vPortCleanUpCoprocArea( pxTCB );
|
|
#endif /* XCHAL_CP_NUM > 0 */
|
|
}
|